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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ilu_dmu_egress_sample.vrhpal | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #inc "ilu_peu_cov_inc.pal" | |
36 | ||
37 | ||
38 | sample dmu_ilu_PEC_egress_F_sample (dmu_ilu_hdr_F_Type) { | |
39 | wildcard state PEC_Egress_PIO_MRd ( 7'b0x00000); | |
40 | wildcard state PEC_Egress_PIO_IORd ( 7'b0000010); | |
41 | wildcard state PEC_Egress_PIO_CfgRd0 ( 7'b0000100); | |
42 | wildcard state PEC_Egress_PIO_CfgRd1 ( 7'b0000101); | |
43 | ||
44 | wildcard state PEC_Egress_PIO_MemWr ( 7'b1x00000); | |
45 | wildcard state PEC_Egress_PIO_IOWr ( 7'b1000010); | |
46 | wildcard state PEC_Egress_PIO_CfgWr0 ( 7'b1000100); | |
47 | wildcard state PEC_Egress_PIO_CfgWr1 ( 7'b1000101); | |
48 | ||
49 | wildcard state PEC_Egress_DMA_Cpl ( 7'b0001010); | |
50 | wildcard state PEC_Egress_DMA_CplLk ( 7'b0001011); | |
51 | wildcard state PEC_Egress_DMA_CplD ( 7'b1001010); | |
52 | } | |
53 | ||
54 | sample dmu_ilu_PEC_egress_TC_sample (dmu_ilu_hdr_TC) { | |
55 | . &toggle( 3 ); | |
56 | ||
57 | cov_weight = 1; | |
58 | } | |
59 | ||
60 | sample dmu_ilu_PEC_egress_Atr_sample (dmu_ilu_hdr_Atr) { | |
61 | . &toggle( 2 ); | |
62 | ||
63 | cov_weight = 1; | |
64 | } | |
65 | ||
66 | sample dmu_ilu_PEC_egress_Len_sample (dmu_ilu_hdr_Len) { | |
67 | . &toggle( 8); | |
68 | cov_weight = 1; | |
69 | } | |
70 | sample dmu_ilu_PEC_egress_Len1_sample (dmu_ilu_coverage_ifc.k2y_rcd[110]) | |
71 | { | |
72 | state S_k2y_rcd_enq (1'b0); | |
73 | } | |
74 | sample dmu_ilu_PEC_egress_Len2_sample (dmu_ilu_coverage_ifc.k2y_rcd[111]) | |
75 | { | |
76 | state S_k2y_rcd_enq (1'b0); | |
77 | } | |
78 | ||
79 | sample dmu_ilu_PEC_egress_ReqID_sample (dmu_ilu_hdr_ReqID) { | |
80 | . &toggle( 16); | |
81 | cov_weight = 1; | |
82 | } | |
83 | ||
84 | sample dmu_ilu_PEC_egress_TLPtag_sample (dmu_ilu_hdr_TLPTag) { | |
85 | // Since bit 6 cannot be set to 1, cannot use &toggle any more: | |
86 | wildcard state s_bit_07_0 ( 8'b0xxxxxxx ); | |
87 | wildcard state s_bit_07_1 ( 8'b1xxxxxxx ); | |
88 | wildcard state s_bit_06_0 ( 8'bx0xxxxxx ); | |
89 | //wildcard state s_bit_06_1 ( 8'bx1xxxxxx ); | |
90 | wildcard state s_bit_05_0 ( 8'bxx0xxxxx ); | |
91 | wildcard state s_bit_05_1 ( 8'bxx1xxxxx ); | |
92 | wildcard state s_bit_04_0 ( 8'bxxx0xxxx ); | |
93 | wildcard state s_bit_04_1 ( 8'bxxx1xxxx ); | |
94 | wildcard state s_bit_03_0 ( 8'bxxxx0xxx ); | |
95 | wildcard state s_bit_03_1 ( 8'bxxxx1xxx ); | |
96 | wildcard state s_bit_02_0 ( 8'bxxxxx0xx ); | |
97 | wildcard state s_bit_02_1 ( 8'bxxxxx1xx ); | |
98 | wildcard state s_bit_01_0 ( 8'bxxxxxx0x ); | |
99 | wildcard state s_bit_01_1 ( 8'bxxxxxx1x ); | |
100 | wildcard state s_bit_00_0 ( 8'bxxxxxxx0 ); | |
101 | wildcard state s_bit_00_1 ( 8'bxxxxxxx1 ); | |
102 | ||
103 | cov_weight = 1; | |
104 | } | |
105 | sample dmu_ilu_PEC_egress_DWBE_sample_last (dmu_ilu_hdr_LastDWBE) { | |
106 | . &toggle(4 ); | |
107 | cov_weight = 1; | |
108 | } | |
109 | sample dmu_ilu_PEC_egress_DWBE_sample_first (dmu_ilu_hdr_FirstDWBE) { | |
110 | . &toggle(4 ); | |
111 | cov_weight = 1; | |
112 | } | |
113 | ||
114 | sample dmu_ilu_PEC_egress_Addr (dmu_ilu_hdr_Addr) { | |
115 | . &toggle(64 ); | |
116 | cov_weight = 1; | |
117 | } | |
118 | ||
119 | sample dmu_ilu_PEC_egress_Dptr_sample (dmu_ilu_hdr_Dptr) { | |
120 | . &toggle(6 ); | |
121 | cov_weight = 1; | |
122 | } | |
123 |