Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / l2sat / l2_dir_lookup_sample.vrhpal
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: l2_dir_lookup_sample.vrhpal
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35 wildcard state idir_bank0_row0( { 4'bxxx1, 1'bx, 2'h0, 7'bx} );
36 wildcard state idir_bank0_row1( { 4'bxxx1, 1'bx, 2'h1, 7'bx} );
37 wildcard state idir_bank0_row2( { 4'bxxx1, 1'bx, 2'h2, 7'bx} );
38 wildcard state idir_bank0_row3( { 4'bxxx1, 1'bx, 2'h3, 7'bx} );
39// wildcard state idir_bank0_row4( { 4'bxxx1, 3'h4, 7'bx} );
40// wildcard state idir_bank0_row5( { 4'bxxx1, 3'h5, 7'bx} );
41// wildcard state idir_bank0_row6( { 4'bxxx1, 3'h6, 7'bx} );
42// wildcard state idir_bank0_row7( { 4'bxxx1, 3'h7, 7'bx} );
43 wildcard state idir_bank1_row0( { 4'bxx1x, 1'bx, 2'h0, 7'bx} );
44 wildcard state idir_bank1_row1( { 4'bxx1x, 1'bx, 2'h1, 7'bx} );
45 wildcard state idir_bank1_row2( { 4'bxx1x, 1'bx, 2'h2, 7'bx} );
46 wildcard state idir_bank1_row3( { 4'bxx1x, 1'bx, 2'h3, 7'bx} );
47// wildcard state idir_bank1_row4( { 4'bxx1x, 3'h4, 7'bx} );
48// wildcard state idir_bank1_row5( { 4'bxx1x, 3'h5, 7'bx} );
49// wildcard state idir_bank1_row6( { 4'bxx1x, 3'h6, 7'bx} );
50// wildcard state idir_bank1_row7( { 4'bxx1x, 3'h7, 7'bx} );
51 wildcard state idir_bank2_row0( { 4'bx1xx, 1'bx, 2'h0, 7'bx} );
52 wildcard state idir_bank2_row1( { 4'bx1xx, 1'bx, 2'h1, 7'bx} );
53 wildcard state idir_bank2_row2( { 4'bx1xx, 1'bx, 2'h2, 7'bx} );
54 wildcard state idir_bank2_row3( { 4'bx1xx, 1'bx, 2'h3, 7'bx} );
55// wildcard state idir_bank2_row4( { 4'bx1xx, 3'h4, 7'bx} );
56// wildcard state idir_bank2_row5( { 4'bx1xx, 3'h5, 7'bx} );
57// wildcard state idir_bank2_row6( { 4'bx1xx, 3'h6, 7'bx} );
58// wildcard state idir_bank2_row7( { 4'bx1xx, 3'h7, 7'bx} );
59 wildcard state idir_bank3_row0( { 4'b1xxx, 1'bx, 2'h0, 7'bx} );
60 wildcard state idir_bank3_row1( { 4'b1xxx, 1'bx, 2'h1, 7'bx} );
61 wildcard state idir_bank3_row2( { 4'b1xxx, 1'bx, 2'h2, 7'bx} );
62 wildcard state idir_bank3_row3( { 4'b1xxx, 1'bx, 2'h3, 7'bx} );
63// wildcard state idir_bank3_row4( { 4'b1xxx, 3'h4, 7'bx} );
64// wildcard state idir_bank3_row5( { 4'b1xxx, 3'h5, 7'bx} );
65// wildcard state idir_bank3_row6( { 4'b1xxx, 3'h6, 7'bx} );
66// wildcard state idir_bank3_row7( { 4'b1xxx, 3'h7, 7'bx} );
67
68 wildcard state ddir_bank0_row0( { 7'bx, 4'bxxx1, 1'bx, 2'h0} );
69 wildcard state ddir_bank0_row1( { 7'bx, 4'bxxx1, 1'bx, 2'h1} );
70 wildcard state ddir_bank0_row2( { 7'bx, 4'bxxx1, 1'bx, 2'h2} );
71 wildcard state ddir_bank0_row3( { 7'bx, 4'bxxx1, 1'bx, 2'h3} );
72// wildcard state ddir_bank0_row4( { 7'bx, 4'bxxx1, 3'h4} );
73// wildcard state ddir_bank0_row5( { 7'bx, 4'bxxx1, 3'h5} );
74// wildcard state ddir_bank0_row6( { 7'bx, 4'bxxx1, 3'h6} );
75// wildcard state ddir_bank0_row7( { 7'bx, 4'bxxx1, 3'h7} );
76 wildcard state ddir_bank1_row0( { 7'bx, 4'bxx1x, 1'bx, 2'h0} );
77 wildcard state ddir_bank1_row1( { 7'bx, 4'bxx1x, 1'bx, 2'h1} );
78 wildcard state ddir_bank1_row2( { 7'bx, 4'bxx1x, 1'bx, 2'h2} );
79 wildcard state ddir_bank1_row3( { 7'bx, 4'bxx1x, 1'bx, 2'h3} );
80// wildcard state ddir_bank1_row4( { 7'bx, 4'bxx1x, 3'h4} );
81// wildcard state ddir_bank1_row5( { 7'bx, 4'bxx1x, 3'h5} );
82// wildcard state ddir_bank1_row6( { 7'bx, 4'bxx1x, 3'h6} );
83// wildcard state ddir_bank1_row7( { 7'bx, 4'bxx1x, 3'h7} );
84 wildcard state ddir_bank2_row0( { 7'bx, 4'bx1xx, 1'bx, 2'h0} );
85 wildcard state ddir_bank2_row1( { 7'bx, 4'bx1xx, 1'bx, 2'h1} );
86 wildcard state ddir_bank2_row2( { 7'bx, 4'bx1xx, 1'bx, 2'h2} );
87 wildcard state ddir_bank2_row3( { 7'bx, 4'bx1xx, 1'bx, 2'h3} );
88// wildcard state ddir_bank2_row4( { 7'bx, 4'bx1xx, 3'h4} );
89// wildcard state ddir_bank2_row5( { 7'bx, 4'bx1xx, 3'h5} );
90// wildcard state ddir_bank2_row6( { 7'bx, 4'bx1xx, 3'h6} );
91// wildcard state ddir_bank2_row7( { 7'bx, 4'bx1xx, 3'h7} );
92 wildcard state ddir_bank3_row0( { 7'bx, 4'b1xxx, 1'bx, 2'h0} );
93 wildcard state ddir_bank3_row1( { 7'bx, 4'b1xxx, 1'bx, 2'h1} );
94 wildcard state ddir_bank3_row2( { 7'bx, 4'b1xxx, 1'bx, 2'h2} );
95 wildcard state ddir_bank3_row3( { 7'bx, 4'b1xxx, 1'bx, 2'h3} );
96// wildcard state ddir_bank3_row4( { 7'bx, 4'b1xxx, 3'h4} );
97// wildcard state ddir_bank3_row5( { 7'bx, 4'b1xxx, 3'h5} );
98// wildcard state ddir_bank3_row6( { 7'bx, 4'b1xxx, 3'h6} );
99// wildcard state ddir_bank3_row7( { 7'bx, 4'b1xxx, 3'h7} );
100// }