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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / l2sat / l2_siu_fields_sample.vrhpal
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: l2_siu_fields_sample.vrhpal
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35 wildcard state JBI_CTAG15_0 ({1'b1, 6'bx, 1'b0, 1'bx, 1'b0, 15'bx, 8'bx});
36 wildcard state JBI_CTAG15_1 ({1'b1, 6'bx, 1'b0, 1'bx, 1'b1, 15'bx, 8'bx});
37 wildcard state JBI_CTAG14_0 ({1'b1, 6'bx, 1'b0, 1'bx, 1'bx, 1'b0, 14'bx, 8'bx});
38 wildcard state JBI_CTAG14_1 ({1'b1, 6'bx, 1'b0, 1'bx, 1'bx, 1'b1, 14'bx, 8'bx});
39 wildcard state JBI_CTAG13_0 ({1'b1, 6'bx, 1'b0, 1'bx, 2'bx, 1'b0, 13'bx, 8'bx});
40 wildcard state JBI_CTAG13_1 ({1'b1, 6'bx, 1'b0, 1'bx, 2'bx, 1'b1, 13'bx, 8'bx});
41 wildcard state JBI_CTAG12_0 ({1'b1, 6'bx, 1'b0, 1'bx, 3'bx, 1'b0, 12'bx, 8'bx});
42 wildcard state JBI_CTAG12_1 ({1'b1, 6'bx, 1'b0, 1'bx, 3'bx, 1'b1, 12'bx, 8'bx});
43 wildcard state JBI_CTAG11_0 ({1'b1, 6'bx, 1'b0, 1'bx, 4'bx, 1'b0, 11'bx, 8'bx});
44 wildcard state JBI_CTAG11_1 ({1'b1, 6'bx, 1'b0, 1'bx, 4'bx, 1'b1, 11'bx, 8'bx});
45 wildcard state JBI_CTAG10_0 ({1'b1, 6'bx, 1'b0, 1'bx, 5'bx, 1'b0, 10'bx, 8'bx});
46 wildcard state JBI_CTAG10_1 ({1'b1, 6'bx, 1'b0, 1'bx, 5'bx, 1'b1, 10'bx, 8'bx});
47 wildcard state JBI_CTAG9_0 ({1'b1, 6'bx, 1'b0, 1'bx, 6'bx, 1'b0, 9'bx, 8'bx});
48 wildcard state JBI_CTAG9_1 ({1'b1, 6'bx, 1'b0, 1'bx, 6'bx, 1'b1, 9'bx, 8'bx});
49 wildcard state JBI_CTAG8_0 ({1'b1, 6'bx, 1'b0, 1'bx, 7'bx, 1'b0, 8'bx, 8'bx});
50 wildcard state JBI_CTAG8_1 ({1'b1, 6'bx, 1'b0, 1'bx, 7'bx, 1'b1, 8'bx, 8'bx});
51 wildcard state JBI_CTAG7_0 ({1'b1, 6'bx, 1'b0, 1'bx, 8'bx, 1'b0, 7'bx, 8'bx});
52 wildcard state JBI_CTAG7_1 ({1'b1, 6'bx, 1'b0, 1'bx, 8'bx, 1'b1, 7'bx, 8'bx});
53 wildcard state JBI_CTAG6_0 ({1'b1, 6'bx, 1'b0, 1'bx, 9'bx, 1'b0, 6'bx, 8'bx});
54 wildcard state JBI_CTAG6_1 ({1'b1, 6'bx, 1'b0, 1'bx, 9'bx, 1'b1, 6'bx, 8'bx});
55 wildcard state JBI_CTAG5_0 ({1'b1, 6'bx, 1'b0, 1'bx,10'bx, 1'b0, 5'bx, 8'bx});
56 wildcard state JBI_CTAG5_1 ({1'b1, 6'bx, 1'b0, 1'bx,10'bx, 1'b1, 5'bx, 8'bx});
57 wildcard state JBI_CTAG4_0 ({1'b1, 6'bx, 1'b0, 1'bx,11'bx, 1'b0, 4'bx, 8'bx});
58 wildcard state JBI_CTAG4_1 ({1'b1, 6'bx, 1'b0, 1'bx,11'bx, 1'b1, 4'bx, 8'bx});
59 wildcard state JBI_CTAG3_0 ({1'b1, 6'bx, 1'b0, 1'bx,12'bx, 1'b0, 3'bx, 8'bx});
60 wildcard state JBI_CTAG3_1 ({1'b1, 6'bx, 1'b0, 1'bx,12'bx, 1'b1, 3'bx, 8'bx});
61 wildcard state JBI_CTAG2_0 ({1'b1, 6'bx, 1'b0, 1'bx,13'bx, 1'b0, 2'bx, 8'bx});
62 wildcard state JBI_CTAG2_1 ({1'b1, 6'bx, 1'b0, 1'bx,13'bx, 1'b1, 2'bx, 8'bx});
63 wildcard state JBI_CTAG1_0 ({1'b1, 6'bx, 1'b0, 1'bx,14'bx, 1'b0, 1'bx, 8'bx});
64 wildcard state JBI_CTAG1_1 ({1'b1, 6'bx, 1'b0, 1'bx,14'bx, 1'b1, 1'bx, 8'bx});
65 wildcard state JBI_CTAG0_0 ({1'b1, 6'bx, 1'b0, 1'bx,15'bx, 1'b0, 8'bx});
66 wildcard state JBI_CTAG0_1 ({1'b1, 6'bx, 1'b0, 1'bx,15'bx, 1'b1, 8'bx});
67
68 //JOPES bits
69 wildcard state JBI_WRI_J_0 ({1'b1, 5'b0xxxx, 3'b100, 24'bx});
70#ifndef FC_COVERAGE
71 wildcard state JBI_WRI_J_1 ({1'b1, 5'b1xxxx, 3'b100, 24'bx}); // no JTAG in FC
72#endif
73 wildcard state JBI_WRI_O_0 ({1'b1, 5'bx0xxx, 3'b100, 24'bx});
74 wildcard state JBI_WRI_O_1 ({1'b1, 5'bx1xxx, 3'b100, 24'bx});
75 wildcard state JBI_WRI_P_0 ({1'b1, 5'bxx0xx, 3'b100, 24'bx});
76 wildcard state JBI_WRI_P_1 ({1'b1, 5'bxx1xx, 3'b100, 24'bx});
77 wildcard state JBI_WRI_E_0 ({1'b1, 5'bxxx0x, 3'b100, 24'bx});
78 wildcard state JBI_WRI_E_1 ({1'b1, 5'bxxx1x, 3'b100, 24'bx});
79 wildcard state JBI_WRI_S_0 ({1'b1, 5'bxxxx0, 3'b100, 24'bx});
80 wildcard state JBI_WRI_S_1 ({1'b1, 5'bxxxx1, 3'b100, 24'bx});
81
82 wildcard state JBI_WR8_J_0 ({1'b1, 5'b0xxxx, 3'b010, 24'bx});
83#ifndef FC_COVERAGE
84 wildcard state JBI_WR8_J_1 ({1'b1, 5'b1xxxx, 3'b010, 24'bx}); // no JTAG in FC
85 wildcard state JBI_WR8_O_0 ({1'b1, 5'bx0xxx, 3'b010, 24'bx});
86 wildcard state JBI_WR8_P_0 ({1'b1, 5'bxx0xx, 3'b010, 24'bx});
87 wildcard state JBI_WR8_S_0 ({1'b1, 5'bxxxx0, 3'b010, 24'bx});
88#endif
89 wildcard state JBI_WR8_O_1 ({1'b1, 5'bx1xxx, 3'b010, 24'bx}); // must be 1
90 wildcard state JBI_WR8_P_1 ({1'b1, 5'bxx1xx, 3'b010, 24'bx}); // must be 1
91 wildcard state JBI_WR8_E_0 ({1'b1, 5'bxxx0x, 3'b010, 24'bx});
92 wildcard state JBI_WR8_E_1 ({1'b1, 5'bxxx1x, 3'b010, 24'bx});
93 wildcard state JBI_WR8_S_1 ({1'b1, 5'bxxxx1, 3'b010, 24'bx}); // must be 1
94
95 wildcard state JBI_RDD_J_0 ({1'b1, 5'b0xxxx, 3'b001, 24'bx});
96#ifndef FC_COVERAGE
97 wildcard state JBI_RDD_J_1 ({1'b1, 5'b1xxxx, 3'b001, 24'bx}); // no JTAG in FC
98 wildcard state JBI_RDD_P_1 ({1'b1, 5'bxx1xx, 3'b001, 24'bx});
99#endif
100 wildcard state JBI_RDD_O_0 ({1'b1, 5'bx0xxx, 3'b001, 24'bx});
101 wildcard state JBI_RDD_O_1 ({1'b1, 5'bx1xxx, 3'b001, 24'bx});
102 wildcard state JBI_RDD_P_0 ({1'b1, 5'bxx0xx, 3'b001, 24'bx}); // must be 0
103 wildcard state JBI_RDD_E_0 ({1'b1, 5'bxxx0x, 3'b001, 24'bx});
104 wildcard state JBI_RDD_E_1 ({1'b1, 5'bxxx1x, 3'b001, 24'bx});
105 wildcard state JBI_RDD_S_0 ({1'b1, 5'bxxxx0, 3'b001, 24'bx});
106 wildcard state JBI_RDD_S_1 ({1'b1, 5'bxxxx1, 3'b001, 24'bx});
107
108
109// }
Full OpenSPARC design & verification tarball including full HDL.