Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / common / coverage / ncu / niu_ncu_sample.vrhpal

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// OpenSPARC T2 Processor File: niu_ncu_sample.vrhpal
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sample niu_ncu_intf_size (niu_ncu_size)
{
           wildcard state SIZE         (3'b0xx);
}

sample niu_ncu_intf_bufid_sample (niu_ncu_bufid)
{
           m_state BUFFID  	(0:1);
}

sample niu_ncu_intf_type_sample (niu_ncu_type)
{
           state READ_NACK  	( 4'b0000 );
           state READ_ACK  	( 4'b0001 );
      //     state INT        	( 4'b1000 );
}
sample niu_ncu_intf_type_trans (niu_ncu_type)
{

           state READ_NACK  	( 4'b0000 );
           state READ_ACK  	( 4'b0001 );
           state INT        	( 4'b1000 );



	   trans TYPE_TRAN30 ("READ_ACK" -> "READ_ACK");
	   trans TYPE_TRAN31 ("READ_ACK" -> "READ_NACK");
	   trans TYPE_TRAN32 ("READ_ACK" -> "INT");

	   trans TYPE_TRAN40 ("READ_NACK" -> "READ_ACK");
	   trans TYPE_TRAN41 ("READ_NACK" -> "READ_NACK");

	   trans TYPE_TRAN44 ("READ_NACK" -> "INT");

	   trans TYPE_TRAN70 ("INT" -> "READ_NACK");
	   trans TYPE_TRAN71 ("INT" -> "READ_ACK");
	   trans TYPE_TRAN72 ("INT" -> "INT");


}

sample niu_ncu_intf_cpuid_sample (niu_ncu_cpuid)
{
           m_state CPU_ID  	( 0:63 );
}

sample niu_ncu_intf_deviceid_sample (niu_ncu_deviceid)
{
           m_state DEVICE_ID  	( 64:127 ) if (niu_ncu_type== 4'b1000);
}

/*
sample niu_ncu_intf_int_vec_sample (niu_ncu_int_vec)
{
           m_state INT_VEC  	( 0:63 ) if (niu_ncu_type== 4'b1000);
}
*/
sample niu_ncu_intf_b2b_sample (niu_ncu_b2b)
{
	m_state B2B          ( 2:5 ) ;
}

sample niu_ncu_intf_stall_b2b_sample (ncu_niu_stall_b2b)
{
	m_state STALL        ( 1:30 ) ;
}


sample niu_ncu_intf_pkt_gap(niu_ncu_pkt_gap)
{
	m_state PKT_GAP          ( 1:10 ) ;
}
cross niu_ncu_id_type_cross (niu_ncu_intf_type_sample,niu_ncu_intf_cpuid_sample );