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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: baseAsmToVeraIntf.vr | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #include "registerSlamVerilogTasks.vri" | |
36 | ||
37 | virtual class BaseAsmToVeraIntf { | |
38 | ||
39 | ||
40 | // generic asm-to-vera user event | |
41 | task generic_ev(string arg1_str, | |
42 | reg [63:0] arg2_64bits, | |
43 | reg [63:0] arg3_64bits) | |
44 | { | |
45 | error("BaseAsmToVeraIntf::generic_ev should not be called for this bench! Check your diag.\n"); | |
46 | } | |
47 | ||
48 | // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector) hex, w/no 64'h | |
49 | // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector, src, wait) | |
50 | task intp(reg [5:0] tid = 0, | |
51 | reg [63:0] type = 0, | |
52 | reg [63:0] vec = 0, | |
53 | integer src = 16, // 0-16 are ccx ports. 16 = NCU | |
54 | integer wait = 0) | |
55 | { | |
56 | error("BaseAsmToVeraIntf::intp should not be called for this bench! Check your diag.\n"); | |
57 | } | |
58 | ||
59 | // dump actual RAM contents | |
60 | // trig_pc_d(1,expr(@VA(.MAIN.T1_ext_intr_200), 16, 16)) -> dump_mem(addr, amount) | |
61 | task dump_mem(reg [63:0] addr=0, | |
62 | integer amount = 8) | |
63 | { | |
64 | error("BaseAsmToVeraIntf::dump_mem should not be called for this bench! Check your diag.\n"); | |
65 | } | |
66 | ||
67 | // trig_pc_d(1,expr(@VA(.MAIN.T1_ext_intr_200), 16, 16)) -> extint(wait/delay) | |
68 | task extint(integer wait = 0, integer width = 0) | |
69 | { | |
70 | error("BaseAsmToVeraIntf::extint should not be called for this bench! Check your diag.\n"); | |
71 | } | |
72 | ||
73 | task warmrst(integer wait = 0) | |
74 | { | |
75 | error("BaseAsmToVeraIntf::warmrst should not be called for this bench! Check your diag.\n"); | |
76 | } | |
77 | ||
78 | // SPC BFM will do a store. Pick correct port w/ BFM!!! | |
79 | // trig_pc_d(1,...) -> store(cpu/ccxPort, addr, data) | |
80 | task store(reg [7:0] ccxPortMask = 0, | |
81 | reg [63:0] addr=0, | |
82 | reg [63:0] data=0) | |
83 | { | |
84 | error("BaseAsmToVeraIntf::store should not be called for this bench! Check your diag.\n"); | |
85 | } | |
86 | ||
87 | // trig_pc_d(1,...) -> cpx_stall(cpu/ccxPort mask [7:0], length) | |
88 | // does not use CPX stall input! | |
89 | // need to force internal CCX signals. | |
90 | // DO THIS IN HERE. | |
91 | task cpx_stall(reg [7:0] ccxPortMask = 0, // cpu ID | |
92 | integer length = 0, | |
93 | integer wait = 0) | |
94 | { | |
95 | error("BaseAsmToVeraIntf::cpx_stall should not be called for this bench! Check your diag.\n"); | |
96 | } | |
97 | ||
98 | // Task for counting the traps taken, used in random error injection | |
99 | task L2ErrTrapCount( reg [8:0] count=0) | |
100 | { | |
101 | error("BaseAsmToVeraIntf::L2ErrTrapCount should not be called for this bench! Check your diag.\n") | |
102 | ; | |
103 | } | |
104 | ||
105 | ||
106 | // Random error injection in CCM Data Array | |
107 | task L2DAErrInjection( integer injectErr=0) | |
108 | { | |
109 | error("BaseAsmToVeraIntf::L2DAErrInjection should not be called for this bench! Check your diag.\n") | |
110 | ; | |
111 | } | |
112 | ||
113 | // Random error injection in CCM tag Array | |
114 | task L2TAErrInjection( integer errorInject=0) | |
115 | { | |
116 | error("BaseAsmToVeraIntf::L2TAErrInjection should not be called for this bench! Check your diag.\n") | |
117 | ; | |
118 | } | |
119 | ||
120 | task IosErrInj (string errtype, bit [15:0] ctag, bit [39:0] pa) | |
121 | { | |
122 | error("BaseAsmToVeraIntf::IosErrInj should not be called for this bench! Check your diag.\n"); | |
123 | } | |
124 | ||
125 | ||
126 | task IosRandErrInj (string errtype, integer num_errs, integer weight) | |
127 | { | |
128 | error("BaseAsmToVeraIntf::IosRandErrInj should not be called for this bench! Check your diag.\n"); | |
129 | } | |
130 | ||
131 | //SIU stub will do a dma rd starting with the address | |
132 | //will do a dma rd's of that number of cache lines | |
133 | task siuDmaRd(reg [63:0] addr=0, | |
134 | integer amount=0) | |
135 | { | |
136 | error("BaseAsmToVeraIntf::siuDmaRd should not be called for this bench! Check your diag.\n"); | |
137 | } | |
138 | ||
139 | //SIU stub will do a dma write starting with the address | |
140 | //for the number of cache of lines shown | |
141 | task siuDmaWri(reg [63:0] addr=0, | |
142 | integer amount=0) | |
143 | { | |
144 | error("BaseAsmToVeraIntf::siuDmaWri should not be called for this bench! Check your diag.\n"); | |
145 | } | |
146 | ||
147 | //SIU stun will do a merged wr8 to the address shown below | |
148 | task siuDmaWr8(reg [63:0] addr=0, | |
149 | reg [63:0] data=0, | |
150 | reg [63:0] size=0) | |
151 | { | |
152 | error("BaseAsmToVeraIntf::siuDmaWr8 should not be called for this bench! Check your diag.\n"); | |
153 | } | |
154 | ||
155 | // if rdwr = 0 JTAG DRIVER will do a read from the address and | |
156 | // compare with data (asm to VERA) | |
157 | // if rdwr = 1 JTAG DRIVER will write to address and data (VERA to asm) | |
158 | task jtagRdWrL2(reg [63:0] paAddr=0, | |
159 | reg [63:0] data=0, | |
160 | reg [63:0] jtagDoneAddrMem=0, | |
161 | reg rdwr=0) | |
162 | { | |
163 | error("BaseAsmToVeraIntf::jtagRdWrL2 should not be called for this bench! Check your diag.\n"); | |
164 | } | |
165 | ||
166 | task pktGenConfig(integer mac_port, integer frame_type, integer frame_class, integer data_length, | |
167 | (integer tx_multi_port = 0, integer data_length_p1 = -1)) | |
168 | { | |
169 | error("BaseAsmToVeraIntf::pktGenConfig should not be called for this bench! Check your diag.\n"); | |
170 | } | |
171 | ||
172 | task NIU_SetTxRingKick(integer mac_port, integer dma_no, | |
173 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
174 | { | |
175 | error("BaseAsmToVeraIntf::NIU_SetTxRingKick should not be called for this bench! Check your diag.\n"); | |
176 | } | |
177 | ||
178 | task NIU_AddTxChannels(integer mac_port, integer dma_no, | |
179 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
180 | { | |
181 | error("BaseAsmToVeraIntf::NIU_AddTxChannels should not be called for this bench! Check your diag.\n"); | |
182 | } | |
183 | ||
184 | task NIU_SetTxMaxBurst(integer mac_port, integer dma_no, integer SetTxMaxBurst_Data, | |
185 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
186 | { | |
187 | error("BaseAsmToVeraIntf::NIU_SetTxMaxBurst should not be called for this bench! Check your diag.\n"); | |
188 | } | |
189 | ||
190 | task NIU_InitTxDma(integer mac_port, integer dma_no, bit Xlate, | |
191 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
192 | { | |
193 | error("BaseAsmToVeraIntf::NIU_InitTxDma should not be called for this bench! Check your diag.\n"); | |
194 | } | |
195 | ||
196 | task NIU_TxDMAActivate(integer mac_port, integer dma_activelist, | |
197 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
198 | { | |
199 | error("BaseAsmToVeraIntf::NIU_TxDMAActivate should not be called for this bench! Check your diag.\n"); | |
200 | } | |
201 | ||
202 | task NIU_EXIT_chk(integer mac_port) | |
203 | { | |
204 | error("BaseAsmToVeraIntf::NIU_EXIT_chk should not be called for this bench! Check your diag.\n"); | |
205 | } | |
206 | ||
207 | task TxPktGen(integer mac_port, integer dmaport, integer numofpacket, | |
208 | (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)) | |
209 | { | |
210 | error("BaseAsmToVeraIntf::TxPktGen should not be called for this bench! Check your diag.\n"); | |
211 | } | |
212 | ||
213 | task NIU_InitRxDma ( | |
214 | integer RxDmaChnlNo, | |
215 | integer RxDescRingLen, | |
216 | bit [39:0] RxRingStartAddr, | |
217 | bit [63:0] RbrConfData, | |
218 | integer RxInitKick, | |
219 | bit Xlate, | |
220 | (bit [15:0] rx_multi_dma=16'h0)) | |
221 | { | |
222 | error("BaseAsmToVeraIntf::NIU_InitRxDma should not be called for this bench! Check your diag.\n"); | |
223 | } | |
224 | ||
225 | task NIU_RxPktConf(integer RxPktCnt, (integer iport = 0)) | |
226 | { | |
227 | error("BaseAsmToVeraIntf::NIU_RxPktConf should not be called for this bench! Check your diag.\n"); | |
228 | } | |
229 | ||
230 | task NIU_RxGenPkt ( | |
231 | integer mac_port, | |
232 | integer RxDmaChnlNo, | |
233 | integer RxPktCnt, | |
234 | integer RxPktLen, | |
235 | (integer rx_multi_PORT=0, | |
236 | bit [15:0] rx_multi_DMA= 16'h0)) | |
237 | { | |
238 | error("BaseAsmToVeraIntf::NIU_RxGenPkt should not be called for this bench! Check your diag.\n"); | |
239 | } | |
240 | ||
241 | task errCpxPkt(reg [2:0] tid, | |
242 | reg [3:0] type, | |
243 | reg [1:0] errBits, | |
244 | reg [1:0] ifill2 = 0, | |
245 | reg [63:0] addr = 64'hffffffffffffffff, | |
246 | reg ncValue=0) | |
247 | { | |
248 | error("BaseAsmToVeraIntf::errCpxPkt should not be called for this bench! Check your diag.\n"); | |
249 | } | |
250 | ||
251 | task IC_hard_err_inj(reg [3:0] err_type, | |
252 | reg [48:0] va, | |
253 | reg [2:0] way, | |
254 | reg [7:0] tid) | |
255 | { | |
256 | error("BaseAsmToVeraIntf::IC_hard_err_inj should not be called for this bench! Check your diag.\n"); | |
257 | } | |
258 | ||
259 | task DC_hard_err_inj(reg [3:0] err_type, | |
260 | reg [6:0] index, | |
261 | reg [1:0] way, | |
262 | reg [7:0] tid) | |
263 | { | |
264 | error("BaseAsmToVeraIntf::DC_hard_err_inj should not be called for this bench! Check your diag.\n"); | |
265 | } | |
266 | ||
267 | task DTLB_err_enable(bit [2:0] err_type=~0, | |
268 | integer err_freq=-1, | |
269 | bit [1:0] merr=~0, | |
270 | integer burst_len=-1, | |
271 | integer burst_freq=-1, | |
272 | bit [7:0] tid=~0) | |
273 | { | |
274 | error("BaseAsmToVeraIntf::DTLB_err_enable should not be called for this bench! Check your diag.\n"); | |
275 | } | |
276 | ||
277 | task ITLB_err_enable(bit [2:0] err_type=~0, | |
278 | integer err_freq=-1, | |
279 | bit [1:0] merr=~0, | |
280 | integer burst_len=-1, | |
281 | integer burst_freq=-1, | |
282 | bit [7:0] tid=~0) | |
283 | { | |
284 | error("BaseAsmToVeraIntf::ITLB_err_enable should not be called for this bench! Check your diag.\n"); | |
285 | } | |
286 | ||
287 | task DC_err_enable(bit [3:0] err_type=~0, | |
288 | integer err_freq=-1, | |
289 | bit [1:0] merr=~0, | |
290 | integer burst_len=-1, | |
291 | integer burst_freq=-1, | |
292 | bit [7:0] tid=~0) | |
293 | { | |
294 | error("BaseAsmToVeraIntf::DC_err_enable should not be called for this bench! Check your diag.\n"); | |
295 | } | |
296 | ||
297 | task IC_err_enable(bit [3:0] err_type=~0, | |
298 | integer err_freq=-1, | |
299 | bit [1:0] merr=~0, | |
300 | integer burst_len=-1, | |
301 | integer burst_freq=-1, | |
302 | bit [7:0] tid=~0) | |
303 | { | |
304 | error("BaseAsmToVeraIntf::IC_err_enable should not be called for this bench! Check your diag.\n"); | |
305 | } | |
306 | ||
307 | task STB_err_enable(bit [4:0] err_type=~0, | |
308 | integer err_freq=-1, | |
309 | bit [1:0] merr=~0, | |
310 | integer burst_len=-1, | |
311 | integer burst_freq=-1, | |
312 | bit [1:0] ue_en=~0, | |
313 | integer ce_wt=-1, | |
314 | bit [7:0] tid=~0) | |
315 | { | |
316 | error("BaseAsmToVeraIntf::STB_err_enable should not be called for this bench! Check your diag.\n"); | |
317 | } | |
318 | ||
319 | task L2C_err_enable(bit [5:0] err_type=~0, | |
320 | integer err_freq=-1, | |
321 | integer ce_wt=-1, | |
322 | integer nd_wt=-1, | |
323 | integer burst_len=-1, | |
324 | integer burst_freq=-1, | |
325 | bit [7:0] tid=~0) | |
326 | { | |
327 | error("BaseAsmToVeraIntf::L2C_err_enable should not be called for this bench! Check your diag.\n"); | |
328 | } | |
329 | task IRF_err_enable(bit [2:0] err_type=~0, | |
330 | integer err_freq=-1, | |
331 | integer ce_wt=-1, | |
332 | reg [1:0] merr=~0, | |
333 | integer burst_len=-1, | |
334 | integer burst_freq=-1, | |
335 | bit [7:0] tid=~0) | |
336 | { | |
337 | error("BaseAsmToVeraIntf::IRF_err_enable should not be called for this bench! Check your diag.\n"); | |
338 | } | |
339 | ||
340 | task FRF_err_enable(bit [2:0] err_type=~0, | |
341 | integer err_freq=-1, | |
342 | integer ce_wt=-1, | |
343 | reg [1:0] merr=~0, | |
344 | integer burst_len=-1, | |
345 | integer burst_freq=-1, | |
346 | bit [7:0] tid=~0) | |
347 | { | |
348 | error("BaseAsmToVeraIntf::FRF_err_enable should not be called for this bench! Check your diag.\n"); | |
349 | } | |
350 | ||
351 | ||
352 | task MRA_err_enable(bit [1:0] err_type=~0, | |
353 | integer err_freq=-1, | |
354 | reg [7:0] mra_entry=~0, | |
355 | reg [1:0] wr_en=~0, | |
356 | integer burst_len=-1, | |
357 | integer burst_freq=-1, | |
358 | bit [7:0] tid=~0) | |
359 | { | |
360 | error("BaseAsmToVeraIntf::MRA_err_enable should not be called for this bench! Check your diag.\n"); | |
361 | } | |
362 | ||
363 | task SCA_err_enable(integer err_freq=-1, | |
364 | integer ce_wt=-1, | |
365 | integer burst_len=-1, | |
366 | integer burst_freq=-1, | |
367 | bit [7:0] tid=~0) | |
368 | { | |
369 | error("BaseAsmToVeraIntf::SCA_err_enable should not be called for this bench! Check your diag.\n"); | |
370 | } | |
371 | ||
372 | task TSA_err_enable(bit [1:0] err_type=~0, | |
373 | integer err_freq=-1, | |
374 | reg [6:0] tsa_entry=~0, | |
375 | reg [1:0] wr_en=~0, | |
376 | integer ce_wt=-1, | |
377 | integer burst_len=-1, | |
378 | integer burst_freq=-1, | |
379 | bit [7:0] tid=~0) | |
380 | { | |
381 | error("BaseAsmToVeraIntf::TSA_err_enable should not be called for this bench! Check your diag.\n"); | |
382 | } | |
383 | ||
384 | task TCC_err_enable(bit [1:0] err_type=~0, | |
385 | integer err_freq=-1, | |
386 | integer ce_wt=-1, | |
387 | integer burst_len=-1, | |
388 | integer burst_freq=-1, | |
389 | bit [7:0] tid=~0) | |
390 | { | |
391 | error("BaseAsmToVeraIntf::TCC_err_enable should not be called for this bench! Check your diag.\n"); | |
392 | } | |
393 | ||
394 | ||
395 | task registerSlam(string registerName, | |
396 | reg[127:0] value, | |
397 | reg[63:0] tidMask) | |
398 | { | |
399 | #include "registerSlam.vri" | |
400 | } | |
401 | ||
402 | // any bench that uses this will have to provide the code it wants. Othwise | |
403 | // nothing happes. | |
404 | task marker(string what, reg [5:0] fromTid, reg [63:0] pc) | |
405 | { | |
406 | // no error msg | |
407 | } | |
408 | ||
409 | task reset_now(string what) | |
410 | { | |
411 | // no error msg | |
412 | } | |
413 | ||
414 | task set_StartPEUTest () | |
415 | { | |
416 | error("BaseAsmToVeraIntf::set_StartPEUTest should not be called for this bench! Check your diag.\n"); | |
417 | } | |
418 | ||
419 | ||
420 | task EnablePCIeEgCmd (string cmdType, | |
421 | bit [63:0] addr, | |
422 | bit [31:0] txLen, | |
423 | bit [31:0] startData, | |
424 | string err) | |
425 | { | |
426 | error("BaseAsmToVeraIntf::EnablePCIeEgCmd should not be called for this bench! Check your diag.\n"); | |
427 | } | |
428 | ||
429 | task EnablePCIeIgCmd (string cmdType, | |
430 | bit [63:0] StartAddr, | |
431 | bit [63:0] EndAddr, | |
432 | // bit [31:0] txLen, | |
433 | string txLen, | |
434 | bit [31:0] NumCmds, | |
435 | string err) | |
436 | { | |
437 | error("BaseAsmToVeraIntf::EnablePCIeIgCmd should not be called for this bench! Check your diag.\n"); | |
438 | } | |
439 | ||
440 | ||
441 | task watchDebugReg(integer which, integer wait=0, | |
442 | reg verbose=0, reg [1:0] checkValue) { | |
443 | error("BaseAsmToVeraIntf::watchAsiOverlapMode should not be called for this bench! Check your diag.\n"); | |
444 | } | |
445 | ||
446 | task spc_warm_reset() | |
447 | { | |
448 | error("BaseAsmToVeraIntf::spc_warm_reset should not be called for this bench! Check your diag.\n"); | |
449 | } | |
450 | ||
451 | ||
452 | } |