Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / vera / classes / sparcParams.vrh
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: sparcParams.vrh
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
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32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifndef INC__TMP_PARAMSCLASS_VRH
36#define INC__TMP_PARAMSCLASS_VRH
37
38extern class Params extends BaseParams {
39 string paramPath = null;
40 string paramFile = null;
41 string forceParamFile = null;
42 string dv_root = null;
43
44 string veraDiagName = null;
45 string asmDiagName = null;
46
47
48 // SPC2 specific
49 reg l2latOn;
50 reg l2lat_fixed;
51 integer l2lat_value;
52 reg stub_l1_enable;
53 reg [7:0] min_ccx_gnt_delay;
54 reg [7:0] max_ccx_gnt_delay;
55 reg rand_ccx_gnt_enable;
56 string l2lat_in;
57 integer FPl2lat;
58
59 reg noDebugDrv;
60 reg noDebugChecks;
61 reg noDebugModes;
62 reg showDebugCounts;
63 reg wmrVecMask;
64 integer ssModeFreq;
65 integer ssModeMaxSessions;
66 integer ssModeInterleaveWeight;
67 reg [7:0] ssModeTidMask;
68 integer ssModeMin;
69 integer ssModeMax;
70 integer ssModeBurstMin;
71 integer ssModeBurstMax;
72 integer ssModeHolesMin;
73 integer ssModeHolesMax;
74 integer doModeFreq;
75 integer doModeMaxSessions;
76 reg [7:0] doModeTidMask;
77 integer doModeLenMin;
78 integer doModeLenMax;
79 integer softStopFreq;
80 integer softStopMaxSessions;
81 reg [7:0] softStopTidMask;
82 integer softStopLenMin;
83 integer softStopLenMax;
84 reg nodebugParkExit;
85
86
87 reg ccxPktPrint [5];
88 reg [16:0] ccxPktPrintMask;
89 reg ccxPktPrintOn;
90 reg mcuMemPrint [2];
91 reg mcuMemPrintOn;
92
93 reg [63:0] coreAvilableReg;
94 reg [63:0] coreEnableReg;
95 reg [7:0] coreAvilable;
96 reg [7:0] coreEnable;
97 reg [2:0] coreMax;
98 reg [3:0] bank_set_mask;
99 reg [7:0] banksMask;
100
101 integer mcuReq2ackDelayMin;
102 integer mcuReq2ackDelayMax;
103 integer mcuAck2dataDelayMin;
104 integer mcuAck2dataDelayMax;
105 integer mcuIntraDataDelayMin;
106 integer mcuIntraDataDelayMax;
107 integer mcuWrReq2ackDelayMin;
108 integer mcuWrReq2ackDelayMax;
109 integer mcuWrReq2ackFullDelay;
110
111 reg [7:0] enableSpcBFM;
112 reg [7:0] enableMemBFM;
113
114 integer stallStart; // start stalling when this many outstanding requests
115 integer stallStop; // stop stalling when this many outstanding requests
116 integer hitRate; // percent of time that shorter "hit" latencies will be used
117 integer hitDelayMin; // min value of latency if "hit"
118 integer hitDelayMax; // max value of latency if "hit"
119 integer missDelayMin; // min value of latency if NOT "hit"
120 integer missDelayMax; // max value of latency if NOT "hit"
121 integer pkt2DelayMin; // min value of latency for second pkt of pair
122 integer pkt2DelayMax; // max value of latency for second pkt of pair
123
124 integer evictFloodFreq;
125 integer evictFloodAmount;
126 reg [7:0] evictFloodTargets;
127 integer bufferFloodFreq;
128 integer bufferFloodAmount;
129 integer bufferFloodTarget;
130
131 integer burstAmount;
132 integer burstHoldoff;
133 integer burstSync;
134
135 reg hash_on;
136 integer por_delay_min;
137 integer por_delay_max;
138 reg show_store;
139 reg show_load;
140 integer inval_rate;
141 reg [2:0] inval_type;
142 reg[39:0] inval_pa_min;
143 reg[39:0] inval_pa_max;
144 reg [1:0] l2miss_type;
145
146 integer intr_tid;
147 integer intr_delay;
148 integer intr_wait;
149 reg [1:0] intr_type;
150 reg [5:0] intr_vect;
151 reg [63:0] intr_en;
152
153 integer maxCycle; // max clks
154 integer timeOut; // idle
155
156 // POR/WMR
157 reg por_enable;
158 reg lbist_enable;
159 reg [2:0] mbist_mode;
160 reg mbist_enable;
161 reg mbist_errinj;
162 reg [7:0] user_loop_count;
163 reg user_loop_mode;
164 reg [15:0] lbist_abort_count;
165 reg [2:0] lbist_run_count;
166 reg lbist_pgm;
167 reg [23:0] mbist_fail_count;
168
169 //err
170 integer err_freq;
171 integer err_burst_freq;
172 integer err_burst_len_min;
173 integer err_burst_len_max;
174 integer err_ce_wt;
175 integer err_nd_wt;
176 reg rand_err;
177
178 reg err_itlb_on;
179 integer err_itlb_freq;
180
181 reg err_dtlb_on;
182 integer err_dtlb_freq;
183
184 reg err_ic_on;
185 integer err_ic_freq;
186
187 reg err_dc_on;
188 integer err_dc_freq;
189
190 reg err_irf_on;
191 integer err_irf_freq;
192
193 reg err_frf_on;
194 integer err_frf_freq;
195
196 reg err_stb_on;
197 integer err_stb_freq;
198
199 reg err_sca_on;
200 integer err_sca_freq;
201
202 reg err_tcc_on;
203 integer err_tcc_freq;
204
205 reg err_tsa_on;
206 integer err_tsa_freq;
207
208 reg err_mra_on;
209 integer err_mra_freq;
210
211 reg err_l2c_on;
212 integer err_l2c_freq;
213
214 reg err_mamem_on;
215 integer err_mamem_freq;
216
217 // Coverage Vars
218 reg coverage_on;
219 reg coverage_off;
220 reg force_save_cov;
221
222 reg [63:0] finishMask;
223
224 reg forcePORstate;
225
226 task new (
227 StandardDisplay dbgin
228 );
229 task getCfg (
230 string fileName = null
231 );
232 task check4conflict (
233 );
234}
235
236#endif