Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / verilog / checkers / l2tcpx / l2t_cpx_checker.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: l2t_cpx_checker.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
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34// ========== Copyright Header End ============================================
35`ifdef FC_BENCH
36 `define TB_TOP tb_top
37`else
38`ifdef CCM
39 `define TB_TOP tb_top
40`else
41 `define TB_TOP l2sat_top
42`endif
43`endif
44
45
46`define cpx_bnk0_coren_req `TB_TOP.cpu.sctag0_cpx_req_cq[7:0]
47`define cpx_bnk0_core0_req `TB_TOP.cpu.sctag0_cpx_req_cq[0]
48`define cpx_bnk0_core1_req `TB_TOP.cpu.sctag0_cpx_req_cq[1]
49`define cpx_bnk0_core2_req `TB_TOP.cpu.sctag0_cpx_req_cq[2]
50`define cpx_bnk0_core3_req `TB_TOP.cpu.sctag0_cpx_req_cq[3]
51`define cpx_bnk0_core4_req `TB_TOP.cpu.sctag0_cpx_req_cq[4]
52`define cpx_bnk0_core5_req `TB_TOP.cpu.sctag0_cpx_req_cq[5]
53`define cpx_bnk0_core6_req `TB_TOP.cpu.sctag0_cpx_req_cq[6]
54`define cpx_bnk0_core7_req `TB_TOP.cpu.sctag0_cpx_req_cq[7]
55
56`define cpx_bnk0_core0_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[0]
57`define cpx_bnk0_core1_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[1]
58`define cpx_bnk0_core2_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[2]
59`define cpx_bnk0_core3_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[3]
60`define cpx_bnk0_core4_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[4]
61`define cpx_bnk0_core5_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[5]
62`define cpx_bnk0_core6_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[6]
63`define cpx_bnk0_core7_gnt `TB_TOP.cpu.cpx_sctag0_grant_cx[7]
64
65`define cpx_atm0 `TB_TOP.cpu.sctag0_cpx_atom_cq
66
67`define cpx_valid0 `TB_TOP.cpu.sctag0_cpx_data_ca[145]
68`define cpx_bnk0_rtntyp `TB_TOP.cpu.sctag0_cpx_data_ca[144:141]
69`define cpx_bnk0_l2miss `TB_TOP.cpu.sctag0_cpx_data_ca[140]
70`define cpx_bnk0_err `TB_TOP.cpu.sctag0_cpx_data_ca[139:138]
71`define cpx_bnk0_nc `TB_TOP.cpu.sctag0_cpx_data_ca[137]
72`define cpx_bnk0_thrid `TB_TOP.cpu.sctag0_cpx_data_ca[136:134]
73`define cpx_bnk0_wv `TB_TOP.cpu.sctag0_cpx_data_ca[133]
74`define cpx_bnk0_mmuid `TB_TOP.cpu.sctag0_cpx_data_ca[132:131]
75`define cpx_bnk0_f4b `TB_TOP.cpu.sctag0_cpx_data_ca[130]
76`define cpx_bnk0_if2 `TB_TOP.cpu.sctag0_cpx_data_ca[129]
77`define cpx_bnk0_pf `TB_TOP.cpu.sctag0_cpx_data_ca[128]
78
79`define clk `TB_TOP.cpu.l2clk
80`define rst_n `TB_TOP.reset
81
82`define LOADACK 4'b0000
83`define IFILLACK1 4'b0001 //First part
84`define IFILLACK2 4'b0001 //Second part
85`define STOREACK 4'b0100
86`define ICACHEINV 4'b0100
87`define DCACHEINV 4'b0100
88`define DIAGSTOREACK 4'b0100
89`define CASRTN 4'b0000 //Load return
90`define CASACK 4'b0100 //Store return
91`define SWAPRTN 4'b0000 //Load return
92`define SWAPACK 4'b0100 //Store return
93`define STRLDRTN 4'b0010 //Load return
94`define STRSTACK 4'b0110 //Store return
95`define EVICTINV 4'b0011
96`define ERRORINDL2 4'b1100 //L2 error indication
97`define MMULDRTN 4'b0101 //L2 error indication
98
99`define BANK0 3'b000
100`define BANK1 3'b001
101`define BANK2 3'b010
102`define BANK3 3'b011
103`define BANK4 3'b100
104`define BANK5 3'b101
105`define BANK6 3'b110
106`define BANK7 3'b111
107
108`define CPU0 3'b000
109`define CPU1 3'b001
110`define CPU2 3'b010
111`define CPU3 3'b011
112`define CPU4 3'b100
113`define CPU5 3'b101
114`define CPU6 3'b110
115`define CPU7 3'b111
116
117module l2t_cpx_checker(); // top level module l2_cpx_protocol
118
119reg [7:0] l2t_cpx_req_delay;
120reg req2core_d;
121reg cpx_atm_d;
122reg cpx_atm_d_bnk0_core0;
123reg cpx_atm_d_bnk0_core1;
124reg cpx_atm_d_bnk0_core2;
125reg cpx_atm_d_bnk0_core3;
126reg cpx_atm_d_bnk0_core4;
127reg cpx_atm_d_bnk0_core5;
128reg cpx_atm_d_bnk0_core6;
129reg cpx_atm_d_bnk0_core7;
130
131wire req2core, qual_data_valid;
132wire cpx_valid0_l;
133wire reqOrAtm;
134
135always @(posedge `clk) begin
136 l2t_cpx_req_delay[7:0] <= `cpx_bnk0_coren_req; //delayed signal needed to even out glitches
137 req2core_d <= req2core;
138 cpx_atm_d_bnk0_core0 <= `cpx_atm0 & `cpx_bnk0_core0_req;
139 cpx_atm_d_bnk0_core1 <= `cpx_atm0 & `cpx_bnk0_core1_req;
140 cpx_atm_d_bnk0_core2 <= `cpx_atm0 & `cpx_bnk0_core2_req;
141 cpx_atm_d_bnk0_core3 <= `cpx_atm0 & `cpx_bnk0_core3_req;
142 cpx_atm_d_bnk0_core4 <= `cpx_atm0 & `cpx_bnk0_core4_req;
143 cpx_atm_d_bnk0_core5 <= `cpx_atm0 & `cpx_bnk0_core5_req;
144 cpx_atm_d_bnk0_core6 <= `cpx_atm0 & `cpx_bnk0_core6_req;
145 cpx_atm_d_bnk0_core7 <= `cpx_atm0 & `cpx_bnk0_core7_req;
146end
147
148assign req2core = `cpx_bnk0_core0_req | `cpx_bnk0_core1_req | `cpx_bnk0_core2_req | `cpx_bnk0_core3_req |
149 `cpx_bnk0_core4_req | `cpx_bnk0_core5_req | `cpx_bnk0_core6_req | `cpx_bnk0_core7_req;
150assign cpx_valid0_l = `cpx_valid0;
151assign qual_data_valid = req2core_d & cpx_valid0_l;
152assign reqOrAtm = cpx_atm_d | `cpx_bnk0_core0_req;
153
154//every req has to followed by a data valid
155//Check that return type is valid in the packet
156//since l2t some time's keeps driving the ccx
157//we need to qualify this
158/*
159 0in value -var `cpx_bnk0_rtntyp
160 -val `LOADACK `IFILLACK1 `IFILLACK2 `STOREACK `ICACHEINV `DCACHEINV `DIAGSTOREACK `CASRTN `CASACK `SWAPRTN `SWAPACK `SWAPACK `STRLDRTN `STRSTACK `EVICTINV `ERRORINDL2 `MMULDRTN
161 -active qual_data_valid
162 -name cpx_rtn_typ_chk
163 -message "cpx does not have a valid return type"
164 -module cpu
165 -clock `clk
166*/
167
168//if it is a mmuld then nc bit has to be one
169/*
170 0in value -var `cpx_bnk0_nc
171 -val 1'b1
172 -active (`cpx_bnk0_rtntyp == `MMULDRTN)
173 -name mmuld_nc_set2_0
174 -message "mmuld packet does not have the nc bit set to 0"
175 -module cpu
176 -clock `clk
177*/
178
179//if it is a prefetch then nc bit has to be one
180/*
181 0in value -var `cpx_bnk0_nc
182 -val 1'b1
183 -active ((`cpx_bnk0_rtntyp == `LOADACK) & (`cpx_bnk0_pf == 1'b1))
184 -name prefetch_nc_set2_0
185 -message "prefectch packet does not have the nc bit set to 0"
186 -module cpu
187 -clock `clk
188*/
189
190//if it is a atomic then nc bit has to be set to one
191/*
192 0in value -var `cpx_bnk0_nc
193 -val 1'b1
194 -active (((`cpx_bnk0_rtntyp == `CASRTN) | (`cpx_bnk0_rtntyp == `CASACK)) & (`cpx_bnk0_if2 == 1'b1))
195 -name atomic_nc_set2_0
196 -message "atomic packet does not have the nc bit set to 0"
197 -module cpu
198 -clock `clk
199*/
200
201
202//if it is evict invalidation or l2 error then the l2miss bit should be set
203//zero
204/*
205 0in value -var `cpx_bnk0_l2miss
206 -val 1'b1
207 -active (((`cpx_bnk0_rtntyp == `EVICTINV) | (`cpx_bnk0_rtntyp == `ERRORINDL2)) & (`cpx_bnk0_pf == 1'b1))
208 -name evict_error_l2miss_set_0
209 -message "Eviction packet on the l2 error packet has the L2 miss bit set"
210 -module cpu
211 -clock `clk
212*/
213//every req should be followed by a gnt
214/*
215 x0in assert_follower -leader (`cpx_bnk0_core0_req | cpx_atm_d_bnk0_core0)
216 -follower `cpx_bnk0_core0_gnt
217 -known_follower
218 -min 1
219 -max_leader 64
220 -name cpx_bnk0_core0_req
221 -module cpu
222 -clock `clk
223 -message "req was not followed by a gnt"
224*/
225/*
226 x0in assert_follower -leader (`cpx_bnk0_core1_req | cpx_atm_d_bnk0_core1)
227 -follower `cpx_bnk0_core1_gnt
228 -known_follower
229 -min 1
230 -max_leader 64
231 -name cpx_bnk0_core1_req
232 -module cpu
233 -clock `clk
234 -message "req was not followed by a gnt"
235*/
236/*
237 x0in assert_follower -leader (`cpx_bnk0_core2_req | cpx_atm_d_bnk0_core2)
238 -follower `cpx_bnk0_core2_gnt
239 -known_follower
240 -min 1
241 -max_leader 64
242 -name cpx_bnk0_core2_req
243 -module cpu
244 -clock `clk
245 -message "req was not followed by a gnt"
246*/
247/*
248 x0in assert_follower -leader (`cpx_bnk0_core3_req | cpx_atm_d_bnk0_core3)
249 -follower `cpx_bnk0_core3_gnt
250 -known_follower
251 -min 1
252 -max_leader 64
253 -name cpx_bnk0_core3_req
254 -module cpu
255 -clock `clk
256 -message "req was not followed by a gnt"
257*/
258/*
259 x0in assert_follower -leader (`cpx_bnk0_core4_req | cpx_atm_d_bnk0_core4)
260 -follower `cpx_bnk0_core4_gnt
261 -known_follower
262 -min 1
263 -max_leader 64
264 -name cpx_bnk0_core4_req
265 -module cpu
266 -clock `clk
267 -message "req was not followed by a gnt"
268*/
269/*
270 x0in assert_follower -leader (`cpx_bnk0_core5_req | cpx_atm_d_bnk0_core5)
271 -follower `cpx_bnk0_core5_gnt
272 -known_follower
273 -min 1
274 -max_leader 64
275 -name cpx_bnk0_core5_req
276 -module cpu
277 -clock `clk
278 -message "req was not followed by a gnt"
279*/
280/*
281 x0in assert_follower -leader (`cpx_bnk0_core6_req | cpx_atm_d_bnk0_core6)
282 -follower `cpx_bnk0_core6_gnt
283 -known_follower
284 -min 1
285 -max_leader 64
286 -name cpx_bnk0_core6_req
287 -module cpu
288 -clock `clk
289 -message "req was not followed by a gnt"
290*/
291/*
292 x0in assert_follower -leader (`cpx_bnk0_core7_req | cpx_atm_d_bnk0_core7)
293 -follower `cpx_bnk0_core7_gnt
294 -known_follower
295 -min 1
296 -max_leader 64
297 -name cpx_bnk0_core7_req
298 -module cpu
299 -clock `clk
300 -message "req was not followed by a gnt"
301*/
302
303
304
305endmodule //end top level module protocol check
306