Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / verilog / checkers / siudmu / dmu_siu_ras_chkr.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: dmu_siu_ras_chkr.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
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27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
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30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifdef SIU
36`define TOP siu_top
37`define TB_RST siu_top.reset
38`else
39`define TOP tb_top
40`define TB_RST tb_top.reset
41`endif
42module dmu_siu_ras_chkr();
43
44reg no_dmusiu_ras_chk ;
45initial begin // {
46 @(posedge `TOP.cpu.sii.iol2clk) ;
47 if ($test$plusargs("ios_0in_ras_chk_off"))
48 no_dmusiu_ras_chk <= 1;
49 else
50 no_dmusiu_ras_chk <= 0;
51end //}
52
53// 0in disable_checker no_dmusiu_ras_chk -name cpu.dmu_sii*parity*
54// 0in disable_checker no_dmusiu_ras_chk -name cpu.dmu_sii_ctag*
55// 0in disable_checker no_dmusiu_ras_chk -name cpu.sio_dmu_ctag*
56// 0in disable_checker no_dmusiu_ras_chk -name cpu.sio_dmu_data*parity*
57
58// set this to -constraint to constrain input signals to SIU
59`define SIU_CONSTRAINT
60// set this to -constraint to constrain input signals to DMU
61`define DMU_CONSTRAINT
62
63// 0in set_clock -default iol2clk -module sii
64
65///////////////////////////////////////////////////////////////////////////////
66// Check that all interface signals are not X or Z. This check can be disabled
67// by not including the +define+X_GUARD arg on the command line.
68///////////////////////////////////////////////////////////////////////////////
69`ifdef X_GUARD
70 // 0in known_driven -var dmu_sii_hdr_vld -name dmu_sii_hdr_vld_x_guard -module cpu
71 // 0in known_driven -var dmu_sii_reqbypass -name dmu_sii_reqbypass_x_guard -module cpu
72 // 0in known_driven -var dmu_sii_datareq -name dmu_sii_datareq_x_guard -module cpu
73 // 0in known_driven -var dmu_sii_datareq16 -name dmu_sii_datareq16_x_guard -module cpu
74 // 0in known_driven -var dmu_sii_data -name dmu_sii_data_x_guard -module cpu
75 // 0in known_driven -var dmu_sii_parity -name dmu_sii_parity_x_guard -module cpu
76 // 0in known_driven -var dmu_sii_be -name dmu_sii_be_x_guard -module cpu
77 // 0in known_driven -var sii_dmu_wrack_vld -name sii_dmu_wrack_vld_x_guard -module cpu
78 // 0in known_driven -var sii_dmu_wrack_tag -name sii_dmu_wrack_tag_x_guard -module cpu
79
80 // 0in known_driven -var sio_dmu_hdr_vld -name sio_dmu_hdr_vld_x_guard -module cpu
81 // 0in known_driven -var sio_dmu_data -name sio_dmu_data_x_guard -module cpu
82 // 0in known_driven -var sio_dmu_parity -name sio_dmu_parity_x_guard -module cpu
83`endif
84
85/*************************************************************************
86*
87* DMU -> SII
88* Check for data parity, address parity, ctag ecc, command parity
89* For write and for interrupt write
90*
91**************************************************************************/
92
93/* 0in odd_parity
94 -var {dmu_sii_data[127:122], ^ dmu_sii_data[62]}
95 -active (dmu_sii_hdr_vld && ~no_dmusiu_ras_chk)
96 -module cpu
97 -name dmu_sii_command_parity
98*/
99
100/* 0in odd_parity
101 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31],dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39], ^ dmu_sii_data[84]}
102 -active (dmu_sii_hdr_vld && ~no_dmusiu_ras_chk)
103 -module cpu
104 -name dmu_sii_addr_parity_oddbits
105*/
106
107/* 0in odd_parity
108 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30],dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38], ^ dmu_sii_data[83]}
109 -active (dmu_sii_hdr_vld && ~no_dmusiu_ras_chk)
110 -module cpu
111 -name dmu_sii_addr_parity_evenbits
112*/
113
114wire p0 = (`TOP.cpu.dmu_sii_data[64] ^ `TOP.cpu.dmu_sii_data[65] ^ `TOP.cpu.dmu_sii_data[67] ^ `TOP.cpu.dmu_sii_data[68] ^ `TOP.cpu.dmu_sii_data[70] ^ `TOP.cpu.dmu_sii_data[72] ^ `TOP.cpu.dmu_sii_data[74] ^ `TOP.cpu.dmu_sii_data[75] ^ `TOP.cpu.dmu_sii_data[77] ^ `TOP.cpu.dmu_sii_data[79]);
115
116/* 0in custom
117 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(p0 == dmu_sii_data[56]))
118 -message "ctag error for dmu_sii: p0 does not equal c0"
119 -module cpu
120 -name dmu_sii_ctag_ecc_p0
121*/
122
123wire p1 = (`TOP.cpu.dmu_sii_data[64] ^ `TOP.cpu.dmu_sii_data[66] ^ `TOP.cpu.dmu_sii_data[67] ^ `TOP.cpu.dmu_sii_data[69] ^ `TOP.cpu.dmu_sii_data[70] ^ `TOP.cpu.dmu_sii_data[73] ^ `TOP.cpu.dmu_sii_data[74] ^ `TOP.cpu.dmu_sii_data[76] ^ `TOP.cpu.dmu_sii_data[77]);
124
125/* 0in custom
126 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(p1 == dmu_sii_data[57]))
127 -message "ctag error for dmu_sii: p1 does not equal c1"
128 -module cpu
129 -name dmu_sii_ctag_ecc_p1
130*/
131
132wire p2 = (`TOP.cpu.dmu_sii_data[65] ^ `TOP.cpu.dmu_sii_data[66] ^ `TOP.cpu.dmu_sii_data[67] ^ `TOP.cpu.dmu_sii_data[71] ^ `TOP.cpu.dmu_sii_data[72] ^ `TOP.cpu.dmu_sii_data[73] ^ `TOP.cpu.dmu_sii_data[74] ^ `TOP.cpu.dmu_sii_data[78] ^ `TOP.cpu.dmu_sii_data[79]);
133
134/* 0in custom
135 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(p2 == dmu_sii_data[58]))
136 -message "ctag error for dmu_sii: p2 does not equal c2"
137 -module cpu
138 -name dmu_sii_ctag_ecc_p2
139*/
140
141wire p3 = (`TOP.cpu.dmu_sii_data[68] ^ `TOP.cpu.dmu_sii_data[69] ^ `TOP.cpu.dmu_sii_data[70] ^ `TOP.cpu.dmu_sii_data[71] ^ `TOP.cpu.dmu_sii_data[72] ^ `TOP.cpu.dmu_sii_data[73] ^ `TOP.cpu.dmu_sii_data[74]);
142
143/* 0in custom
144 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(p3 == dmu_sii_data[59]))
145 -message "ctag error for dmu_sii: p3 does not equal c3"
146 -module cpu
147 -name dmu_sii_ctag_ecc_p3
148*/
149
150wire p4 = (`TOP.cpu.dmu_sii_data[75] ^ `TOP.cpu.dmu_sii_data[76] ^ `TOP.cpu.dmu_sii_data[77] ^ `TOP.cpu.dmu_sii_data[78] ^ `TOP.cpu.dmu_sii_data[79]);
151
152/* 0in custom
153 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(p4 == dmu_sii_data[60]))
154 -message "ctag error for dmu_sii: p4 does not equal c4"
155 -module cpu
156 -name dmu_sii_ctag_ecc_p4
157*/
158
159wire dmu_sii_p5 = (`TOP.cpu.dmu_sii_data[64] ^ `TOP.cpu.dmu_sii_data[65] ^ `TOP.cpu.dmu_sii_data[66] ^ `TOP.cpu.dmu_sii_data[68] ^ `TOP.cpu.dmu_sii_data[69] ^ `TOP.cpu.dmu_sii_data[71] ^ `TOP.cpu.dmu_sii_data[74] ^ `TOP.cpu.dmu_sii_data[75] ^ `TOP.cpu.dmu_sii_data[76] ^ `TOP.cpu.dmu_sii_data[78]);
160
161/* 0in custom
162 -fire (($0in_rising_edge(dmu_sii_hdr_vld)) && !(dmu_sii_p5 == dmu_sii_data[61]))
163 -message "ctag error for dmu_sii: p5 does not equal c5"
164 -module cpu
165 -name dmu_sii_ctag_ecc_p5
166*/
167
168/* 0in odd_parity
169 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30], ^ dmu_sii_parity[0]}
170 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
171 -module cpu
172 -reset `TB_RST
173 -name dmu_sii_data0_parity_even_byte0
174*/
175
176/* 0in odd_parity
177 -var {dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38],dmu_sii_data[40],dmu_sii_data[42],dmu_sii_data[44],dmu_sii_data[46],dmu_sii_data[48],dmu_sii_data[50],dmu_sii_data[52],dmu_sii_data[54],dmu_sii_data[56],dmu_sii_data[58],dmu_sii_data[60],dmu_sii_data[62], ^ dmu_sii_parity[2]}
178 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
179 -module cpu
180 -reset `TB_RST
181 -name dmu_sii_data0_parity_even_byte16
182*/
183
184/* 0in odd_parity
185 -var {dmu_sii_data[64],dmu_sii_data[66],dmu_sii_data[68],dmu_sii_data[70],dmu_sii_data[72],dmu_sii_data[74],dmu_sii_data[76],dmu_sii_data[78],dmu_sii_data[80],dmu_sii_data[82],dmu_sii_data[84],dmu_sii_data[86],dmu_sii_data[88],dmu_sii_data[90],dmu_sii_data[92],dmu_sii_data[94], ^ dmu_sii_parity[4]}
186 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
187 -module cpu
188 -reset `TB_RST
189 -name dmu_sii_data0_parity_even_byte32
190*/
191
192/* 0in odd_parity
193 -var {dmu_sii_data[96],dmu_sii_data[98],dmu_sii_data[100],dmu_sii_data[102],dmu_sii_data[104],dmu_sii_data[106],dmu_sii_data[108],dmu_sii_data[110],dmu_sii_data[112],dmu_sii_data[114],dmu_sii_data[116],dmu_sii_data[118],dmu_sii_data[120],dmu_sii_data[122],dmu_sii_data[124],dmu_sii_data[126], ^ dmu_sii_parity[6]}
194 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
195 -module cpu
196 -reset `TB_RST
197 -name dmu_sii_data0_parity_even_byte48
198*/
199
200/* 0in odd_parity
201 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31], ^ dmu_sii_parity[1]}
202 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
203 -module cpu
204 -reset `TB_RST
205 -name dmu_sii_data0_parity_odd_byte0
206*/
207
208/* 0in odd_parity
209 -var {dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39],dmu_sii_data[41],dmu_sii_data[43],dmu_sii_data[45],dmu_sii_data[47],dmu_sii_data[49],dmu_sii_data[51],dmu_sii_data[53],dmu_sii_data[55],dmu_sii_data[57],dmu_sii_data[59],dmu_sii_data[61],dmu_sii_data[63], ^ dmu_sii_parity[3]}
210 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
211 -module cpu
212 -reset `TB_RST
213 -name dmu_sii_data0_parity_odd_byte16
214*/
215
216/* 0in odd_parity
217 -var {dmu_sii_data[65],dmu_sii_data[67],dmu_sii_data[69],dmu_sii_data[71],dmu_sii_data[73],dmu_sii_data[75],dmu_sii_data[77],dmu_sii_data[79],dmu_sii_data[81],dmu_sii_data[83],dmu_sii_data[85],dmu_sii_data[87],dmu_sii_data[89],dmu_sii_data[91],dmu_sii_data[93],dmu_sii_data[95], ^ dmu_sii_parity[5]}
218 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
219 -module cpu
220 -reset `TB_RST
221 -name dmu_sii_data0_parity_odd_byte32
222*/
223
224/* 0in odd_parity
225 -var {dmu_sii_data[97],dmu_sii_data[99],dmu_sii_data[101],dmu_sii_data[103],dmu_sii_data[105],dmu_sii_data[107],dmu_sii_data[109],dmu_sii_data[111],dmu_sii_data[113],dmu_sii_data[115],dmu_sii_data[117],dmu_sii_data[119],dmu_sii_data[121],dmu_sii_data[123],dmu_sii_data[125],dmu_sii_data[127], ^ dmu_sii_parity[7]}
226 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && !$0in_falling_edge(dmu_sii_datareq16))
227 -module cpu
228 -reset `TB_RST
229 -name dmu_sii_data0_parity_odd_byte48
230*/
231
232/* 0in odd_parity
233 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30], ^ dmu_sii_parity[0]}
234 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
235 -module cpu
236 -reset `TB_RST
237 -name dmu_sii_data1_parity_even_byte0
238*/
239
240/* 0in odd_parity
241 -var {dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38],dmu_sii_data[40],dmu_sii_data[42],dmu_sii_data[44],dmu_sii_data[46],dmu_sii_data[48],dmu_sii_data[50],dmu_sii_data[52],dmu_sii_data[54],dmu_sii_data[56],dmu_sii_data[58],dmu_sii_data[60],dmu_sii_data[62], ^ dmu_sii_parity[2]}
242 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
243 -module cpu
244 -reset `TB_RST
245 -name dmu_sii_data1_parity_even_byte16
246*/
247
248/* 0in odd_parity
249 -var {dmu_sii_data[64],dmu_sii_data[66],dmu_sii_data[68],dmu_sii_data[70],dmu_sii_data[72],dmu_sii_data[74],dmu_sii_data[76],dmu_sii_data[78],dmu_sii_data[80],dmu_sii_data[82],dmu_sii_data[84],dmu_sii_data[86],dmu_sii_data[88],dmu_sii_data[90],dmu_sii_data[92],dmu_sii_data[94], ^ dmu_sii_parity[4]}
250 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
251 -module cpu
252 -reset `TB_RST
253 -name dmu_sii_data1_parity_even_byte32
254*/
255
256/* 0in odd_parity
257 -var {dmu_sii_data[96],dmu_sii_data[98],dmu_sii_data[100],dmu_sii_data[102],dmu_sii_data[104],dmu_sii_data[106],dmu_sii_data[108],dmu_sii_data[110],dmu_sii_data[112],dmu_sii_data[114],dmu_sii_data[116],dmu_sii_data[118],dmu_sii_data[120],dmu_sii_data[122],dmu_sii_data[124],dmu_sii_data[126], ^ dmu_sii_parity[6]}
258 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
259 -module cpu
260 -reset `TB_RST
261 -name dmu_sii_data1_parity_even_byte48
262*/
263
264/* 0in odd_parity
265 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31], ^ dmu_sii_parity[1]}
266 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
267 -module cpu
268 -reset `TB_RST
269 -name dmu_sii_data1_parity_odd_byte0
270*/
271
272/* 0in odd_parity
273 -var {dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39],dmu_sii_data[41],dmu_sii_data[43],dmu_sii_data[45],dmu_sii_data[47],dmu_sii_data[49],dmu_sii_data[51],dmu_sii_data[53],dmu_sii_data[55],dmu_sii_data[57],dmu_sii_data[59],dmu_sii_data[61],dmu_sii_data[63], ^ dmu_sii_parity[3]}
274 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
275 -module cpu
276 -reset `TB_RST
277 -name dmu_sii_data1_parity_odd_byte16
278*/
279
280/* 0in odd_parity
281 -var {dmu_sii_data[65],dmu_sii_data[67],dmu_sii_data[69],dmu_sii_data[71],dmu_sii_data[73],dmu_sii_data[75],dmu_sii_data[77],dmu_sii_data[79],dmu_sii_data[81],dmu_sii_data[83],dmu_sii_data[85],dmu_sii_data[87],dmu_sii_data[89],dmu_sii_data[91],dmu_sii_data[93],dmu_sii_data[95], ^ dmu_sii_parity[5]}
282 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
283 -module cpu
284 -reset `TB_RST
285 -name dmu_sii_data1_parity_odd_byte32
286*/
287
288/* 0in odd_parity
289 -var {dmu_sii_data[97],dmu_sii_data[99],dmu_sii_data[101],dmu_sii_data[103],dmu_sii_data[105],dmu_sii_data[107],dmu_sii_data[109],dmu_sii_data[111],dmu_sii_data[113],dmu_sii_data[115],dmu_sii_data[117],dmu_sii_data[119],dmu_sii_data[121],dmu_sii_data[123],dmu_sii_data[125],dmu_sii_data[127], ^ dmu_sii_parity[7]}
290 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,1))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,1 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,1)))
291 -module cpu
292 -reset `TB_RST
293 -name dmu_sii_data1_parity_odd_byte48
294*/
295
296/* 0in odd_parity
297 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30], ^ dmu_sii_parity[0]}
298 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
299 -module cpu
300 -reset `TB_RST
301 -name dmu_sii_data2_parity_even_byte0
302*/
303
304/* 0in odd_parity
305 -var {dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38],dmu_sii_data[40],dmu_sii_data[42],dmu_sii_data[44],dmu_sii_data[46],dmu_sii_data[48],dmu_sii_data[50],dmu_sii_data[52],dmu_sii_data[54],dmu_sii_data[56],dmu_sii_data[58],dmu_sii_data[60],dmu_sii_data[62], ^ dmu_sii_parity[2]}
306 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
307 -module cpu
308 -reset `TB_RST
309 -name dmu_sii_data2_parity_even_byte16
310*/
311
312/* 0in odd_parity
313 -var {dmu_sii_data[64],dmu_sii_data[66],dmu_sii_data[68],dmu_sii_data[70],dmu_sii_data[72],dmu_sii_data[74],dmu_sii_data[76],dmu_sii_data[78],dmu_sii_data[80],dmu_sii_data[82],dmu_sii_data[84],dmu_sii_data[86],dmu_sii_data[88],dmu_sii_data[90],dmu_sii_data[92],dmu_sii_data[94], ^ dmu_sii_parity[4]}
314 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
315 -module cpu
316 -reset `TB_RST
317 -name dmu_sii_data2_parity_even_byte32
318*/
319
320/* 0in odd_parity
321 -var {dmu_sii_data[96],dmu_sii_data[98],dmu_sii_data[100],dmu_sii_data[102],dmu_sii_data[104],dmu_sii_data[106],dmu_sii_data[108],dmu_sii_data[110],dmu_sii_data[112],dmu_sii_data[114],dmu_sii_data[116],dmu_sii_data[118],dmu_sii_data[120],dmu_sii_data[122],dmu_sii_data[124],dmu_sii_data[126], ^ dmu_sii_parity[6]}
322 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
323 -module cpu
324 -reset `TB_RST
325 -name dmu_sii_data2_parity_even_byte48
326*/
327
328/* 0in odd_parity
329 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31], ^ dmu_sii_parity[1]}
330 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
331 -module cpu
332 -reset `TB_RST
333 -name dmu_sii_data2_parity_odd_byte0
334*/
335
336/* 0in odd_parity
337 -var {dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39],dmu_sii_data[41],dmu_sii_data[43],dmu_sii_data[45],dmu_sii_data[47],dmu_sii_data[49],dmu_sii_data[51],dmu_sii_data[53],dmu_sii_data[55],dmu_sii_data[57],dmu_sii_data[59],dmu_sii_data[61],dmu_sii_data[63], ^ dmu_sii_parity[3]}
338 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
339 -module cpu
340 -reset `TB_RST
341 -name dmu_sii_data2_parity_odd_byte16
342*/
343
344/* 0in odd_parity
345 -var {dmu_sii_data[65],dmu_sii_data[67],dmu_sii_data[69],dmu_sii_data[71],dmu_sii_data[73],dmu_sii_data[75],dmu_sii_data[77],dmu_sii_data[79],dmu_sii_data[81],dmu_sii_data[83],dmu_sii_data[85],dmu_sii_data[87],dmu_sii_data[89],dmu_sii_data[91],dmu_sii_data[93],dmu_sii_data[95], ^ dmu_sii_parity[5]}
346 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
347 -module cpu
348 -reset `TB_RST
349 -name dmu_sii_data2_parity_odd_byte32
350*/
351
352/* 0in odd_parity
353 -var {dmu_sii_data[97],dmu_sii_data[99],dmu_sii_data[101],dmu_sii_data[103],dmu_sii_data[105],dmu_sii_data[107],dmu_sii_data[109],dmu_sii_data[111],dmu_sii_data[113],dmu_sii_data[115],dmu_sii_data[117],dmu_sii_data[119],dmu_sii_data[121],dmu_sii_data[123],dmu_sii_data[125],dmu_sii_data[127], ^ dmu_sii_parity[7]}
354 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,2))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,2 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,2)))
355 -module cpu
356 -reset `TB_RST
357 -name dmu_sii_data2_parity_odd_byte48
358*/
359
360/* 0in odd_parity
361 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30], ^ dmu_sii_parity[0]}
362 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
363 -module cpu
364 -reset `TB_RST
365 -name dmu_sii_data3_parity_even_byte0
366*/
367
368/* 0in odd_parity
369 -var {dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38],dmu_sii_data[40],dmu_sii_data[42],dmu_sii_data[44],dmu_sii_data[46],dmu_sii_data[48],dmu_sii_data[50],dmu_sii_data[52],dmu_sii_data[54],dmu_sii_data[56],dmu_sii_data[58],dmu_sii_data[60],dmu_sii_data[62], ^ dmu_sii_parity[2]}
370 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
371 -module cpu
372 -reset `TB_RST
373 -name dmu_sii_data3_parity_even_byte16
374*/
375
376/* 0in odd_parity
377 -var {dmu_sii_data[64],dmu_sii_data[66],dmu_sii_data[68],dmu_sii_data[70],dmu_sii_data[72],dmu_sii_data[74],dmu_sii_data[76],dmu_sii_data[78],dmu_sii_data[80],dmu_sii_data[82],dmu_sii_data[84],dmu_sii_data[86],dmu_sii_data[88],dmu_sii_data[90],dmu_sii_data[92],dmu_sii_data[94], ^ dmu_sii_parity[4]}
378 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
379 -module cpu
380 -reset `TB_RST
381 -name dmu_sii_data3_parity_even_byte32
382*/
383
384/* 0in odd_parity
385 -var {dmu_sii_data[96],dmu_sii_data[98],dmu_sii_data[100],dmu_sii_data[102],dmu_sii_data[104],dmu_sii_data[106],dmu_sii_data[108],dmu_sii_data[110],dmu_sii_data[112],dmu_sii_data[114],dmu_sii_data[116],dmu_sii_data[118],dmu_sii_data[120],dmu_sii_data[122],dmu_sii_data[124],dmu_sii_data[126], ^ dmu_sii_parity[6]}
386 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
387 -module cpu
388 -reset `TB_RST
389 -name dmu_sii_data3_parity_even_byte48
390*/
391
392/* 0in odd_parity
393 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31], ^ dmu_sii_parity[1]}
394 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
395 -module cpu
396 -reset `TB_RST
397 -name dmu_sii_data3_parity_odd_byte0
398*/
399
400/* 0in odd_parity
401 -var {dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39],dmu_sii_data[41],dmu_sii_data[43],dmu_sii_data[45],dmu_sii_data[47],dmu_sii_data[49],dmu_sii_data[51],dmu_sii_data[53],dmu_sii_data[55],dmu_sii_data[57],dmu_sii_data[59],dmu_sii_data[61],dmu_sii_data[63], ^ dmu_sii_parity[3]}
402 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
403 -module cpu
404 -reset `TB_RST
405 -name dmu_sii_data3_parity_odd_byte16
406*/
407
408/* 0in odd_parity
409 -var {dmu_sii_data[65],dmu_sii_data[67],dmu_sii_data[69],dmu_sii_data[71],dmu_sii_data[73],dmu_sii_data[75],dmu_sii_data[77],dmu_sii_data[79],dmu_sii_data[81],dmu_sii_data[83],dmu_sii_data[85],dmu_sii_data[87],dmu_sii_data[89],dmu_sii_data[91],dmu_sii_data[93],dmu_sii_data[95], ^ dmu_sii_parity[5]}
410 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
411 -module cpu
412 -reset `TB_RST
413 -name dmu_sii_data3_parity_odd_byte32
414*/
415
416/* 0in odd_parity
417 -var {dmu_sii_data[97],dmu_sii_data[99],dmu_sii_data[101],dmu_sii_data[103],dmu_sii_data[105],dmu_sii_data[107],dmu_sii_data[109],dmu_sii_data[111],dmu_sii_data[113],dmu_sii_data[115],dmu_sii_data[117],dmu_sii_data[119],dmu_sii_data[121],dmu_sii_data[123],dmu_sii_data[125],dmu_sii_data[127], ^ dmu_sii_parity[7]}
418 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(dmu_sii_hdr_vld,3))) && ($0in_falling_edge($0in_delay(dmu_sii_datareq,3 ))) && !$0in_falling_edge($0in_delay(dmu_sii_datareq16,3)))
419 -module cpu
420 -reset `TB_RST
421 -name dmu_sii_data3_parity_odd_byte48
422*/
423
424/* 0in odd_parity
425 -var {dmu_sii_data[0],dmu_sii_data[2],dmu_sii_data[4],dmu_sii_data[6],dmu_sii_data[8],dmu_sii_data[10],dmu_sii_data[12],dmu_sii_data[14],dmu_sii_data[16],dmu_sii_data[18],dmu_sii_data[20],dmu_sii_data[22],dmu_sii_data[24],dmu_sii_data[26],dmu_sii_data[28],dmu_sii_data[30], ^ dmu_sii_parity[0]}
426 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
427 -module cpu
428 -reset `TB_RST
429 -name dmu_sii_data0_wri_parity_even_byte0
430*/
431
432/* 0in odd_parity
433 -var {dmu_sii_data[32],dmu_sii_data[34],dmu_sii_data[36],dmu_sii_data[38],dmu_sii_data[40],dmu_sii_data[42],dmu_sii_data[44],dmu_sii_data[46],dmu_sii_data[48],dmu_sii_data[50],dmu_sii_data[52],dmu_sii_data[54],dmu_sii_data[56],dmu_sii_data[58],dmu_sii_data[60],dmu_sii_data[62], ^ dmu_sii_parity[2]}
434 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
435 -module cpu
436 -reset `TB_RST
437 -name dmu_sii_data0_wri_parity_even_byte16
438*/
439
440/* 0in odd_parity
441 -var {dmu_sii_data[64],dmu_sii_data[66],dmu_sii_data[68],dmu_sii_data[70],dmu_sii_data[72],dmu_sii_data[74],dmu_sii_data[76],dmu_sii_data[78],dmu_sii_data[80],dmu_sii_data[82],dmu_sii_data[84],dmu_sii_data[86],dmu_sii_data[88],dmu_sii_data[90],dmu_sii_data[92],dmu_sii_data[94], ^ dmu_sii_parity[4]}
442 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
443 -module cpu
444 -reset `TB_RST
445 -name dmu_sii_data0_wri_parity_even_byte32
446*/
447
448/* 0in odd_parity
449 -var {dmu_sii_data[96],dmu_sii_data[98],dmu_sii_data[100],dmu_sii_data[102],dmu_sii_data[104],dmu_sii_data[106],dmu_sii_data[108],dmu_sii_data[110],dmu_sii_data[112],dmu_sii_data[114],dmu_sii_data[116],dmu_sii_data[118],dmu_sii_data[120],dmu_sii_data[122],dmu_sii_data[124],dmu_sii_data[126], ^ dmu_sii_parity[6]}
450 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
451 -module cpu
452 -reset `TB_RST
453 -name dmu_sii_data0_wri_parity_even_byte48
454*/
455
456/* 0in odd_parity
457 -var {dmu_sii_data[1],dmu_sii_data[3],dmu_sii_data[5],dmu_sii_data[7],dmu_sii_data[9],dmu_sii_data[11],dmu_sii_data[13],dmu_sii_data[15],dmu_sii_data[17],dmu_sii_data[19],dmu_sii_data[21],dmu_sii_data[23],dmu_sii_data[25],dmu_sii_data[27],dmu_sii_data[29],dmu_sii_data[31], ^ dmu_sii_parity[1]}
458 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
459 -module cpu
460 -reset `TB_RST
461 -name dmu_sii_data0_wri_parity_odd_byte0
462*/
463
464/* 0in odd_parity
465 -var {dmu_sii_data[33],dmu_sii_data[35],dmu_sii_data[37],dmu_sii_data[39],dmu_sii_data[41],dmu_sii_data[43],dmu_sii_data[45],dmu_sii_data[47],dmu_sii_data[49],dmu_sii_data[51],dmu_sii_data[53],dmu_sii_data[55],dmu_sii_data[57],dmu_sii_data[59],dmu_sii_data[61],dmu_sii_data[63], ^ dmu_sii_parity[3]}
466 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
467 -module cpu
468 -reset `TB_RST
469 -name dmu_sii_data0_wri_parity_odd_byte16
470*/
471
472/* 0in odd_parity
473 -var {dmu_sii_data[65],dmu_sii_data[67],dmu_sii_data[69],dmu_sii_data[71],dmu_sii_data[73],dmu_sii_data[75],dmu_sii_data[77],dmu_sii_data[79],dmu_sii_data[81],dmu_sii_data[83],dmu_sii_data[85],dmu_sii_data[87],dmu_sii_data[89],dmu_sii_data[91],dmu_sii_data[93],dmu_sii_data[95], ^ dmu_sii_parity[5]}
474 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
475 -module cpu
476 -reset `TB_RST
477 -name dmu_sii_data0_wri_parity_odd_byte32
478*/
479
480/* 0in odd_parity
481 -var {dmu_sii_data[97],dmu_sii_data[99],dmu_sii_data[101],dmu_sii_data[103],dmu_sii_data[105],dmu_sii_data[107],dmu_sii_data[109],dmu_sii_data[111],dmu_sii_data[113],dmu_sii_data[115],dmu_sii_data[117],dmu_sii_data[119],dmu_sii_data[121],dmu_sii_data[123],dmu_sii_data[125],dmu_sii_data[127], ^ dmu_sii_parity[7]}
482 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(dmu_sii_hdr_vld)) && ($0in_falling_edge(dmu_sii_datareq)) && $0in_falling_edge(dmu_sii_datareq16))
483 -module cpu
484 -reset `TB_RST
485 -name dmu_sii_data0_wri_parity_odd_byte48
486*/
487
488/*************************************************************************
489*
490* SIO -> DMU
491* Check for data parity, and ctag ecc
492*
493**************************************************************************/
494
495wire p5 = (`TOP.cpu.sio_dmu_data[64] ^ `TOP.cpu.sio_dmu_data[65] ^ `TOP.cpu.sio_dmu_data[67] ^ `TOP.cpu.sio_dmu_data[68] ^ `TOP.cpu.sio_dmu_data[70] ^ `TOP.cpu.sio_dmu_data[72] ^ `TOP.cpu.sio_dmu_data[74] ^ `TOP.cpu.sio_dmu_data[75] ^ `TOP.cpu.sio_dmu_data[77] ^ `TOP.cpu.sio_dmu_data[79]);
496
497/* 0in custom
498 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(p5 == sio_dmu_data[56]))
499 -message "ctag error for sio_dmu: p0 does not equal c0"
500 -module cpu
501 -reset `TB_RST
502 -name sio_dmu_ctag_ecc_p0
503*/
504
505wire p6 = (`TOP.cpu.sio_dmu_data[64] ^ `TOP.cpu.sio_dmu_data[66] ^ `TOP.cpu.sio_dmu_data[67] ^ `TOP.cpu.sio_dmu_data[69] ^ `TOP.cpu.sio_dmu_data[70] ^ `TOP.cpu.sio_dmu_data[73] ^ `TOP.cpu.sio_dmu_data[74] ^ `TOP.cpu.sio_dmu_data[76] ^ `TOP.cpu.sio_dmu_data[77]);
506
507
508/* 0in custom
509 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(p6 == sio_dmu_data[57]))
510 -message "ctag error for sio_dmu: p1 does not equal c1"
511 -module cpu
512 -reset `TB_RST
513 -name sio_dmu_ctag_ecc_p1
514*/
515
516wire p7 = (`TOP.cpu.sio_dmu_data[65] ^ `TOP.cpu.sio_dmu_data[66] ^ `TOP.cpu.sio_dmu_data[67] ^ `TOP.cpu.sio_dmu_data[71] ^ `TOP.cpu.sio_dmu_data[72] ^ `TOP.cpu.sio_dmu_data[73] ^ `TOP.cpu.sio_dmu_data[74] ^ `TOP.cpu.sio_dmu_data[78] ^ `TOP.cpu.sio_dmu_data[79]);
517
518
519/* 0in custom
520 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(p7 == sio_dmu_data[58]))
521 -message "ctag error for sio_dmu: p2 does not equal c2"
522 -module cpu
523 -reset `TB_RST
524 -name sio_dmu_ctag_ecc_p2
525*/
526
527wire p8 = (`TOP.cpu.sio_dmu_data[68] ^ `TOP.cpu.sio_dmu_data[69] ^ `TOP.cpu.sio_dmu_data[70] ^ `TOP.cpu.sio_dmu_data[71] ^ `TOP.cpu.sio_dmu_data[72] ^ `TOP.cpu.sio_dmu_data[73] ^ `TOP.cpu.sio_dmu_data[74]);
528
529/* 0in custom
530 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(p8 == sio_dmu_data[59]))
531 -message "ctag error for sio_dmu: p3 does not equal c3"
532 -module cpu
533 -reset `TB_RST
534 -name sio_dmu_ctag_ecc_p3
535*/
536
537wire p9 = (`TOP.cpu.sio_dmu_data[75] ^ `TOP.cpu.sio_dmu_data[76] ^ `TOP.cpu.sio_dmu_data[77] ^ `TOP.cpu.sio_dmu_data[78] ^ `TOP.cpu.sio_dmu_data[79]);
538
539/* 0in custom
540 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(p9 == sio_dmu_data[60]))
541 -message "ctag error for sio_dmu: p4 does not equal c4"
542 -module cpu
543 -reset `TB_RST
544 -name sio_dmu_ctag_ecc_p4
545*/
546
547wire sio_dmu_p5 = (`TOP.cpu.sio_dmu_data[64] ^ `TOP.cpu.sio_dmu_data[65] ^ `TOP.cpu.sio_dmu_data[66] ^ `TOP.cpu.sio_dmu_data[68] ^ `TOP.cpu.sio_dmu_data[69] ^ `TOP.cpu.sio_dmu_data[71] ^ `TOP.cpu.sio_dmu_data[74] ^ `TOP.cpu.sio_dmu_data[75] ^ `TOP.cpu.sio_dmu_data[76] ^ `TOP.cpu.sio_dmu_data[78]);
548
549/* 0in custom
550 -fire (($0in_rising_edge(sio_dmu_hdr_vld)) && !(sio_dmu_p5 == sio_dmu_data[61]))
551 -message "ctag error for sio_dmu: p5 does not equal c5"
552 -module cpu
553 -reset `TB_RST
554 -name sio_dmu_ctag_ecc_p5
555*/
556
557/* 0in odd_parity
558 -var {sio_dmu_data[0],sio_dmu_data[2],sio_dmu_data[4],sio_dmu_data[6],sio_dmu_data[8],sio_dmu_data[10],sio_dmu_data[12],sio_dmu_data[14],sio_dmu_data[16],sio_dmu_data[18],sio_dmu_data[20],sio_dmu_data[22],sio_dmu_data[24],sio_dmu_data[26],sio_dmu_data[28],sio_dmu_data[30], ^ sio_dmu_parity[0]}
559 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
560 -module cpu
561 -reset `TB_RST
562 -name sio_dmu_data0_parity_even_byte0
563*/
564
565/* 0in odd_parity
566 -var {sio_dmu_data[32],sio_dmu_data[34],sio_dmu_data[36],sio_dmu_data[38],sio_dmu_data[40],sio_dmu_data[42],sio_dmu_data[44],sio_dmu_data[46],sio_dmu_data[48],sio_dmu_data[50],sio_dmu_data[52],sio_dmu_data[54],sio_dmu_data[56],sio_dmu_data[58],sio_dmu_data[60],sio_dmu_data[62], ^ sio_dmu_parity[2]}
567 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
568 -module cpu
569 -reset `TB_RST
570 -name sio_dmu_data0_parity_even_byte16
571*/
572
573/* 0in odd_parity
574 -var {sio_dmu_data[64],sio_dmu_data[66],sio_dmu_data[68],sio_dmu_data[70],sio_dmu_data[72],sio_dmu_data[74],sio_dmu_data[76],sio_dmu_data[78],sio_dmu_data[80],sio_dmu_data[82],sio_dmu_data[84],sio_dmu_data[86],sio_dmu_data[88],sio_dmu_data[90],sio_dmu_data[92],sio_dmu_data[94], ^ sio_dmu_parity[4]}
575 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
576 -module cpu
577 -reset `TB_RST
578 -name sio_dmu_data0_parity_even_byte32
579*/
580
581/* 0in odd_parity
582 -var {sio_dmu_data[96],sio_dmu_data[98],sio_dmu_data[100],sio_dmu_data[102],sio_dmu_data[104],sio_dmu_data[106],sio_dmu_data[108],sio_dmu_data[110],sio_dmu_data[112],sio_dmu_data[114],sio_dmu_data[116],sio_dmu_data[118],sio_dmu_data[120],sio_dmu_data[122],sio_dmu_data[124],sio_dmu_data[126], ^ sio_dmu_parity[6]}
583 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
584 -module cpu
585 -reset `TB_RST
586 -name sio_dmu_data0_parity_even_byte48
587*/
588
589/* 0in odd_parity
590 -var {sio_dmu_data[1],sio_dmu_data[3],sio_dmu_data[5],sio_dmu_data[7],sio_dmu_data[9],sio_dmu_data[11],sio_dmu_data[13],sio_dmu_data[15],sio_dmu_data[17],sio_dmu_data[19],sio_dmu_data[21],sio_dmu_data[23],sio_dmu_data[25],sio_dmu_data[27],sio_dmu_data[29],sio_dmu_data[31], ^ sio_dmu_parity[1]}
591 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
592 -module cpu
593 -reset `TB_RST
594 -name sio_dmu_data0_parity_odd_byte0
595*/
596
597/* 0in odd_parity
598 -var {sio_dmu_data[33],sio_dmu_data[35],sio_dmu_data[37],sio_dmu_data[39],sio_dmu_data[41],sio_dmu_data[43],sio_dmu_data[45],sio_dmu_data[47],sio_dmu_data[49],sio_dmu_data[51],sio_dmu_data[53],sio_dmu_data[55],sio_dmu_data[57],sio_dmu_data[59],sio_dmu_data[61],sio_dmu_data[63], ^ sio_dmu_parity[3]}
599 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
600 -module cpu
601 -reset `TB_RST
602 -name sio_dmu_data0_parity_odd_byte16
603*/
604
605/* 0in odd_parity
606 -var {sio_dmu_data[65],sio_dmu_data[67],sio_dmu_data[69],sio_dmu_data[71],sio_dmu_data[73],sio_dmu_data[75],sio_dmu_data[77],sio_dmu_data[79],sio_dmu_data[81],sio_dmu_data[83],sio_dmu_data[85],sio_dmu_data[87],sio_dmu_data[89],sio_dmu_data[91],sio_dmu_data[93],sio_dmu_data[95], ^ sio_dmu_parity[5]}
607 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
608 -module cpu
609 -reset `TB_RST
610 -name sio_dmu_data0_parity_odd_byte32
611*/
612
613/* 0in odd_parity
614 -var {sio_dmu_data[97],sio_dmu_data[99],sio_dmu_data[101],sio_dmu_data[103],sio_dmu_data[105],sio_dmu_data[107],sio_dmu_data[109],sio_dmu_data[111],sio_dmu_data[113],sio_dmu_data[115],sio_dmu_data[117],sio_dmu_data[119],sio_dmu_data[121],sio_dmu_data[123],sio_dmu_data[125],sio_dmu_data[127], ^ sio_dmu_parity[7]}
615 -active (~no_dmusiu_ras_chk && ($0in_falling_edge(sio_dmu_hdr_vld)))
616 -module cpu
617 -reset `TB_RST
618 -name sio_dmu_data0_parity_odd_byte48
619*/
620
621/* 0in odd_parity
622 -var {sio_dmu_data[0],sio_dmu_data[2],sio_dmu_data[4],sio_dmu_data[6],sio_dmu_data[8],sio_dmu_data[10],sio_dmu_data[12],sio_dmu_data[14],sio_dmu_data[16],sio_dmu_data[18],sio_dmu_data[20],sio_dmu_data[22],sio_dmu_data[24],sio_dmu_data[26],sio_dmu_data[28],sio_dmu_data[30], ^ sio_dmu_parity[0]}
623 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
624 -module cpu
625 -reset `TB_RST
626 -name sio_dmu_data1_parity_even_byte0
627*/
628
629/* 0in odd_parity
630 -var {sio_dmu_data[32],sio_dmu_data[34],sio_dmu_data[36],sio_dmu_data[38],sio_dmu_data[40],sio_dmu_data[42],sio_dmu_data[44],sio_dmu_data[46],sio_dmu_data[48],sio_dmu_data[50],sio_dmu_data[52],sio_dmu_data[54],sio_dmu_data[56],sio_dmu_data[58],sio_dmu_data[60],sio_dmu_data[62], ^ sio_dmu_parity[2]}
631 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
632 -module cpu
633 -reset `TB_RST
634 -name sio_dmu_data1_parity_even_byte16
635*/
636
637/* 0in odd_parity
638 -var {sio_dmu_data[64],sio_dmu_data[66],sio_dmu_data[68],sio_dmu_data[70],sio_dmu_data[72],sio_dmu_data[74],sio_dmu_data[76],sio_dmu_data[78],sio_dmu_data[80],sio_dmu_data[82],sio_dmu_data[84],sio_dmu_data[86],sio_dmu_data[88],sio_dmu_data[90],sio_dmu_data[92],sio_dmu_data[94], ^ sio_dmu_parity[4]}
639 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
640 -module cpu
641 -reset `TB_RST
642 -name sio_dmu_data1_parity_even_byte32
643*/
644
645/* 0in odd_parity
646 -var {sio_dmu_data[96],sio_dmu_data[98],sio_dmu_data[100],sio_dmu_data[102],sio_dmu_data[104],sio_dmu_data[106],sio_dmu_data[108],sio_dmu_data[110],sio_dmu_data[112],sio_dmu_data[114],sio_dmu_data[116],sio_dmu_data[118],sio_dmu_data[120],sio_dmu_data[122],sio_dmu_data[124],sio_dmu_data[126], ^ sio_dmu_parity[6]}
647 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
648 -module cpu
649 -reset `TB_RST
650 -name sio_dmu_data1_parity_even_byte48
651*/
652
653/* 0in odd_parity
654 -var {sio_dmu_data[1],sio_dmu_data[3],sio_dmu_data[5],sio_dmu_data[7],sio_dmu_data[9],sio_dmu_data[11],sio_dmu_data[13],sio_dmu_data[15],sio_dmu_data[17],sio_dmu_data[19],sio_dmu_data[21],sio_dmu_data[23],sio_dmu_data[25],sio_dmu_data[27],sio_dmu_data[29],sio_dmu_data[31], ^ sio_dmu_parity[1]}
655 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
656 -module cpu
657 -reset `TB_RST
658 -name sio_dmu_data1_parity_odd_byte0
659*/
660
661/* 0in odd_parity
662 -var {sio_dmu_data[33],sio_dmu_data[35],sio_dmu_data[37],sio_dmu_data[39],sio_dmu_data[41],sio_dmu_data[43],sio_dmu_data[45],sio_dmu_data[47],sio_dmu_data[49],sio_dmu_data[51],sio_dmu_data[53],sio_dmu_data[55],sio_dmu_data[57],sio_dmu_data[59],sio_dmu_data[61],sio_dmu_data[63], ^ sio_dmu_parity[3]}
663 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
664 -module cpu
665 -reset `TB_RST
666 -name sio_dmu_data1_parity_odd_byte16
667*/
668
669/* 0in odd_parity
670 -var {sio_dmu_data[65],sio_dmu_data[67],sio_dmu_data[69],sio_dmu_data[71],sio_dmu_data[73],sio_dmu_data[75],sio_dmu_data[77],sio_dmu_data[79],sio_dmu_data[81],sio_dmu_data[83],sio_dmu_data[85],sio_dmu_data[87],sio_dmu_data[89],sio_dmu_data[91],sio_dmu_data[93],sio_dmu_data[95], ^ sio_dmu_parity[5]}
671 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
672 -module cpu
673 -reset `TB_RST
674 -name sio_dmu_data1_parity_odd_byte32
675*/
676
677/* 0in odd_parity
678 -var {sio_dmu_data[97],sio_dmu_data[99],sio_dmu_data[101],sio_dmu_data[103],sio_dmu_data[105],sio_dmu_data[107],sio_dmu_data[109],sio_dmu_data[111],sio_dmu_data[113],sio_dmu_data[115],sio_dmu_data[117],sio_dmu_data[119],sio_dmu_data[121],sio_dmu_data[123],sio_dmu_data[125],sio_dmu_data[127], ^ sio_dmu_parity[7]}
679 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,1))))
680 -module cpu
681 -reset `TB_RST
682 -name sio_dmu_data1_parity_odd_byte48
683*/
684
685/* 0in odd_parity
686 -var {sio_dmu_data[0],sio_dmu_data[2],sio_dmu_data[4],sio_dmu_data[6],sio_dmu_data[8],sio_dmu_data[10],sio_dmu_data[12],sio_dmu_data[14],sio_dmu_data[16],sio_dmu_data[18],sio_dmu_data[20],sio_dmu_data[22],sio_dmu_data[24],sio_dmu_data[26],sio_dmu_data[28],sio_dmu_data[30], ^ sio_dmu_parity[0]}
687 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
688 -module cpu
689 -reset `TB_RST
690 -name sio_dmu_data2_parity_even_byte0
691*/
692
693/* 0in odd_parity
694 -var {sio_dmu_data[32],sio_dmu_data[34],sio_dmu_data[36],sio_dmu_data[38],sio_dmu_data[40],sio_dmu_data[42],sio_dmu_data[44],sio_dmu_data[46],sio_dmu_data[48],sio_dmu_data[50],sio_dmu_data[52],sio_dmu_data[54],sio_dmu_data[56],sio_dmu_data[58],sio_dmu_data[60],sio_dmu_data[62], ^ sio_dmu_parity[2]}
695 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
696 -module cpu
697 -reset `TB_RST
698 -name sio_dmu_data2_parity_even_byte16
699*/
700
701/* 0in odd_parity
702 -var {sio_dmu_data[64],sio_dmu_data[66],sio_dmu_data[68],sio_dmu_data[70],sio_dmu_data[72],sio_dmu_data[74],sio_dmu_data[76],sio_dmu_data[78],sio_dmu_data[80],sio_dmu_data[82],sio_dmu_data[84],sio_dmu_data[86],sio_dmu_data[88],sio_dmu_data[90],sio_dmu_data[92],sio_dmu_data[94], ^ sio_dmu_parity[4]}
703 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
704 -module cpu
705 -reset `TB_RST
706 -name sio_dmu_data2_parity_even_byte32
707*/
708
709/* 0in odd_parity
710 -var {sio_dmu_data[96],sio_dmu_data[98],sio_dmu_data[100],sio_dmu_data[102],sio_dmu_data[104],sio_dmu_data[106],sio_dmu_data[108],sio_dmu_data[110],sio_dmu_data[112],sio_dmu_data[114],sio_dmu_data[116],sio_dmu_data[118],sio_dmu_data[120],sio_dmu_data[122],sio_dmu_data[124],sio_dmu_data[126], ^ sio_dmu_parity[6]}
711 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
712 -module cpu
713 -reset `TB_RST
714 -name sio_dmu_data2_parity_even_byte48
715*/
716
717/* 0in odd_parity
718 -var {sio_dmu_data[1],sio_dmu_data[3],sio_dmu_data[5],sio_dmu_data[7],sio_dmu_data[9],sio_dmu_data[11],sio_dmu_data[13],sio_dmu_data[15],sio_dmu_data[17],sio_dmu_data[19],sio_dmu_data[21],sio_dmu_data[23],sio_dmu_data[25],sio_dmu_data[27],sio_dmu_data[29],sio_dmu_data[31], ^ sio_dmu_parity[1]}
719 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
720 -module cpu
721 -reset `TB_RST
722 -name sio_dmu_data2_parity_odd_byte0
723*/
724
725/* 0in odd_parity
726 -var {sio_dmu_data[33],sio_dmu_data[35],sio_dmu_data[37],sio_dmu_data[39],sio_dmu_data[41],sio_dmu_data[43],sio_dmu_data[45],sio_dmu_data[47],sio_dmu_data[49],sio_dmu_data[51],sio_dmu_data[53],sio_dmu_data[55],sio_dmu_data[57],sio_dmu_data[59],sio_dmu_data[61],sio_dmu_data[63], ^ sio_dmu_parity[3]}
727 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
728 -module cpu
729 -reset `TB_RST
730 -name sio_dmu_data2_parity_odd_byte16
731*/
732
733/* 0in odd_parity
734 -var {sio_dmu_data[65],sio_dmu_data[67],sio_dmu_data[69],sio_dmu_data[71],sio_dmu_data[73],sio_dmu_data[75],sio_dmu_data[77],sio_dmu_data[79],sio_dmu_data[81],sio_dmu_data[83],sio_dmu_data[85],sio_dmu_data[87],sio_dmu_data[89],sio_dmu_data[91],sio_dmu_data[93],sio_dmu_data[95], ^ sio_dmu_parity[5]}
735 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
736 -module cpu
737 -reset `TB_RST
738 -name sio_dmu_data2_parity_odd_byte32
739*/
740
741/* 0in odd_parity
742 -var {sio_dmu_data[97],sio_dmu_data[99],sio_dmu_data[101],sio_dmu_data[103],sio_dmu_data[105],sio_dmu_data[107],sio_dmu_data[109],sio_dmu_data[111],sio_dmu_data[113],sio_dmu_data[115],sio_dmu_data[117],sio_dmu_data[119],sio_dmu_data[121],sio_dmu_data[123],sio_dmu_data[125],sio_dmu_data[127], ^ sio_dmu_parity[7]}
743 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,2))))
744 -module cpu
745 -reset `TB_RST
746 -name sio_dmu_data2_parity_odd_byte48
747*/
748
749/* 0in odd_parity
750 -var {sio_dmu_data[0],sio_dmu_data[2],sio_dmu_data[4],sio_dmu_data[6],sio_dmu_data[8],sio_dmu_data[10],sio_dmu_data[12],sio_dmu_data[14],sio_dmu_data[16],sio_dmu_data[18],sio_dmu_data[20],sio_dmu_data[22],sio_dmu_data[24],sio_dmu_data[26],sio_dmu_data[28],sio_dmu_data[30], ^ sio_dmu_parity[0]}
751 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
752 -module cpu
753 -reset `TB_RST
754 -name sio_dmu_data3_parity_even_byte0
755*/
756
757/* 0in odd_parity
758 -var {sio_dmu_data[32],sio_dmu_data[34],sio_dmu_data[36],sio_dmu_data[38],sio_dmu_data[40],sio_dmu_data[42],sio_dmu_data[44],sio_dmu_data[46],sio_dmu_data[48],sio_dmu_data[50],sio_dmu_data[52],sio_dmu_data[54],sio_dmu_data[56],sio_dmu_data[58],sio_dmu_data[60],sio_dmu_data[62], ^ sio_dmu_parity[2]}
759 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
760 -module cpu
761 -reset `TB_RST
762 -name sio_dmu_data3_parity_even_byte16
763*/
764
765/* 0in odd_parity
766 -var {sio_dmu_data[64],sio_dmu_data[66],sio_dmu_data[68],sio_dmu_data[70],sio_dmu_data[72],sio_dmu_data[74],sio_dmu_data[76],sio_dmu_data[78],sio_dmu_data[80],sio_dmu_data[82],sio_dmu_data[84],sio_dmu_data[86],sio_dmu_data[88],sio_dmu_data[90],sio_dmu_data[92],sio_dmu_data[94], ^ sio_dmu_parity[4]}
767 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
768 -module cpu
769 -reset `TB_RST
770 -name sio_dmu_data3_parity_even_byte32
771*/
772
773/* 0in odd_parity
774 -var {sio_dmu_data[96],sio_dmu_data[98],sio_dmu_data[100],sio_dmu_data[102],sio_dmu_data[104],sio_dmu_data[106],sio_dmu_data[108],sio_dmu_data[110],sio_dmu_data[112],sio_dmu_data[114],sio_dmu_data[116],sio_dmu_data[118],sio_dmu_data[120],sio_dmu_data[122],sio_dmu_data[124],sio_dmu_data[126], ^ sio_dmu_parity[6]}
775 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
776 -module cpu
777 -reset `TB_RST
778 -name sio_dmu_data3_parity_even_byte48
779*/
780
781/* 0in odd_parity
782 -var {sio_dmu_data[1],sio_dmu_data[3],sio_dmu_data[5],sio_dmu_data[7],sio_dmu_data[9],sio_dmu_data[11],sio_dmu_data[13],sio_dmu_data[15],sio_dmu_data[17],sio_dmu_data[19],sio_dmu_data[21],sio_dmu_data[23],sio_dmu_data[25],sio_dmu_data[27],sio_dmu_data[29],sio_dmu_data[31], ^ sio_dmu_parity[1]}
783 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
784 -module cpu
785 -reset `TB_RST
786 -name sio_dmu_data3_parity_odd_byte0
787*/
788
789/* 0in odd_parity
790 -var {sio_dmu_data[33],sio_dmu_data[35],sio_dmu_data[37],sio_dmu_data[39],sio_dmu_data[41],sio_dmu_data[43],sio_dmu_data[45],sio_dmu_data[47],sio_dmu_data[49],sio_dmu_data[51],sio_dmu_data[53],sio_dmu_data[55],sio_dmu_data[57],sio_dmu_data[59],sio_dmu_data[61],sio_dmu_data[63], ^ sio_dmu_parity[3]}
791 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
792 -module cpu
793 -reset `TB_RST
794 -name sio_dmu_data3_parity_odd_byte16
795*/
796
797/* 0in odd_parity
798 -var {sio_dmu_data[65],sio_dmu_data[67],sio_dmu_data[69],sio_dmu_data[71],sio_dmu_data[73],sio_dmu_data[75],sio_dmu_data[77],sio_dmu_data[79],sio_dmu_data[81],sio_dmu_data[83],sio_dmu_data[85],sio_dmu_data[87],sio_dmu_data[89],sio_dmu_data[91],sio_dmu_data[93],sio_dmu_data[95], ^ sio_dmu_parity[5]}
799 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
800 -module cpu
801 -reset `TB_RST
802 -name sio_dmu_data3_parity_odd_byte32
803*/
804
805/* 0in odd_parity
806 -var {sio_dmu_data[97],sio_dmu_data[99],sio_dmu_data[101],sio_dmu_data[103],sio_dmu_data[105],sio_dmu_data[107],sio_dmu_data[109],sio_dmu_data[111],sio_dmu_data[113],sio_dmu_data[115],sio_dmu_data[117],sio_dmu_data[119],sio_dmu_data[121],sio_dmu_data[123],sio_dmu_data[125],sio_dmu_data[127], ^ sio_dmu_parity[7]}
807 -active (~no_dmusiu_ras_chk && ($0in_falling_edge($0in_delay(sio_dmu_hdr_vld,3))))
808 -module cpu
809 -reset `TB_RST
810 -name sio_dmu_data3_parity_odd_byte48
811*/
812
813/*************************************************************************
814*
815* DMU -> L2/NCU
816* Check error bit through interface
817*
818**************************************************************************/
819
820/* 0in assert_follower
821 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
822 -follower (sii_l2t0_req[28] == 1)
823 -min 1
824 -max 200
825 -module cpu
826 -reset `TB_RST
827 -name dmu_sii_l2t0_error
828*/
829
830/* 0in assert_follower
831 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
832 -follower (sii_l2t1_req[28] == 1)
833 -min 1
834 -max 200
835 -module cpu
836 -reset `TB_RST
837 -name dmu_sii_l2t1_error
838*/
839
840/* 0in assert_follower
841 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
842 -follower (sii_l2t2_req[28] == 1)
843 -min 1
844 -max 200
845 -module cpu
846 -reset `TB_RST
847 -name dmu_sii_l2t2_error
848*/
849
850/* 0in assert_follower
851 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
852 -follower (sii_l2t3_req[28] == 1)
853 -min 1
854 -max 200
855 -module cpu
856 -reset `TB_RST
857 -name dmu_sii_l2t3_error
858*/
859
860/* 0in assert_follower
861 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
862 -follower (sii_l2t4_req[28] == 1)
863 -min 1
864 -max 200
865 -module cpu
866 -reset `TB_RST
867 -name dmu_sii_l2t4_error
868*/
869
870/* 0in assert_follower
871 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
872 -follower (sii_l2t5_req[28] == 1)
873 -min 1
874 -max 200
875 -module cpu
876 -reset `TB_RST
877 -name dmu_sii_l2t5_error
878*/
879
880/* 0in assert_follower
881 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
882 -follower (sii_l2t6_req[28] == 1)
883 -min 1
884 -max 200
885 -module cpu
886 -reset `TB_RST
887 -name dmu_sii_l2t6_error
888*/
889
890/* 0in assert_follower
891 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
892 -follower (sii_l2t7_req[28] == 1)
893 -min 1
894 -max 200
895 -module cpu
896 -reset `TB_RST
897 -name dmu_sii_l2t7_error
898*/
899
900
901/* 0in assert_follower
902 -leader (($0in_rising_edge(dmu_sii_hdr_vld)) && ((dmu_sii_data[80] == 1) | (dmu_sii_data[81] == 1) | (dmu_sii_data[82] == 1)))
903 -follower ((sii_ncu_data[29] == 1) | (sii_ncu_data[30] == 1) | (sii_ncu_data[31] == 1))
904 -min 1
905 -max 200
906 -module cpu
907 -reset `TB_RST
908 -name dmu_sii_ncu_error
909*/
910
911
912endmodule // dmu_siu_ras_chkr