projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: dmu_int_relocation_cov_mon.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module mondo_reloc_cov_fsm ( clk, | |
| 36 | rst_l, | |
| 37 | im2rm_mdo_enq, | |
| 38 | current_thread_id, | |
| 39 | current_intctl_id, | |
| 40 | current_mondo_intq_id, | |
| 41 | int_ctl_id, | |
| 42 | my_mondo_id, | |
| 43 | map_thread_id, | |
| 44 | seq_covered | |
| 45 | ); | |
| 46 | ||
| 47 | input clk; | |
| 48 | input rst_l; | |
| 49 | input im2rm_mdo_enq; | |
| 50 | input [5:0] current_thread_id; | |
| 51 | input [1:0] current_intctl_id; | |
| 52 | input [5:0] current_mondo_intq_id; | |
| 53 | input [1:0] int_ctl_id; | |
| 54 | input [5:0] map_thread_id; | |
| 55 | input [5:0] my_mondo_id; | |
| 56 | output seq_covered; | |
| 57 | ||
| 58 | parameter IDLE = 2'b00; | |
| 59 | parameter INT_1 = 2'b01; | |
| 60 | parameter THD_CHANGE = 2'b10; | |
| 61 | ||
| 62 | reg [1:0] state; | |
| 63 | reg [5:0] last_map_thread_id; | |
| 64 | reg seq_covered; | |
| 65 | ||
| 66 | always @(posedge clk) | |
| 67 | begin | |
| 68 | if(rst_l == 1'b0) | |
| 69 | begin | |
| 70 | state = IDLE; | |
| 71 | last_map_thread_id = map_thread_id; | |
| 72 | seq_covered = 1'b0; | |
| 73 | end | |
| 74 | else | |
| 75 | begin | |
| 76 | case(state) | |
| 77 | IDLE : | |
| 78 | begin | |
| 79 | if ((current_thread_id == map_thread_id) & (current_intctl_id == int_ctl_id) & | |
| 80 | (current_mondo_intq_id == my_mondo_id) & (im2rm_mdo_enq == 1'b1)) | |
| 81 | begin | |
| 82 | state = INT_1; | |
| 83 | last_map_thread_id = map_thread_id; | |
| 84 | end | |
| 85 | seq_covered = 1'b0; | |
| 86 | end | |
| 87 | ||
| 88 | INT_1 : | |
| 89 | begin | |
| 90 | seq_covered = 1'b0; | |
| 91 | if(last_map_thread_id != map_thread_id) | |
| 92 | begin | |
| 93 | state = THD_CHANGE; | |
| 94 | end | |
| 95 | end | |
| 96 | ||
| 97 | THD_CHANGE : | |
| 98 | begin | |
| 99 | if(last_map_thread_id == map_thread_id) | |
| 100 | begin | |
| 101 | state = INT_1; | |
| 102 | end | |
| 103 | else if ((current_thread_id == map_thread_id) & (current_intctl_id == int_ctl_id) & | |
| 104 | (current_mondo_intq_id == my_mondo_id) & (im2rm_mdo_enq == 1'b1)) | |
| 105 | begin | |
| 106 | state = INT_1; | |
| 107 | last_map_thread_id = map_thread_id; | |
| 108 | seq_covered = 1'b1; | |
| 109 | end | |
| 110 | end | |
| 111 | endcase | |
| 112 | end | |
| 113 | end | |
| 114 | ||
| 115 | endmodule | |
| 116 | /////////////////////////////////////////////////////////////////////////////////////////////// | |
| 117 | module intctl ( clk, | |
| 118 | rst_l, | |
| 119 | im2rm_mdo_enq, | |
| 120 | current_thread_id, | |
| 121 | current_intctl_id, | |
| 122 | current_mondo_intq_id, | |
| 123 | my_id, | |
| 124 | seq_covered_status | |
| 125 | ); | |
| 126 | ||
| 127 | input clk; | |
| 128 | input rst_l; | |
| 129 | input im2rm_mdo_enq; | |
| 130 | input [5:0] current_thread_id; | |
| 131 | input [1:0] current_intctl_id; | |
| 132 | input [5:0] current_mondo_intq_id; | |
| 133 | input [1:0] my_id; | |
| 134 | output [41:0] seq_covered_status; | |
| 135 | ||
| 136 | wire [5:0] thread_id_mondo_20 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_20.interrupt_mapping_20_t_id_hw_read; | |
| 137 | wire [5:0] thread_id_mondo_21 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_21.interrupt_mapping_21_t_id_hw_read; | |
| 138 | wire [5:0] thread_id_mondo_22 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_22.interrupt_mapping_22_t_id_hw_read; | |
| 139 | wire [5:0] thread_id_mondo_23 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_23.interrupt_mapping_23_t_id_hw_read; | |
| 140 | wire [5:0] thread_id_mondo_24 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_24.interrupt_mapping_24_t_id_hw_read; | |
| 141 | wire [5:0] thread_id_mondo_25 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_25.interrupt_mapping_25_t_id_hw_read; | |
| 142 | wire [5:0] thread_id_mondo_26 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_26.interrupt_mapping_26_t_id_hw_read; | |
| 143 | wire [5:0] thread_id_mondo_27 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_27.interrupt_mapping_27_t_id_hw_read; | |
| 144 | wire [5:0] thread_id_mondo_28 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_28.interrupt_mapping_28_t_id_hw_read; | |
| 145 | wire [5:0] thread_id_mondo_29 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_29.interrupt_mapping_29_t_id_hw_read; | |
| 146 | ||
| 147 | wire [5:0] thread_id_mondo_30 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_30.interrupt_mapping_30_t_id_hw_read; | |
| 148 | wire [5:0] thread_id_mondo_31 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_31.interrupt_mapping_31_t_id_hw_read; | |
| 149 | wire [5:0] thread_id_mondo_32 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_32.interrupt_mapping_32_t_id_hw_read; | |
| 150 | wire [5:0] thread_id_mondo_33 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_33.interrupt_mapping_33_t_id_hw_read; | |
| 151 | wire [5:0] thread_id_mondo_34 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_34.interrupt_mapping_34_t_id_hw_read; | |
| 152 | wire [5:0] thread_id_mondo_35 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_35.interrupt_mapping_35_t_id_hw_read; | |
| 153 | wire [5:0] thread_id_mondo_36 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_36.interrupt_mapping_36_t_id_hw_read; | |
| 154 | wire [5:0] thread_id_mondo_37 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_37.interrupt_mapping_37_t_id_hw_read; | |
| 155 | wire [5:0] thread_id_mondo_38 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_38.interrupt_mapping_38_t_id_hw_read; | |
| 156 | wire [5:0] thread_id_mondo_39 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_39.interrupt_mapping_39_t_id_hw_read; | |
| 157 | ||
| 158 | wire [5:0] thread_id_mondo_40 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_40.interrupt_mapping_40_t_id_hw_read; | |
| 159 | wire [5:0] thread_id_mondo_41 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_41.interrupt_mapping_41_t_id_hw_read; | |
| 160 | wire [5:0] thread_id_mondo_42 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_42.interrupt_mapping_42_t_id_hw_read; | |
| 161 | wire [5:0] thread_id_mondo_43 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_43.interrupt_mapping_43_t_id_hw_read; | |
| 162 | wire [5:0] thread_id_mondo_44 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_44.interrupt_mapping_44_t_id_hw_read; | |
| 163 | wire [5:0] thread_id_mondo_45 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_45.interrupt_mapping_45_t_id_hw_read; | |
| 164 | wire [5:0] thread_id_mondo_46 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_46.interrupt_mapping_46_t_id_hw_read; | |
| 165 | wire [5:0] thread_id_mondo_47 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_47.interrupt_mapping_47_t_id_hw_read; | |
| 166 | wire [5:0] thread_id_mondo_48 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_48.interrupt_mapping_48_t_id_hw_read; | |
| 167 | wire [5:0] thread_id_mondo_49 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_49.interrupt_mapping_49_t_id_hw_read; | |
| 168 | ||
| 169 | wire [5:0] thread_id_mondo_50 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_50.interrupt_mapping_50_t_id_hw_read; | |
| 170 | wire [5:0] thread_id_mondo_51 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_51.interrupt_mapping_51_t_id_hw_read; | |
| 171 | wire [5:0] thread_id_mondo_52 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_52.interrupt_mapping_52_t_id_hw_read; | |
| 172 | wire [5:0] thread_id_mondo_53 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_53.interrupt_mapping_53_t_id_hw_read; | |
| 173 | wire [5:0] thread_id_mondo_54 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_54.interrupt_mapping_54_t_id_hw_read; | |
| 174 | wire [5:0] thread_id_mondo_55 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_55.interrupt_mapping_55_t_id_hw_read; | |
| 175 | wire [5:0] thread_id_mondo_56 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_56.interrupt_mapping_56_t_id_hw_read; | |
| 176 | wire [5:0] thread_id_mondo_57 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_57.interrupt_mapping_57_t_id_hw_read; | |
| 177 | wire [5:0] thread_id_mondo_58 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_58.interrupt_mapping_58_t_id_hw_read; | |
| 178 | wire [5:0] thread_id_mondo_59 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_59.interrupt_mapping_59_t_id_hw_read; | |
| 179 | ||
| 180 | wire [5:0] thread_id_mondo_62 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_62.interrupt_mapping_62_t_id_hw_read; | |
| 181 | wire [5:0] thread_id_mondo_63 = tb_top.cpu.dmu.dmc.imu.iss.csr.dmu_imu_iss_default_grp.interrupt_mapping_63.interrupt_mapping_63_t_id_hw_read; | |
| 182 | ||
| 183 | wire [41:0] seq_covered_status; | |
| 184 | ||
| 185 | ||
| 186 | mondo_reloc_cov_fsm cov_mondo_20 | |
| 187 | ( | |
| 188 | .clk (clk), | |
| 189 | .rst_l (rst_l), | |
| 190 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 191 | .current_thread_id (current_thread_id), | |
| 192 | .current_intctl_id (current_intctl_id), | |
| 193 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 194 | .int_ctl_id (my_id), | |
| 195 | .my_mondo_id (6'h14), | |
| 196 | .map_thread_id (thread_id_mondo_20), | |
| 197 | .seq_covered (seq_covered_status[0]) | |
| 198 | ); | |
| 199 | ||
| 200 | mondo_reloc_cov_fsm cov_mondo_21 | |
| 201 | ( | |
| 202 | .clk (clk), | |
| 203 | .rst_l (rst_l), | |
| 204 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 205 | .current_thread_id (current_thread_id), | |
| 206 | .current_intctl_id (current_intctl_id), | |
| 207 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 208 | .int_ctl_id (my_id), | |
| 209 | .my_mondo_id (6'h15), | |
| 210 | .map_thread_id (thread_id_mondo_21), | |
| 211 | .seq_covered (seq_covered_status[1]) | |
| 212 | ); | |
| 213 | ||
| 214 | mondo_reloc_cov_fsm cov_mondo_22 | |
| 215 | ( | |
| 216 | .clk (clk), | |
| 217 | .rst_l (rst_l), | |
| 218 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 219 | .current_thread_id (current_thread_id), | |
| 220 | .current_intctl_id (current_intctl_id), | |
| 221 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 222 | .int_ctl_id (my_id), | |
| 223 | .my_mondo_id (6'h16), | |
| 224 | .map_thread_id (thread_id_mondo_22), | |
| 225 | .seq_covered (seq_covered_status[2]) | |
| 226 | ); | |
| 227 | ||
| 228 | mondo_reloc_cov_fsm cov_mondo_23 | |
| 229 | ( | |
| 230 | .clk (clk), | |
| 231 | .rst_l (rst_l), | |
| 232 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 233 | .current_thread_id (current_thread_id), | |
| 234 | .current_intctl_id (current_intctl_id), | |
| 235 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 236 | .int_ctl_id (my_id), | |
| 237 | .my_mondo_id (6'h17), | |
| 238 | .map_thread_id (thread_id_mondo_23), | |
| 239 | .seq_covered (seq_covered_status[3]) | |
| 240 | ); | |
| 241 | ||
| 242 | mondo_reloc_cov_fsm cov_mondo_24 | |
| 243 | ( | |
| 244 | .clk (clk), | |
| 245 | .rst_l (rst_l), | |
| 246 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 247 | .current_thread_id (current_thread_id), | |
| 248 | .current_intctl_id (current_intctl_id), | |
| 249 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 250 | .int_ctl_id (my_id), | |
| 251 | .my_mondo_id (6'h18), | |
| 252 | .map_thread_id (thread_id_mondo_24), | |
| 253 | .seq_covered (seq_covered_status[4]) | |
| 254 | ); | |
| 255 | ||
| 256 | mondo_reloc_cov_fsm cov_mondo_25 | |
| 257 | ( | |
| 258 | .clk (clk), | |
| 259 | .rst_l (rst_l), | |
| 260 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 261 | .current_thread_id (current_thread_id), | |
| 262 | .current_intctl_id (current_intctl_id), | |
| 263 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 264 | .int_ctl_id (my_id), | |
| 265 | .my_mondo_id (6'h19), | |
| 266 | .map_thread_id (thread_id_mondo_25), | |
| 267 | .seq_covered (seq_covered_status[5]) | |
| 268 | ); | |
| 269 | ||
| 270 | mondo_reloc_cov_fsm cov_mondo_26 | |
| 271 | ( | |
| 272 | .clk (clk), | |
| 273 | .rst_l (rst_l), | |
| 274 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 275 | .current_thread_id (current_thread_id), | |
| 276 | .current_intctl_id (current_intctl_id), | |
| 277 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 278 | .int_ctl_id (my_id), | |
| 279 | .my_mondo_id (6'h1a), | |
| 280 | .map_thread_id (thread_id_mondo_26), | |
| 281 | .seq_covered (seq_covered_status[6]) | |
| 282 | ); | |
| 283 | ||
| 284 | mondo_reloc_cov_fsm cov_mondo_27 | |
| 285 | ( | |
| 286 | .clk (clk), | |
| 287 | .rst_l (rst_l), | |
| 288 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 289 | .current_thread_id (current_thread_id), | |
| 290 | .current_intctl_id (current_intctl_id), | |
| 291 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 292 | .int_ctl_id (my_id), | |
| 293 | .my_mondo_id (6'h1b), | |
| 294 | .map_thread_id (thread_id_mondo_27), | |
| 295 | .seq_covered (seq_covered_status[7]) | |
| 296 | ); | |
| 297 | ||
| 298 | mondo_reloc_cov_fsm cov_mondo_28 | |
| 299 | ( | |
| 300 | .clk (clk), | |
| 301 | .rst_l (rst_l), | |
| 302 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 303 | .current_thread_id (current_thread_id), | |
| 304 | .current_intctl_id (current_intctl_id), | |
| 305 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 306 | .int_ctl_id (my_id), | |
| 307 | .my_mondo_id (6'h1c), | |
| 308 | .map_thread_id (thread_id_mondo_28), | |
| 309 | .seq_covered (seq_covered_status[8]) | |
| 310 | ); | |
| 311 | ||
| 312 | mondo_reloc_cov_fsm cov_mondo_29 | |
| 313 | ( | |
| 314 | .clk (clk), | |
| 315 | .rst_l (rst_l), | |
| 316 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 317 | .current_thread_id (current_thread_id), | |
| 318 | .current_intctl_id (current_intctl_id), | |
| 319 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 320 | .int_ctl_id (my_id), | |
| 321 | .my_mondo_id (6'h1d), | |
| 322 | .map_thread_id (thread_id_mondo_29), | |
| 323 | .seq_covered (seq_covered_status[9]) | |
| 324 | ); | |
| 325 | ||
| 326 | mondo_reloc_cov_fsm cov_mondo_30 | |
| 327 | ( | |
| 328 | .clk (clk), | |
| 329 | .rst_l (rst_l), | |
| 330 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 331 | .current_thread_id (current_thread_id), | |
| 332 | .current_intctl_id (current_intctl_id), | |
| 333 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 334 | .int_ctl_id (my_id), | |
| 335 | .my_mondo_id (6'h1e), | |
| 336 | .map_thread_id (thread_id_mondo_30), | |
| 337 | .seq_covered (seq_covered_status[10]) | |
| 338 | ); | |
| 339 | ||
| 340 | mondo_reloc_cov_fsm cov_mondo_31 | |
| 341 | ( | |
| 342 | .clk (clk), | |
| 343 | .rst_l (rst_l), | |
| 344 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 345 | .current_thread_id (current_thread_id), | |
| 346 | .current_intctl_id (current_intctl_id), | |
| 347 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 348 | .int_ctl_id (my_id), | |
| 349 | .my_mondo_id (6'h1f), | |
| 350 | .map_thread_id (thread_id_mondo_31), | |
| 351 | .seq_covered (seq_covered_status[11]) | |
| 352 | ); | |
| 353 | ||
| 354 | mondo_reloc_cov_fsm cov_mondo_32 | |
| 355 | ( | |
| 356 | .clk (clk), | |
| 357 | .rst_l (rst_l), | |
| 358 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 359 | .current_thread_id (current_thread_id), | |
| 360 | .current_intctl_id (current_intctl_id), | |
| 361 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 362 | .int_ctl_id (my_id), | |
| 363 | .my_mondo_id (6'h20), | |
| 364 | .map_thread_id (thread_id_mondo_32), | |
| 365 | .seq_covered (seq_covered_status[12]) | |
| 366 | ); | |
| 367 | ||
| 368 | mondo_reloc_cov_fsm cov_mondo_33 | |
| 369 | ( | |
| 370 | .clk (clk), | |
| 371 | .rst_l (rst_l), | |
| 372 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 373 | .current_thread_id (current_thread_id), | |
| 374 | .current_intctl_id (current_intctl_id), | |
| 375 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 376 | .int_ctl_id (my_id), | |
| 377 | .my_mondo_id (6'h21), | |
| 378 | .map_thread_id (thread_id_mondo_33), | |
| 379 | .seq_covered (seq_covered_status[13]) | |
| 380 | ); | |
| 381 | ||
| 382 | mondo_reloc_cov_fsm cov_mondo_34 | |
| 383 | ( | |
| 384 | .clk (clk), | |
| 385 | .rst_l (rst_l), | |
| 386 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 387 | .current_thread_id (current_thread_id), | |
| 388 | .current_intctl_id (current_intctl_id), | |
| 389 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 390 | .int_ctl_id (my_id), | |
| 391 | .my_mondo_id (6'h22), | |
| 392 | .map_thread_id (thread_id_mondo_34), | |
| 393 | .seq_covered (seq_covered_status[14]) | |
| 394 | ); | |
| 395 | ||
| 396 | mondo_reloc_cov_fsm cov_mondo_35 | |
| 397 | ( | |
| 398 | .clk (clk), | |
| 399 | .rst_l (rst_l), | |
| 400 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 401 | .current_thread_id (current_thread_id), | |
| 402 | .current_intctl_id (current_intctl_id), | |
| 403 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 404 | .int_ctl_id (my_id), | |
| 405 | .my_mondo_id (6'h23), | |
| 406 | .map_thread_id (thread_id_mondo_35), | |
| 407 | .seq_covered (seq_covered_status[15]) | |
| 408 | ); | |
| 409 | ||
| 410 | mondo_reloc_cov_fsm cov_mondo_36 | |
| 411 | ( | |
| 412 | .clk (clk), | |
| 413 | .rst_l (rst_l), | |
| 414 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 415 | .current_thread_id (current_thread_id), | |
| 416 | .current_intctl_id (current_intctl_id), | |
| 417 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 418 | .int_ctl_id (my_id), | |
| 419 | .my_mondo_id (6'h24), | |
| 420 | .map_thread_id (thread_id_mondo_36), | |
| 421 | .seq_covered (seq_covered_status[16]) | |
| 422 | ); | |
| 423 | ||
| 424 | mondo_reloc_cov_fsm cov_mondo_37 | |
| 425 | ( | |
| 426 | .clk (clk), | |
| 427 | .rst_l (rst_l), | |
| 428 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 429 | .current_thread_id (current_thread_id), | |
| 430 | .current_intctl_id (current_intctl_id), | |
| 431 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 432 | .int_ctl_id (my_id), | |
| 433 | .my_mondo_id (6'h25), | |
| 434 | .map_thread_id (thread_id_mondo_37), | |
| 435 | .seq_covered (seq_covered_status[17]) | |
| 436 | ); | |
| 437 | ||
| 438 | mondo_reloc_cov_fsm cov_mondo_38 | |
| 439 | ( | |
| 440 | .clk (clk), | |
| 441 | .rst_l (rst_l), | |
| 442 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 443 | .current_thread_id (current_thread_id), | |
| 444 | .current_intctl_id (current_intctl_id), | |
| 445 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 446 | .int_ctl_id (my_id), | |
| 447 | .my_mondo_id (6'h26), | |
| 448 | .map_thread_id (thread_id_mondo_38), | |
| 449 | .seq_covered (seq_covered_status[18]) | |
| 450 | ); | |
| 451 | ||
| 452 | mondo_reloc_cov_fsm cov_mondo_39 | |
| 453 | ( | |
| 454 | .clk (clk), | |
| 455 | .rst_l (rst_l), | |
| 456 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 457 | .current_thread_id (current_thread_id), | |
| 458 | .current_intctl_id (current_intctl_id), | |
| 459 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 460 | .int_ctl_id (my_id), | |
| 461 | .my_mondo_id (6'h27), | |
| 462 | .map_thread_id (thread_id_mondo_39), | |
| 463 | .seq_covered (seq_covered_status[19]) | |
| 464 | ); | |
| 465 | ||
| 466 | mondo_reloc_cov_fsm cov_mondo_40 | |
| 467 | ( | |
| 468 | .clk (clk), | |
| 469 | .rst_l (rst_l), | |
| 470 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 471 | .current_thread_id (current_thread_id), | |
| 472 | .current_intctl_id (current_intctl_id), | |
| 473 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 474 | .int_ctl_id (my_id), | |
| 475 | .my_mondo_id (6'h28), | |
| 476 | .map_thread_id (thread_id_mondo_40), | |
| 477 | .seq_covered (seq_covered_status[20]) | |
| 478 | ); | |
| 479 | ||
| 480 | mondo_reloc_cov_fsm cov_mondo_41 | |
| 481 | ( | |
| 482 | .clk (clk), | |
| 483 | .rst_l (rst_l), | |
| 484 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 485 | .current_thread_id (current_thread_id), | |
| 486 | .current_intctl_id (current_intctl_id), | |
| 487 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 488 | .int_ctl_id (my_id), | |
| 489 | .my_mondo_id (6'h29), | |
| 490 | .map_thread_id (thread_id_mondo_41), | |
| 491 | .seq_covered (seq_covered_status[21]) | |
| 492 | ); | |
| 493 | ||
| 494 | mondo_reloc_cov_fsm cov_mondo_42 | |
| 495 | ( | |
| 496 | .clk (clk), | |
| 497 | .rst_l (rst_l), | |
| 498 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 499 | .current_thread_id (current_thread_id), | |
| 500 | .current_intctl_id (current_intctl_id), | |
| 501 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 502 | .int_ctl_id (my_id), | |
| 503 | .my_mondo_id (6'h2a), | |
| 504 | .map_thread_id (thread_id_mondo_42), | |
| 505 | .seq_covered (seq_covered_status[22]) | |
| 506 | ); | |
| 507 | ||
| 508 | mondo_reloc_cov_fsm cov_mondo_43 | |
| 509 | ( | |
| 510 | .clk (clk), | |
| 511 | .rst_l (rst_l), | |
| 512 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 513 | .current_thread_id (current_thread_id), | |
| 514 | .current_intctl_id (current_intctl_id), | |
| 515 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 516 | .int_ctl_id (my_id), | |
| 517 | .my_mondo_id (6'h2b), | |
| 518 | .map_thread_id (thread_id_mondo_43), | |
| 519 | .seq_covered (seq_covered_status[23]) | |
| 520 | ); | |
| 521 | ||
| 522 | mondo_reloc_cov_fsm cov_mondo_44 | |
| 523 | ( | |
| 524 | .clk (clk), | |
| 525 | .rst_l (rst_l), | |
| 526 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 527 | .current_thread_id (current_thread_id), | |
| 528 | .current_intctl_id (current_intctl_id), | |
| 529 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 530 | .int_ctl_id (my_id), | |
| 531 | .my_mondo_id (6'h2c), | |
| 532 | .map_thread_id (thread_id_mondo_44), | |
| 533 | .seq_covered (seq_covered_status[24]) | |
| 534 | ); | |
| 535 | ||
| 536 | mondo_reloc_cov_fsm cov_mondo_45 | |
| 537 | ( | |
| 538 | .clk (clk), | |
| 539 | .rst_l (rst_l), | |
| 540 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 541 | .current_thread_id (current_thread_id), | |
| 542 | .current_intctl_id (current_intctl_id), | |
| 543 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 544 | .int_ctl_id (my_id), | |
| 545 | .my_mondo_id (6'h2d), | |
| 546 | .map_thread_id (thread_id_mondo_45), | |
| 547 | .seq_covered (seq_covered_status[25]) | |
| 548 | ); | |
| 549 | ||
| 550 | mondo_reloc_cov_fsm cov_mondo_46 | |
| 551 | ( | |
| 552 | .clk (clk), | |
| 553 | .rst_l (rst_l), | |
| 554 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 555 | .current_thread_id (current_thread_id), | |
| 556 | .current_intctl_id (current_intctl_id), | |
| 557 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 558 | .int_ctl_id (my_id), | |
| 559 | .my_mondo_id (6'h2e), | |
| 560 | .map_thread_id (thread_id_mondo_46), | |
| 561 | .seq_covered (seq_covered_status[26]) | |
| 562 | ); | |
| 563 | ||
| 564 | mondo_reloc_cov_fsm cov_mondo_47 | |
| 565 | ( | |
| 566 | .clk (clk), | |
| 567 | .rst_l (rst_l), | |
| 568 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 569 | .current_thread_id (current_thread_id), | |
| 570 | .current_intctl_id (current_intctl_id), | |
| 571 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 572 | .int_ctl_id (my_id), | |
| 573 | .my_mondo_id (6'h2f), | |
| 574 | .map_thread_id (thread_id_mondo_47), | |
| 575 | .seq_covered (seq_covered_status[27]) | |
| 576 | ); | |
| 577 | ||
| 578 | mondo_reloc_cov_fsm cov_mondo_48 | |
| 579 | ( | |
| 580 | .clk (clk), | |
| 581 | .rst_l (rst_l), | |
| 582 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 583 | .current_thread_id (current_thread_id), | |
| 584 | .current_intctl_id (current_intctl_id), | |
| 585 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 586 | .int_ctl_id (my_id), | |
| 587 | .my_mondo_id (6'h30), | |
| 588 | .map_thread_id (thread_id_mondo_48), | |
| 589 | .seq_covered (seq_covered_status[28]) | |
| 590 | ); | |
| 591 | ||
| 592 | mondo_reloc_cov_fsm cov_mondo_49 | |
| 593 | ( | |
| 594 | .clk (clk), | |
| 595 | .rst_l (rst_l), | |
| 596 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 597 | .current_thread_id (current_thread_id), | |
| 598 | .current_intctl_id (current_intctl_id), | |
| 599 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 600 | .int_ctl_id (my_id), | |
| 601 | .my_mondo_id (6'h31), | |
| 602 | .map_thread_id (thread_id_mondo_49), | |
| 603 | .seq_covered (seq_covered_status[29]) | |
| 604 | ); | |
| 605 | ||
| 606 | mondo_reloc_cov_fsm cov_mondo_50 | |
| 607 | ( | |
| 608 | .clk (clk), | |
| 609 | .rst_l (rst_l), | |
| 610 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 611 | .current_thread_id (current_thread_id), | |
| 612 | .current_intctl_id (current_intctl_id), | |
| 613 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 614 | .int_ctl_id (my_id), | |
| 615 | .my_mondo_id (6'h32), | |
| 616 | .map_thread_id (thread_id_mondo_50), | |
| 617 | .seq_covered (seq_covered_status[30]) | |
| 618 | ); | |
| 619 | ||
| 620 | mondo_reloc_cov_fsm cov_mondo_51 | |
| 621 | ( | |
| 622 | .clk (clk), | |
| 623 | .rst_l (rst_l), | |
| 624 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 625 | .current_thread_id (current_thread_id), | |
| 626 | .current_intctl_id (current_intctl_id), | |
| 627 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 628 | .int_ctl_id (my_id), | |
| 629 | .my_mondo_id (6'h33), | |
| 630 | .map_thread_id (thread_id_mondo_51), | |
| 631 | .seq_covered (seq_covered_status[31]) | |
| 632 | ); | |
| 633 | ||
| 634 | mondo_reloc_cov_fsm cov_mondo_52 | |
| 635 | ( | |
| 636 | .clk (clk), | |
| 637 | .rst_l (rst_l), | |
| 638 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 639 | .current_thread_id (current_thread_id), | |
| 640 | .current_intctl_id (current_intctl_id), | |
| 641 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 642 | .int_ctl_id (my_id), | |
| 643 | .my_mondo_id (6'h34), | |
| 644 | .map_thread_id (thread_id_mondo_52), | |
| 645 | .seq_covered (seq_covered_status[32]) | |
| 646 | ); | |
| 647 | ||
| 648 | mondo_reloc_cov_fsm cov_mondo_53 | |
| 649 | ( | |
| 650 | .clk (clk), | |
| 651 | .rst_l (rst_l), | |
| 652 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 653 | .current_thread_id (current_thread_id), | |
| 654 | .current_intctl_id (current_intctl_id), | |
| 655 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 656 | .int_ctl_id (my_id), | |
| 657 | .my_mondo_id (6'h35), | |
| 658 | .map_thread_id (thread_id_mondo_53), | |
| 659 | .seq_covered (seq_covered_status[33]) | |
| 660 | ); | |
| 661 | ||
| 662 | mondo_reloc_cov_fsm cov_mondo_54 | |
| 663 | ( | |
| 664 | .clk (clk), | |
| 665 | .rst_l (rst_l), | |
| 666 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 667 | .current_thread_id (current_thread_id), | |
| 668 | .current_intctl_id (current_intctl_id), | |
| 669 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 670 | .int_ctl_id (my_id), | |
| 671 | .my_mondo_id (6'h36), | |
| 672 | .map_thread_id (thread_id_mondo_54), | |
| 673 | .seq_covered (seq_covered_status[34]) | |
| 674 | ); | |
| 675 | ||
| 676 | mondo_reloc_cov_fsm cov_mondo_55 | |
| 677 | ( | |
| 678 | .clk (clk), | |
| 679 | .rst_l (rst_l), | |
| 680 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 681 | .current_thread_id (current_thread_id), | |
| 682 | .current_intctl_id (current_intctl_id), | |
| 683 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 684 | .int_ctl_id (my_id), | |
| 685 | .my_mondo_id (6'h37), | |
| 686 | .map_thread_id (thread_id_mondo_55), | |
| 687 | .seq_covered (seq_covered_status[35]) | |
| 688 | ); | |
| 689 | ||
| 690 | mondo_reloc_cov_fsm cov_mondo_56 | |
| 691 | ( | |
| 692 | .clk (clk), | |
| 693 | .rst_l (rst_l), | |
| 694 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 695 | .current_thread_id (current_thread_id), | |
| 696 | .current_intctl_id (current_intctl_id), | |
| 697 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 698 | .int_ctl_id (my_id), | |
| 699 | .my_mondo_id (6'h38), | |
| 700 | .map_thread_id (thread_id_mondo_56), | |
| 701 | .seq_covered (seq_covered_status[36]) | |
| 702 | ); | |
| 703 | ||
| 704 | mondo_reloc_cov_fsm cov_mondo_57 | |
| 705 | ( | |
| 706 | .clk (clk), | |
| 707 | .rst_l (rst_l), | |
| 708 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 709 | .current_thread_id (current_thread_id), | |
| 710 | .current_intctl_id (current_intctl_id), | |
| 711 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 712 | .int_ctl_id (my_id), | |
| 713 | .my_mondo_id (6'h39), | |
| 714 | .map_thread_id (thread_id_mondo_57), | |
| 715 | .seq_covered (seq_covered_status[37]) | |
| 716 | ); | |
| 717 | ||
| 718 | mondo_reloc_cov_fsm cov_mondo_58 | |
| 719 | ( | |
| 720 | .clk (clk), | |
| 721 | .rst_l (rst_l), | |
| 722 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 723 | .current_thread_id (current_thread_id), | |
| 724 | .current_intctl_id (current_intctl_id), | |
| 725 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 726 | .int_ctl_id (my_id), | |
| 727 | .my_mondo_id (6'h3a), | |
| 728 | .map_thread_id (thread_id_mondo_58), | |
| 729 | .seq_covered (seq_covered_status[38]) | |
| 730 | ); | |
| 731 | ||
| 732 | mondo_reloc_cov_fsm cov_mondo_59 | |
| 733 | ( | |
| 734 | .clk (clk), | |
| 735 | .rst_l (rst_l), | |
| 736 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 737 | .current_thread_id (current_thread_id), | |
| 738 | .current_intctl_id (current_intctl_id), | |
| 739 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 740 | .int_ctl_id (my_id), | |
| 741 | .my_mondo_id (6'h3b), | |
| 742 | .map_thread_id (thread_id_mondo_59), | |
| 743 | .seq_covered (seq_covered_status[39]) | |
| 744 | ); | |
| 745 | ||
| 746 | mondo_reloc_cov_fsm cov_mondo_62 | |
| 747 | ( | |
| 748 | .clk (clk), | |
| 749 | .rst_l (rst_l), | |
| 750 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 751 | .current_thread_id (current_thread_id), | |
| 752 | .current_intctl_id (current_intctl_id), | |
| 753 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 754 | .int_ctl_id (my_id), | |
| 755 | .my_mondo_id (6'h3e), | |
| 756 | .map_thread_id (thread_id_mondo_62), | |
| 757 | .seq_covered (seq_covered_status[40]) | |
| 758 | ); | |
| 759 | ||
| 760 | mondo_reloc_cov_fsm cov_mondo_63 | |
| 761 | ( | |
| 762 | .clk (clk), | |
| 763 | .rst_l (rst_l), | |
| 764 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 765 | .current_thread_id (current_thread_id), | |
| 766 | .current_intctl_id (current_intctl_id), | |
| 767 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 768 | .int_ctl_id (my_id), | |
| 769 | .my_mondo_id (6'h3e), | |
| 770 | .map_thread_id (thread_id_mondo_63), | |
| 771 | .seq_covered (seq_covered_status[41]) | |
| 772 | ); | |
| 773 | endmodule | |
| 774 | ||
| 775 | ////////////////////////////////////////////////////////////////////////////////// | |
| 776 | module dmu_int_relocation_cov_mon(); | |
| 777 | ||
| 778 | wire clk; | |
| 779 | wire rst_l; | |
| 780 | wire im2rm_mdo_enq; | |
| 781 | wire [5:0] current_thread_id; | |
| 782 | wire [1:0] current_intctl_id; | |
| 783 | wire [5:0] current_mondo_intq_id; | |
| 784 | ||
| 785 | assign clk = tb_top.cpu.dmu.dmc.imu.gcs.csm.clk; | |
| 786 | assign rst_l = tb_top.cpu.dmu.dmc.imu.gcs.csm.rst_l; | |
| 787 | assign im2rm_mdo_enq = tb_top.cpu.dmu.dmc.imu.gcs.csm.im2rm_mdo_enq; | |
| 788 | assign current_thread_id = tb_top.cpu.dmu.dmc.imu.gcs.csm.iss2gcs_tid; | |
| 789 | assign current_intctl_id = tb_top.cpu.dmu.dmc.imu.gcs.csm.current_id; | |
| 790 | assign current_mondo_intq_id = tb_top.cpu.dmu.dmc.imu.gcs.csm.current_ino; | |
| 791 | ||
| 792 | wire [41:0] seq_covered_status_0, seq_covered_status_1, seq_covered_status_2, seq_covered_status_3; | |
| 793 | wire [41:0] seq_covered_status; | |
| 794 | assign seq_covered_status = (seq_covered_status_0 | seq_covered_status_1 | seq_covered_status_2 | seq_covered_status_3); | |
| 795 | ||
| 796 | intctl intctl0 ( | |
| 797 | .clk (clk), | |
| 798 | .rst_l (rst_l), | |
| 799 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 800 | .current_thread_id (current_thread_id), | |
| 801 | .current_intctl_id (current_intctl_id), | |
| 802 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 803 | .my_id (2'b00), | |
| 804 | .seq_covered_status (seq_covered_status_0) | |
| 805 | ); | |
| 806 | ||
| 807 | intctl intctl1 ( | |
| 808 | .clk (clk), | |
| 809 | .rst_l (rst_l), | |
| 810 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 811 | .current_thread_id (current_thread_id), | |
| 812 | .current_intctl_id (current_intctl_id), | |
| 813 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 814 | .my_id (2'b01), | |
| 815 | .seq_covered_status (seq_covered_status_1) | |
| 816 | ); | |
| 817 | ||
| 818 | ||
| 819 | intctl intctl2 ( | |
| 820 | .clk (clk), | |
| 821 | .rst_l (rst_l), | |
| 822 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 823 | .current_thread_id (current_thread_id), | |
| 824 | .current_intctl_id (current_intctl_id), | |
| 825 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 826 | .my_id (2'b10), | |
| 827 | .seq_covered_status (seq_covered_status_2) | |
| 828 | ); | |
| 829 | ||
| 830 | ||
| 831 | intctl intctl3 ( | |
| 832 | .clk (clk), | |
| 833 | .rst_l (rst_l), | |
| 834 | .im2rm_mdo_enq (im2rm_mdo_enq), | |
| 835 | .current_thread_id (current_thread_id), | |
| 836 | .current_intctl_id (current_intctl_id), | |
| 837 | .current_mondo_intq_id (current_mondo_intq_id), | |
| 838 | .my_id (2'b11), | |
| 839 | .seq_covered_status (seq_covered_status_3) | |
| 840 | ); | |
| 841 | ||
| 842 | endmodule |