Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / verilog / monitors / monitors.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: monitors.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module monitors;
36
37
38 `ifdef CORE_0
39// ma_mon_c0 ma_mon_c0();
40 lsu_mon_c0 lsu_mon_c0 ();
41 lru_mon_c0 lru_mon_c0 ();
42 `endif
43
44
45 `ifdef CORE_1
46// ma_mon_c1 ma_mon_c1();
47 lsu_mon_c1 lsu_mon_c1 ();
48 lru_mon_c1 lru_mon_c1 ();
49 `endif
50
51
52 `ifdef CORE_2
53// ma_mon_c2 ma_mon_c2();
54 lsu_mon_c2 lsu_mon_c2 ();
55 lru_mon_c2 lru_mon_c2 ();
56 `endif
57
58
59 `ifdef CORE_3
60// ma_mon_c3 ma_mon_c3();
61 lsu_mon_c3 lsu_mon_c3 ();
62 lru_mon_c3 lru_mon_c3 ();
63 `endif
64
65
66 `ifdef CORE_4
67// ma_mon_c4 ma_mon_c4();
68 lsu_mon_c4 lsu_mon_c4 ();
69 lru_mon_c4 lru_mon_c4 ();
70 `endif
71
72
73 `ifdef CORE_5
74// ma_mon_c5 ma_mon_c5();
75 lsu_mon_c5 lsu_mon_c5 ();
76 lru_mon_c5 lru_mon_c5 ();
77 `endif
78
79
80 `ifdef CORE_6
81// ma_mon_c6 ma_mon_c6();
82 lsu_mon_c6 lsu_mon_c6 ();
83 lru_mon_c6 lru_mon_c6 ();
84 `endif
85
86
87 `ifdef CORE_7
88// ma_mon_c7 ma_mon_c7();
89 lsu_mon_c7 lsu_mon_c7 ();
90 lru_mon_c7 lru_mon_c7 ();
91 `endif
92
93global_chkr global_chkr();
94
95endmodule
96//----------------------------------------------------------
97
98
99