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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: tlb_sync.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module tlb_sync; | |
36 | ||
37 | `include "nas.vh" | |
38 | `include "tlb_sync.vh" | |
39 | ||
40 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c0; | |
41 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c0; | |
42 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c0; | |
43 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c0; | |
44 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c0; | |
45 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c0; | |
46 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c0; | |
47 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c0; | |
48 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c1; | |
49 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c1; | |
50 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c1; | |
51 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c1; | |
52 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c1; | |
53 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c1; | |
54 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c1; | |
55 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c1; | |
56 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c2; | |
57 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c2; | |
58 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c2; | |
59 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c2; | |
60 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c2; | |
61 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c2; | |
62 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c2; | |
63 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c2; | |
64 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c3; | |
65 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c3; | |
66 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c3; | |
67 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c3; | |
68 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c3; | |
69 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c3; | |
70 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c3; | |
71 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c3; | |
72 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c4; | |
73 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c4; | |
74 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c4; | |
75 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c4; | |
76 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c4; | |
77 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c4; | |
78 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c4; | |
79 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c4; | |
80 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c5; | |
81 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c5; | |
82 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c5; | |
83 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c5; | |
84 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c5; | |
85 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c5; | |
86 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c5; | |
87 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c5; | |
88 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c6; | |
89 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c6; | |
90 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c6; | |
91 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c6; | |
92 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c6; | |
93 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c6; | |
94 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c6; | |
95 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c6; | |
96 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d0_c7; | |
97 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d1_c7; | |
98 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d2_c7; | |
99 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d3_c7; | |
100 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d4_c7; | |
101 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d5_c7; | |
102 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d6_c7; | |
103 | wire [(`TLB_FIFO_WIDTH-1):0] itlb_pipe_d7_c7; | |
104 | ||
105 | ||
106 | `ifdef CORE_0 | |
107 | ||
108 | wire [7:0] nas_pipe_enabled_core0 = {`NASTOP.c0.t7.nas_pipe_enable, | |
109 | `NASTOP.c0.t6.nas_pipe_enable, | |
110 | `NASTOP.c0.t5.nas_pipe_enable, | |
111 | `NASTOP.c0.t4.nas_pipe_enable, | |
112 | `NASTOP.c0.t3.nas_pipe_enable, | |
113 | `NASTOP.c0.t2.nas_pipe_enable, | |
114 | `NASTOP.c0.t1.nas_pipe_enable, | |
115 | `NASTOP.c0.t0.nas_pipe_enable}; | |
116 | ||
117 | ||
118 | //---------------------------------------------------------- | |
119 | // I/DTLB miscellaneous sync and followme (1 per core) | |
120 | //---------------------------------------------------------- | |
121 | ||
122 | tlb_misc_c0 tlb_misc_c0 (); | |
123 | ||
124 | //---------------------------------------------------------- | |
125 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
126 | //---------------------------------------------------------- | |
127 | ||
128 | itlb_wr_c0 itlb_wr_c0 (); | |
129 | ||
130 | //---------------------------------------------------------- | |
131 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
132 | //---------------------------------------------------------- | |
133 | ||
134 | dtlb_wr_c0 dtlb_wr_c0 (); | |
135 | ||
136 | //---------------------------------------------------------- | |
137 | // ITLB read detection - pipeline (1 per thread group) | |
138 | //---------------------------------------------------------- | |
139 | itlb_rd_c0 itlb_rd_c0tg0 ( | |
140 | .mytg (1'h0), | |
141 | .itlb_pipe_d0 (itlb_pipe_d0_c0), | |
142 | .itlb_pipe_d1 (itlb_pipe_d1_c0), | |
143 | .itlb_pipe_d2 (itlb_pipe_d2_c0), | |
144 | .itlb_pipe_d3 (itlb_pipe_d3_c0) | |
145 | ); | |
146 | itlb_rd_c0 itlb_rd_c0tg1 ( | |
147 | .mytg (1'h1), | |
148 | .itlb_pipe_d0 (itlb_pipe_d4_c0), | |
149 | .itlb_pipe_d1 (itlb_pipe_d5_c0), | |
150 | .itlb_pipe_d2 (itlb_pipe_d6_c0), | |
151 | .itlb_pipe_d3 (itlb_pipe_d7_c0) | |
152 | ); | |
153 | ||
154 | //---------------------------------------------------------- | |
155 | // DTLB read detection (1 per thread group) | |
156 | //---------------------------------------------------------- | |
157 | ||
158 | dtlb_rd_c0 dtlb_rd_c0tg0 ( | |
159 | .mytg (1'h0) | |
160 | ); | |
161 | ||
162 | dtlb_rd_c0 dtlb_rd_c0tg1 ( | |
163 | .mytg (1'h1) | |
164 | ); | |
165 | ||
166 | //---------------------------------------------------------- | |
167 | //---------------------------------------------------------- | |
168 | ||
169 | //---------------------------------------------------------- | |
170 | // Shadow IFU Instruction Buffer (1 per thread) | |
171 | //---------------------------------------------------------- | |
172 | ||
173 | tlb_fifo_c0 tlb_fifo_c0t0 ( | |
174 | ||
175 | .mytid (3'h0), | |
176 | .itlb_pipe_d (itlb_pipe_d0_c0) | |
177 | ); | |
178 | ||
179 | //---------------------------------------------------------- | |
180 | ||
181 | //---------------------------------------------------------- | |
182 | // Shadow IFU Instruction Buffer (1 per thread) | |
183 | //---------------------------------------------------------- | |
184 | ||
185 | tlb_fifo_c0 tlb_fifo_c0t1 ( | |
186 | ||
187 | .mytid (3'h1), | |
188 | .itlb_pipe_d (itlb_pipe_d1_c0) | |
189 | ); | |
190 | ||
191 | //---------------------------------------------------------- | |
192 | ||
193 | //---------------------------------------------------------- | |
194 | // Shadow IFU Instruction Buffer (1 per thread) | |
195 | //---------------------------------------------------------- | |
196 | ||
197 | tlb_fifo_c0 tlb_fifo_c0t2 ( | |
198 | ||
199 | .mytid (3'h2), | |
200 | .itlb_pipe_d (itlb_pipe_d2_c0) | |
201 | ); | |
202 | ||
203 | //---------------------------------------------------------- | |
204 | ||
205 | //---------------------------------------------------------- | |
206 | // Shadow IFU Instruction Buffer (1 per thread) | |
207 | //---------------------------------------------------------- | |
208 | ||
209 | tlb_fifo_c0 tlb_fifo_c0t3 ( | |
210 | ||
211 | .mytid (3'h3), | |
212 | .itlb_pipe_d (itlb_pipe_d3_c0) | |
213 | ); | |
214 | ||
215 | //---------------------------------------------------------- | |
216 | ||
217 | //---------------------------------------------------------- | |
218 | // Shadow IFU Instruction Buffer (1 per thread) | |
219 | //---------------------------------------------------------- | |
220 | ||
221 | tlb_fifo_c0 tlb_fifo_c0t4 ( | |
222 | ||
223 | .mytid (3'h4), | |
224 | .itlb_pipe_d (itlb_pipe_d4_c0) | |
225 | ); | |
226 | ||
227 | //---------------------------------------------------------- | |
228 | ||
229 | //---------------------------------------------------------- | |
230 | // Shadow IFU Instruction Buffer (1 per thread) | |
231 | //---------------------------------------------------------- | |
232 | ||
233 | tlb_fifo_c0 tlb_fifo_c0t5 ( | |
234 | ||
235 | .mytid (3'h5), | |
236 | .itlb_pipe_d (itlb_pipe_d5_c0) | |
237 | ); | |
238 | ||
239 | //---------------------------------------------------------- | |
240 | ||
241 | //---------------------------------------------------------- | |
242 | // Shadow IFU Instruction Buffer (1 per thread) | |
243 | //---------------------------------------------------------- | |
244 | ||
245 | tlb_fifo_c0 tlb_fifo_c0t6 ( | |
246 | ||
247 | .mytid (3'h6), | |
248 | .itlb_pipe_d (itlb_pipe_d6_c0) | |
249 | ); | |
250 | ||
251 | //---------------------------------------------------------- | |
252 | ||
253 | //---------------------------------------------------------- | |
254 | // Shadow IFU Instruction Buffer (1 per thread) | |
255 | //---------------------------------------------------------- | |
256 | ||
257 | tlb_fifo_c0 tlb_fifo_c0t7 ( | |
258 | ||
259 | .mytid (3'h7), | |
260 | .itlb_pipe_d (itlb_pipe_d7_c0) | |
261 | ); | |
262 | ||
263 | `endif | |
264 | ||
265 | `ifdef CORE_1 | |
266 | ||
267 | wire [7:0] nas_pipe_enabled_core1 = {`NASTOP.c1.t7.nas_pipe_enable, | |
268 | `NASTOP.c1.t6.nas_pipe_enable, | |
269 | `NASTOP.c1.t5.nas_pipe_enable, | |
270 | `NASTOP.c1.t4.nas_pipe_enable, | |
271 | `NASTOP.c1.t3.nas_pipe_enable, | |
272 | `NASTOP.c1.t2.nas_pipe_enable, | |
273 | `NASTOP.c1.t1.nas_pipe_enable, | |
274 | `NASTOP.c1.t0.nas_pipe_enable}; | |
275 | ||
276 | ||
277 | //---------------------------------------------------------- | |
278 | // I/DTLB miscellaneous sync and followme (1 per core) | |
279 | //---------------------------------------------------------- | |
280 | ||
281 | tlb_misc_c1 tlb_misc_c1 (); | |
282 | ||
283 | //---------------------------------------------------------- | |
284 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
285 | //---------------------------------------------------------- | |
286 | ||
287 | itlb_wr_c1 itlb_wr_c1 (); | |
288 | ||
289 | //---------------------------------------------------------- | |
290 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
291 | //---------------------------------------------------------- | |
292 | ||
293 | dtlb_wr_c1 dtlb_wr_c1 (); | |
294 | ||
295 | //---------------------------------------------------------- | |
296 | // ITLB read detection - pipeline (1 per thread group) | |
297 | //---------------------------------------------------------- | |
298 | itlb_rd_c1 itlb_rd_c1tg0 ( | |
299 | .mytg (1'h0), | |
300 | .itlb_pipe_d0 (itlb_pipe_d0_c1), | |
301 | .itlb_pipe_d1 (itlb_pipe_d1_c1), | |
302 | .itlb_pipe_d2 (itlb_pipe_d2_c1), | |
303 | .itlb_pipe_d3 (itlb_pipe_d3_c1) | |
304 | ); | |
305 | itlb_rd_c1 itlb_rd_c1tg1 ( | |
306 | .mytg (1'h1), | |
307 | .itlb_pipe_d0 (itlb_pipe_d4_c1), | |
308 | .itlb_pipe_d1 (itlb_pipe_d5_c1), | |
309 | .itlb_pipe_d2 (itlb_pipe_d6_c1), | |
310 | .itlb_pipe_d3 (itlb_pipe_d7_c1) | |
311 | ); | |
312 | ||
313 | //---------------------------------------------------------- | |
314 | // DTLB read detection (1 per thread group) | |
315 | //---------------------------------------------------------- | |
316 | ||
317 | dtlb_rd_c1 dtlb_rd_c1tg0 ( | |
318 | .mytg (1'h0) | |
319 | ); | |
320 | ||
321 | dtlb_rd_c1 dtlb_rd_c1tg1 ( | |
322 | .mytg (1'h1) | |
323 | ); | |
324 | ||
325 | //---------------------------------------------------------- | |
326 | //---------------------------------------------------------- | |
327 | ||
328 | //---------------------------------------------------------- | |
329 | // Shadow IFU Instruction Buffer (1 per thread) | |
330 | //---------------------------------------------------------- | |
331 | ||
332 | tlb_fifo_c1 tlb_fifo_c1t0 ( | |
333 | ||
334 | .mytid (3'h0), | |
335 | .itlb_pipe_d (itlb_pipe_d0_c1) | |
336 | ); | |
337 | ||
338 | //---------------------------------------------------------- | |
339 | ||
340 | //---------------------------------------------------------- | |
341 | // Shadow IFU Instruction Buffer (1 per thread) | |
342 | //---------------------------------------------------------- | |
343 | ||
344 | tlb_fifo_c1 tlb_fifo_c1t1 ( | |
345 | ||
346 | .mytid (3'h1), | |
347 | .itlb_pipe_d (itlb_pipe_d1_c1) | |
348 | ); | |
349 | ||
350 | //---------------------------------------------------------- | |
351 | ||
352 | //---------------------------------------------------------- | |
353 | // Shadow IFU Instruction Buffer (1 per thread) | |
354 | //---------------------------------------------------------- | |
355 | ||
356 | tlb_fifo_c1 tlb_fifo_c1t2 ( | |
357 | ||
358 | .mytid (3'h2), | |
359 | .itlb_pipe_d (itlb_pipe_d2_c1) | |
360 | ); | |
361 | ||
362 | //---------------------------------------------------------- | |
363 | ||
364 | //---------------------------------------------------------- | |
365 | // Shadow IFU Instruction Buffer (1 per thread) | |
366 | //---------------------------------------------------------- | |
367 | ||
368 | tlb_fifo_c1 tlb_fifo_c1t3 ( | |
369 | ||
370 | .mytid (3'h3), | |
371 | .itlb_pipe_d (itlb_pipe_d3_c1) | |
372 | ); | |
373 | ||
374 | //---------------------------------------------------------- | |
375 | ||
376 | //---------------------------------------------------------- | |
377 | // Shadow IFU Instruction Buffer (1 per thread) | |
378 | //---------------------------------------------------------- | |
379 | ||
380 | tlb_fifo_c1 tlb_fifo_c1t4 ( | |
381 | ||
382 | .mytid (3'h4), | |
383 | .itlb_pipe_d (itlb_pipe_d4_c1) | |
384 | ); | |
385 | ||
386 | //---------------------------------------------------------- | |
387 | ||
388 | //---------------------------------------------------------- | |
389 | // Shadow IFU Instruction Buffer (1 per thread) | |
390 | //---------------------------------------------------------- | |
391 | ||
392 | tlb_fifo_c1 tlb_fifo_c1t5 ( | |
393 | ||
394 | .mytid (3'h5), | |
395 | .itlb_pipe_d (itlb_pipe_d5_c1) | |
396 | ); | |
397 | ||
398 | //---------------------------------------------------------- | |
399 | ||
400 | //---------------------------------------------------------- | |
401 | // Shadow IFU Instruction Buffer (1 per thread) | |
402 | //---------------------------------------------------------- | |
403 | ||
404 | tlb_fifo_c1 tlb_fifo_c1t6 ( | |
405 | ||
406 | .mytid (3'h6), | |
407 | .itlb_pipe_d (itlb_pipe_d6_c1) | |
408 | ); | |
409 | ||
410 | //---------------------------------------------------------- | |
411 | ||
412 | //---------------------------------------------------------- | |
413 | // Shadow IFU Instruction Buffer (1 per thread) | |
414 | //---------------------------------------------------------- | |
415 | ||
416 | tlb_fifo_c1 tlb_fifo_c1t7 ( | |
417 | ||
418 | .mytid (3'h7), | |
419 | .itlb_pipe_d (itlb_pipe_d7_c1) | |
420 | ); | |
421 | ||
422 | `endif | |
423 | ||
424 | `ifdef CORE_2 | |
425 | ||
426 | wire [7:0] nas_pipe_enabled_core2 = {`NASTOP.c2.t7.nas_pipe_enable, | |
427 | `NASTOP.c2.t6.nas_pipe_enable, | |
428 | `NASTOP.c2.t5.nas_pipe_enable, | |
429 | `NASTOP.c2.t4.nas_pipe_enable, | |
430 | `NASTOP.c2.t3.nas_pipe_enable, | |
431 | `NASTOP.c2.t2.nas_pipe_enable, | |
432 | `NASTOP.c2.t1.nas_pipe_enable, | |
433 | `NASTOP.c2.t0.nas_pipe_enable}; | |
434 | ||
435 | ||
436 | //---------------------------------------------------------- | |
437 | // I/DTLB miscellaneous sync and followme (1 per core) | |
438 | //---------------------------------------------------------- | |
439 | ||
440 | tlb_misc_c2 tlb_misc_c2 (); | |
441 | ||
442 | //---------------------------------------------------------- | |
443 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
444 | //---------------------------------------------------------- | |
445 | ||
446 | itlb_wr_c2 itlb_wr_c2 (); | |
447 | ||
448 | //---------------------------------------------------------- | |
449 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
450 | //---------------------------------------------------------- | |
451 | ||
452 | dtlb_wr_c2 dtlb_wr_c2 (); | |
453 | ||
454 | //---------------------------------------------------------- | |
455 | // ITLB read detection - pipeline (1 per thread group) | |
456 | //---------------------------------------------------------- | |
457 | itlb_rd_c2 itlb_rd_c2tg0 ( | |
458 | .mytg (1'h0), | |
459 | .itlb_pipe_d0 (itlb_pipe_d0_c2), | |
460 | .itlb_pipe_d1 (itlb_pipe_d1_c2), | |
461 | .itlb_pipe_d2 (itlb_pipe_d2_c2), | |
462 | .itlb_pipe_d3 (itlb_pipe_d3_c2) | |
463 | ); | |
464 | itlb_rd_c2 itlb_rd_c2tg1 ( | |
465 | .mytg (1'h1), | |
466 | .itlb_pipe_d0 (itlb_pipe_d4_c2), | |
467 | .itlb_pipe_d1 (itlb_pipe_d5_c2), | |
468 | .itlb_pipe_d2 (itlb_pipe_d6_c2), | |
469 | .itlb_pipe_d3 (itlb_pipe_d7_c2) | |
470 | ); | |
471 | ||
472 | //---------------------------------------------------------- | |
473 | // DTLB read detection (1 per thread group) | |
474 | //---------------------------------------------------------- | |
475 | ||
476 | dtlb_rd_c2 dtlb_rd_c2tg0 ( | |
477 | .mytg (1'h0) | |
478 | ); | |
479 | ||
480 | dtlb_rd_c2 dtlb_rd_c2tg1 ( | |
481 | .mytg (1'h1) | |
482 | ); | |
483 | ||
484 | //---------------------------------------------------------- | |
485 | //---------------------------------------------------------- | |
486 | ||
487 | //---------------------------------------------------------- | |
488 | // Shadow IFU Instruction Buffer (1 per thread) | |
489 | //---------------------------------------------------------- | |
490 | ||
491 | tlb_fifo_c2 tlb_fifo_c2t0 ( | |
492 | ||
493 | .mytid (3'h0), | |
494 | .itlb_pipe_d (itlb_pipe_d0_c2) | |
495 | ); | |
496 | ||
497 | //---------------------------------------------------------- | |
498 | ||
499 | //---------------------------------------------------------- | |
500 | // Shadow IFU Instruction Buffer (1 per thread) | |
501 | //---------------------------------------------------------- | |
502 | ||
503 | tlb_fifo_c2 tlb_fifo_c2t1 ( | |
504 | ||
505 | .mytid (3'h1), | |
506 | .itlb_pipe_d (itlb_pipe_d1_c2) | |
507 | ); | |
508 | ||
509 | //---------------------------------------------------------- | |
510 | ||
511 | //---------------------------------------------------------- | |
512 | // Shadow IFU Instruction Buffer (1 per thread) | |
513 | //---------------------------------------------------------- | |
514 | ||
515 | tlb_fifo_c2 tlb_fifo_c2t2 ( | |
516 | ||
517 | .mytid (3'h2), | |
518 | .itlb_pipe_d (itlb_pipe_d2_c2) | |
519 | ); | |
520 | ||
521 | //---------------------------------------------------------- | |
522 | ||
523 | //---------------------------------------------------------- | |
524 | // Shadow IFU Instruction Buffer (1 per thread) | |
525 | //---------------------------------------------------------- | |
526 | ||
527 | tlb_fifo_c2 tlb_fifo_c2t3 ( | |
528 | ||
529 | .mytid (3'h3), | |
530 | .itlb_pipe_d (itlb_pipe_d3_c2) | |
531 | ); | |
532 | ||
533 | //---------------------------------------------------------- | |
534 | ||
535 | //---------------------------------------------------------- | |
536 | // Shadow IFU Instruction Buffer (1 per thread) | |
537 | //---------------------------------------------------------- | |
538 | ||
539 | tlb_fifo_c2 tlb_fifo_c2t4 ( | |
540 | ||
541 | .mytid (3'h4), | |
542 | .itlb_pipe_d (itlb_pipe_d4_c2) | |
543 | ); | |
544 | ||
545 | //---------------------------------------------------------- | |
546 | ||
547 | //---------------------------------------------------------- | |
548 | // Shadow IFU Instruction Buffer (1 per thread) | |
549 | //---------------------------------------------------------- | |
550 | ||
551 | tlb_fifo_c2 tlb_fifo_c2t5 ( | |
552 | ||
553 | .mytid (3'h5), | |
554 | .itlb_pipe_d (itlb_pipe_d5_c2) | |
555 | ); | |
556 | ||
557 | //---------------------------------------------------------- | |
558 | ||
559 | //---------------------------------------------------------- | |
560 | // Shadow IFU Instruction Buffer (1 per thread) | |
561 | //---------------------------------------------------------- | |
562 | ||
563 | tlb_fifo_c2 tlb_fifo_c2t6 ( | |
564 | ||
565 | .mytid (3'h6), | |
566 | .itlb_pipe_d (itlb_pipe_d6_c2) | |
567 | ); | |
568 | ||
569 | //---------------------------------------------------------- | |
570 | ||
571 | //---------------------------------------------------------- | |
572 | // Shadow IFU Instruction Buffer (1 per thread) | |
573 | //---------------------------------------------------------- | |
574 | ||
575 | tlb_fifo_c2 tlb_fifo_c2t7 ( | |
576 | ||
577 | .mytid (3'h7), | |
578 | .itlb_pipe_d (itlb_pipe_d7_c2) | |
579 | ); | |
580 | ||
581 | `endif | |
582 | ||
583 | `ifdef CORE_3 | |
584 | ||
585 | wire [7:0] nas_pipe_enabled_core3 = {`NASTOP.c3.t7.nas_pipe_enable, | |
586 | `NASTOP.c3.t6.nas_pipe_enable, | |
587 | `NASTOP.c3.t5.nas_pipe_enable, | |
588 | `NASTOP.c3.t4.nas_pipe_enable, | |
589 | `NASTOP.c3.t3.nas_pipe_enable, | |
590 | `NASTOP.c3.t2.nas_pipe_enable, | |
591 | `NASTOP.c3.t1.nas_pipe_enable, | |
592 | `NASTOP.c3.t0.nas_pipe_enable}; | |
593 | ||
594 | ||
595 | //---------------------------------------------------------- | |
596 | // I/DTLB miscellaneous sync and followme (1 per core) | |
597 | //---------------------------------------------------------- | |
598 | ||
599 | tlb_misc_c3 tlb_misc_c3 (); | |
600 | ||
601 | //---------------------------------------------------------- | |
602 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
603 | //---------------------------------------------------------- | |
604 | ||
605 | itlb_wr_c3 itlb_wr_c3 (); | |
606 | ||
607 | //---------------------------------------------------------- | |
608 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
609 | //---------------------------------------------------------- | |
610 | ||
611 | dtlb_wr_c3 dtlb_wr_c3 (); | |
612 | ||
613 | //---------------------------------------------------------- | |
614 | // ITLB read detection - pipeline (1 per thread group) | |
615 | //---------------------------------------------------------- | |
616 | itlb_rd_c3 itlb_rd_c3tg0 ( | |
617 | .mytg (1'h0), | |
618 | .itlb_pipe_d0 (itlb_pipe_d0_c3), | |
619 | .itlb_pipe_d1 (itlb_pipe_d1_c3), | |
620 | .itlb_pipe_d2 (itlb_pipe_d2_c3), | |
621 | .itlb_pipe_d3 (itlb_pipe_d3_c3) | |
622 | ); | |
623 | itlb_rd_c3 itlb_rd_c3tg1 ( | |
624 | .mytg (1'h1), | |
625 | .itlb_pipe_d0 (itlb_pipe_d4_c3), | |
626 | .itlb_pipe_d1 (itlb_pipe_d5_c3), | |
627 | .itlb_pipe_d2 (itlb_pipe_d6_c3), | |
628 | .itlb_pipe_d3 (itlb_pipe_d7_c3) | |
629 | ); | |
630 | ||
631 | //---------------------------------------------------------- | |
632 | // DTLB read detection (1 per thread group) | |
633 | //---------------------------------------------------------- | |
634 | ||
635 | dtlb_rd_c3 dtlb_rd_c3tg0 ( | |
636 | .mytg (1'h0) | |
637 | ); | |
638 | ||
639 | dtlb_rd_c3 dtlb_rd_c3tg1 ( | |
640 | .mytg (1'h1) | |
641 | ); | |
642 | ||
643 | //---------------------------------------------------------- | |
644 | //---------------------------------------------------------- | |
645 | ||
646 | //---------------------------------------------------------- | |
647 | // Shadow IFU Instruction Buffer (1 per thread) | |
648 | //---------------------------------------------------------- | |
649 | ||
650 | tlb_fifo_c3 tlb_fifo_c3t0 ( | |
651 | ||
652 | .mytid (3'h0), | |
653 | .itlb_pipe_d (itlb_pipe_d0_c3) | |
654 | ); | |
655 | ||
656 | //---------------------------------------------------------- | |
657 | ||
658 | //---------------------------------------------------------- | |
659 | // Shadow IFU Instruction Buffer (1 per thread) | |
660 | //---------------------------------------------------------- | |
661 | ||
662 | tlb_fifo_c3 tlb_fifo_c3t1 ( | |
663 | ||
664 | .mytid (3'h1), | |
665 | .itlb_pipe_d (itlb_pipe_d1_c3) | |
666 | ); | |
667 | ||
668 | //---------------------------------------------------------- | |
669 | ||
670 | //---------------------------------------------------------- | |
671 | // Shadow IFU Instruction Buffer (1 per thread) | |
672 | //---------------------------------------------------------- | |
673 | ||
674 | tlb_fifo_c3 tlb_fifo_c3t2 ( | |
675 | ||
676 | .mytid (3'h2), | |
677 | .itlb_pipe_d (itlb_pipe_d2_c3) | |
678 | ); | |
679 | ||
680 | //---------------------------------------------------------- | |
681 | ||
682 | //---------------------------------------------------------- | |
683 | // Shadow IFU Instruction Buffer (1 per thread) | |
684 | //---------------------------------------------------------- | |
685 | ||
686 | tlb_fifo_c3 tlb_fifo_c3t3 ( | |
687 | ||
688 | .mytid (3'h3), | |
689 | .itlb_pipe_d (itlb_pipe_d3_c3) | |
690 | ); | |
691 | ||
692 | //---------------------------------------------------------- | |
693 | ||
694 | //---------------------------------------------------------- | |
695 | // Shadow IFU Instruction Buffer (1 per thread) | |
696 | //---------------------------------------------------------- | |
697 | ||
698 | tlb_fifo_c3 tlb_fifo_c3t4 ( | |
699 | ||
700 | .mytid (3'h4), | |
701 | .itlb_pipe_d (itlb_pipe_d4_c3) | |
702 | ); | |
703 | ||
704 | //---------------------------------------------------------- | |
705 | ||
706 | //---------------------------------------------------------- | |
707 | // Shadow IFU Instruction Buffer (1 per thread) | |
708 | //---------------------------------------------------------- | |
709 | ||
710 | tlb_fifo_c3 tlb_fifo_c3t5 ( | |
711 | ||
712 | .mytid (3'h5), | |
713 | .itlb_pipe_d (itlb_pipe_d5_c3) | |
714 | ); | |
715 | ||
716 | //---------------------------------------------------------- | |
717 | ||
718 | //---------------------------------------------------------- | |
719 | // Shadow IFU Instruction Buffer (1 per thread) | |
720 | //---------------------------------------------------------- | |
721 | ||
722 | tlb_fifo_c3 tlb_fifo_c3t6 ( | |
723 | ||
724 | .mytid (3'h6), | |
725 | .itlb_pipe_d (itlb_pipe_d6_c3) | |
726 | ); | |
727 | ||
728 | //---------------------------------------------------------- | |
729 | ||
730 | //---------------------------------------------------------- | |
731 | // Shadow IFU Instruction Buffer (1 per thread) | |
732 | //---------------------------------------------------------- | |
733 | ||
734 | tlb_fifo_c3 tlb_fifo_c3t7 ( | |
735 | ||
736 | .mytid (3'h7), | |
737 | .itlb_pipe_d (itlb_pipe_d7_c3) | |
738 | ); | |
739 | ||
740 | `endif | |
741 | ||
742 | `ifdef CORE_4 | |
743 | ||
744 | wire [7:0] nas_pipe_enabled_core4 = {`NASTOP.c4.t7.nas_pipe_enable, | |
745 | `NASTOP.c4.t6.nas_pipe_enable, | |
746 | `NASTOP.c4.t5.nas_pipe_enable, | |
747 | `NASTOP.c4.t4.nas_pipe_enable, | |
748 | `NASTOP.c4.t3.nas_pipe_enable, | |
749 | `NASTOP.c4.t2.nas_pipe_enable, | |
750 | `NASTOP.c4.t1.nas_pipe_enable, | |
751 | `NASTOP.c4.t0.nas_pipe_enable}; | |
752 | ||
753 | ||
754 | //---------------------------------------------------------- | |
755 | // I/DTLB miscellaneous sync and followme (1 per core) | |
756 | //---------------------------------------------------------- | |
757 | ||
758 | tlb_misc_c4 tlb_misc_c4 (); | |
759 | ||
760 | //---------------------------------------------------------- | |
761 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
762 | //---------------------------------------------------------- | |
763 | ||
764 | itlb_wr_c4 itlb_wr_c4 (); | |
765 | ||
766 | //---------------------------------------------------------- | |
767 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
768 | //---------------------------------------------------------- | |
769 | ||
770 | dtlb_wr_c4 dtlb_wr_c4 (); | |
771 | ||
772 | //---------------------------------------------------------- | |
773 | // ITLB read detection - pipeline (1 per thread group) | |
774 | //---------------------------------------------------------- | |
775 | itlb_rd_c4 itlb_rd_c4tg0 ( | |
776 | .mytg (1'h0), | |
777 | .itlb_pipe_d0 (itlb_pipe_d0_c4), | |
778 | .itlb_pipe_d1 (itlb_pipe_d1_c4), | |
779 | .itlb_pipe_d2 (itlb_pipe_d2_c4), | |
780 | .itlb_pipe_d3 (itlb_pipe_d3_c4) | |
781 | ); | |
782 | itlb_rd_c4 itlb_rd_c4tg1 ( | |
783 | .mytg (1'h1), | |
784 | .itlb_pipe_d0 (itlb_pipe_d4_c4), | |
785 | .itlb_pipe_d1 (itlb_pipe_d5_c4), | |
786 | .itlb_pipe_d2 (itlb_pipe_d6_c4), | |
787 | .itlb_pipe_d3 (itlb_pipe_d7_c4) | |
788 | ); | |
789 | ||
790 | //---------------------------------------------------------- | |
791 | // DTLB read detection (1 per thread group) | |
792 | //---------------------------------------------------------- | |
793 | ||
794 | dtlb_rd_c4 dtlb_rd_c4tg0 ( | |
795 | .mytg (1'h0) | |
796 | ); | |
797 | ||
798 | dtlb_rd_c4 dtlb_rd_c4tg1 ( | |
799 | .mytg (1'h1) | |
800 | ); | |
801 | ||
802 | //---------------------------------------------------------- | |
803 | //---------------------------------------------------------- | |
804 | ||
805 | //---------------------------------------------------------- | |
806 | // Shadow IFU Instruction Buffer (1 per thread) | |
807 | //---------------------------------------------------------- | |
808 | ||
809 | tlb_fifo_c4 tlb_fifo_c4t0 ( | |
810 | ||
811 | .mytid (3'h0), | |
812 | .itlb_pipe_d (itlb_pipe_d0_c4) | |
813 | ); | |
814 | ||
815 | //---------------------------------------------------------- | |
816 | ||
817 | //---------------------------------------------------------- | |
818 | // Shadow IFU Instruction Buffer (1 per thread) | |
819 | //---------------------------------------------------------- | |
820 | ||
821 | tlb_fifo_c4 tlb_fifo_c4t1 ( | |
822 | ||
823 | .mytid (3'h1), | |
824 | .itlb_pipe_d (itlb_pipe_d1_c4) | |
825 | ); | |
826 | ||
827 | //---------------------------------------------------------- | |
828 | ||
829 | //---------------------------------------------------------- | |
830 | // Shadow IFU Instruction Buffer (1 per thread) | |
831 | //---------------------------------------------------------- | |
832 | ||
833 | tlb_fifo_c4 tlb_fifo_c4t2 ( | |
834 | ||
835 | .mytid (3'h2), | |
836 | .itlb_pipe_d (itlb_pipe_d2_c4) | |
837 | ); | |
838 | ||
839 | //---------------------------------------------------------- | |
840 | ||
841 | //---------------------------------------------------------- | |
842 | // Shadow IFU Instruction Buffer (1 per thread) | |
843 | //---------------------------------------------------------- | |
844 | ||
845 | tlb_fifo_c4 tlb_fifo_c4t3 ( | |
846 | ||
847 | .mytid (3'h3), | |
848 | .itlb_pipe_d (itlb_pipe_d3_c4) | |
849 | ); | |
850 | ||
851 | //---------------------------------------------------------- | |
852 | ||
853 | //---------------------------------------------------------- | |
854 | // Shadow IFU Instruction Buffer (1 per thread) | |
855 | //---------------------------------------------------------- | |
856 | ||
857 | tlb_fifo_c4 tlb_fifo_c4t4 ( | |
858 | ||
859 | .mytid (3'h4), | |
860 | .itlb_pipe_d (itlb_pipe_d4_c4) | |
861 | ); | |
862 | ||
863 | //---------------------------------------------------------- | |
864 | ||
865 | //---------------------------------------------------------- | |
866 | // Shadow IFU Instruction Buffer (1 per thread) | |
867 | //---------------------------------------------------------- | |
868 | ||
869 | tlb_fifo_c4 tlb_fifo_c4t5 ( | |
870 | ||
871 | .mytid (3'h5), | |
872 | .itlb_pipe_d (itlb_pipe_d5_c4) | |
873 | ); | |
874 | ||
875 | //---------------------------------------------------------- | |
876 | ||
877 | //---------------------------------------------------------- | |
878 | // Shadow IFU Instruction Buffer (1 per thread) | |
879 | //---------------------------------------------------------- | |
880 | ||
881 | tlb_fifo_c4 tlb_fifo_c4t6 ( | |
882 | ||
883 | .mytid (3'h6), | |
884 | .itlb_pipe_d (itlb_pipe_d6_c4) | |
885 | ); | |
886 | ||
887 | //---------------------------------------------------------- | |
888 | ||
889 | //---------------------------------------------------------- | |
890 | // Shadow IFU Instruction Buffer (1 per thread) | |
891 | //---------------------------------------------------------- | |
892 | ||
893 | tlb_fifo_c4 tlb_fifo_c4t7 ( | |
894 | ||
895 | .mytid (3'h7), | |
896 | .itlb_pipe_d (itlb_pipe_d7_c4) | |
897 | ); | |
898 | ||
899 | `endif | |
900 | ||
901 | `ifdef CORE_5 | |
902 | ||
903 | wire [7:0] nas_pipe_enabled_core5 = {`NASTOP.c5.t7.nas_pipe_enable, | |
904 | `NASTOP.c5.t6.nas_pipe_enable, | |
905 | `NASTOP.c5.t5.nas_pipe_enable, | |
906 | `NASTOP.c5.t4.nas_pipe_enable, | |
907 | `NASTOP.c5.t3.nas_pipe_enable, | |
908 | `NASTOP.c5.t2.nas_pipe_enable, | |
909 | `NASTOP.c5.t1.nas_pipe_enable, | |
910 | `NASTOP.c5.t0.nas_pipe_enable}; | |
911 | ||
912 | ||
913 | //---------------------------------------------------------- | |
914 | // I/DTLB miscellaneous sync and followme (1 per core) | |
915 | //---------------------------------------------------------- | |
916 | ||
917 | tlb_misc_c5 tlb_misc_c5 (); | |
918 | ||
919 | //---------------------------------------------------------- | |
920 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
921 | //---------------------------------------------------------- | |
922 | ||
923 | itlb_wr_c5 itlb_wr_c5 (); | |
924 | ||
925 | //---------------------------------------------------------- | |
926 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
927 | //---------------------------------------------------------- | |
928 | ||
929 | dtlb_wr_c5 dtlb_wr_c5 (); | |
930 | ||
931 | //---------------------------------------------------------- | |
932 | // ITLB read detection - pipeline (1 per thread group) | |
933 | //---------------------------------------------------------- | |
934 | itlb_rd_c5 itlb_rd_c5tg0 ( | |
935 | .mytg (1'h0), | |
936 | .itlb_pipe_d0 (itlb_pipe_d0_c5), | |
937 | .itlb_pipe_d1 (itlb_pipe_d1_c5), | |
938 | .itlb_pipe_d2 (itlb_pipe_d2_c5), | |
939 | .itlb_pipe_d3 (itlb_pipe_d3_c5) | |
940 | ); | |
941 | itlb_rd_c5 itlb_rd_c5tg1 ( | |
942 | .mytg (1'h1), | |
943 | .itlb_pipe_d0 (itlb_pipe_d4_c5), | |
944 | .itlb_pipe_d1 (itlb_pipe_d5_c5), | |
945 | .itlb_pipe_d2 (itlb_pipe_d6_c5), | |
946 | .itlb_pipe_d3 (itlb_pipe_d7_c5) | |
947 | ); | |
948 | ||
949 | //---------------------------------------------------------- | |
950 | // DTLB read detection (1 per thread group) | |
951 | //---------------------------------------------------------- | |
952 | ||
953 | dtlb_rd_c5 dtlb_rd_c5tg0 ( | |
954 | .mytg (1'h0) | |
955 | ); | |
956 | ||
957 | dtlb_rd_c5 dtlb_rd_c5tg1 ( | |
958 | .mytg (1'h1) | |
959 | ); | |
960 | ||
961 | //---------------------------------------------------------- | |
962 | //---------------------------------------------------------- | |
963 | ||
964 | //---------------------------------------------------------- | |
965 | // Shadow IFU Instruction Buffer (1 per thread) | |
966 | //---------------------------------------------------------- | |
967 | ||
968 | tlb_fifo_c5 tlb_fifo_c5t0 ( | |
969 | ||
970 | .mytid (3'h0), | |
971 | .itlb_pipe_d (itlb_pipe_d0_c5) | |
972 | ); | |
973 | ||
974 | //---------------------------------------------------------- | |
975 | ||
976 | //---------------------------------------------------------- | |
977 | // Shadow IFU Instruction Buffer (1 per thread) | |
978 | //---------------------------------------------------------- | |
979 | ||
980 | tlb_fifo_c5 tlb_fifo_c5t1 ( | |
981 | ||
982 | .mytid (3'h1), | |
983 | .itlb_pipe_d (itlb_pipe_d1_c5) | |
984 | ); | |
985 | ||
986 | //---------------------------------------------------------- | |
987 | ||
988 | //---------------------------------------------------------- | |
989 | // Shadow IFU Instruction Buffer (1 per thread) | |
990 | //---------------------------------------------------------- | |
991 | ||
992 | tlb_fifo_c5 tlb_fifo_c5t2 ( | |
993 | ||
994 | .mytid (3'h2), | |
995 | .itlb_pipe_d (itlb_pipe_d2_c5) | |
996 | ); | |
997 | ||
998 | //---------------------------------------------------------- | |
999 | ||
1000 | //---------------------------------------------------------- | |
1001 | // Shadow IFU Instruction Buffer (1 per thread) | |
1002 | //---------------------------------------------------------- | |
1003 | ||
1004 | tlb_fifo_c5 tlb_fifo_c5t3 ( | |
1005 | ||
1006 | .mytid (3'h3), | |
1007 | .itlb_pipe_d (itlb_pipe_d3_c5) | |
1008 | ); | |
1009 | ||
1010 | //---------------------------------------------------------- | |
1011 | ||
1012 | //---------------------------------------------------------- | |
1013 | // Shadow IFU Instruction Buffer (1 per thread) | |
1014 | //---------------------------------------------------------- | |
1015 | ||
1016 | tlb_fifo_c5 tlb_fifo_c5t4 ( | |
1017 | ||
1018 | .mytid (3'h4), | |
1019 | .itlb_pipe_d (itlb_pipe_d4_c5) | |
1020 | ); | |
1021 | ||
1022 | //---------------------------------------------------------- | |
1023 | ||
1024 | //---------------------------------------------------------- | |
1025 | // Shadow IFU Instruction Buffer (1 per thread) | |
1026 | //---------------------------------------------------------- | |
1027 | ||
1028 | tlb_fifo_c5 tlb_fifo_c5t5 ( | |
1029 | ||
1030 | .mytid (3'h5), | |
1031 | .itlb_pipe_d (itlb_pipe_d5_c5) | |
1032 | ); | |
1033 | ||
1034 | //---------------------------------------------------------- | |
1035 | ||
1036 | //---------------------------------------------------------- | |
1037 | // Shadow IFU Instruction Buffer (1 per thread) | |
1038 | //---------------------------------------------------------- | |
1039 | ||
1040 | tlb_fifo_c5 tlb_fifo_c5t6 ( | |
1041 | ||
1042 | .mytid (3'h6), | |
1043 | .itlb_pipe_d (itlb_pipe_d6_c5) | |
1044 | ); | |
1045 | ||
1046 | //---------------------------------------------------------- | |
1047 | ||
1048 | //---------------------------------------------------------- | |
1049 | // Shadow IFU Instruction Buffer (1 per thread) | |
1050 | //---------------------------------------------------------- | |
1051 | ||
1052 | tlb_fifo_c5 tlb_fifo_c5t7 ( | |
1053 | ||
1054 | .mytid (3'h7), | |
1055 | .itlb_pipe_d (itlb_pipe_d7_c5) | |
1056 | ); | |
1057 | ||
1058 | `endif | |
1059 | ||
1060 | `ifdef CORE_6 | |
1061 | ||
1062 | wire [7:0] nas_pipe_enabled_core6 = {`NASTOP.c6.t7.nas_pipe_enable, | |
1063 | `NASTOP.c6.t6.nas_pipe_enable, | |
1064 | `NASTOP.c6.t5.nas_pipe_enable, | |
1065 | `NASTOP.c6.t4.nas_pipe_enable, | |
1066 | `NASTOP.c6.t3.nas_pipe_enable, | |
1067 | `NASTOP.c6.t2.nas_pipe_enable, | |
1068 | `NASTOP.c6.t1.nas_pipe_enable, | |
1069 | `NASTOP.c6.t0.nas_pipe_enable}; | |
1070 | ||
1071 | ||
1072 | //---------------------------------------------------------- | |
1073 | // I/DTLB miscellaneous sync and followme (1 per core) | |
1074 | //---------------------------------------------------------- | |
1075 | ||
1076 | tlb_misc_c6 tlb_misc_c6 (); | |
1077 | ||
1078 | //---------------------------------------------------------- | |
1079 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
1080 | //---------------------------------------------------------- | |
1081 | ||
1082 | itlb_wr_c6 itlb_wr_c6 (); | |
1083 | ||
1084 | //---------------------------------------------------------- | |
1085 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
1086 | //---------------------------------------------------------- | |
1087 | ||
1088 | dtlb_wr_c6 dtlb_wr_c6 (); | |
1089 | ||
1090 | //---------------------------------------------------------- | |
1091 | // ITLB read detection - pipeline (1 per thread group) | |
1092 | //---------------------------------------------------------- | |
1093 | itlb_rd_c6 itlb_rd_c6tg0 ( | |
1094 | .mytg (1'h0), | |
1095 | .itlb_pipe_d0 (itlb_pipe_d0_c6), | |
1096 | .itlb_pipe_d1 (itlb_pipe_d1_c6), | |
1097 | .itlb_pipe_d2 (itlb_pipe_d2_c6), | |
1098 | .itlb_pipe_d3 (itlb_pipe_d3_c6) | |
1099 | ); | |
1100 | itlb_rd_c6 itlb_rd_c6tg1 ( | |
1101 | .mytg (1'h1), | |
1102 | .itlb_pipe_d0 (itlb_pipe_d4_c6), | |
1103 | .itlb_pipe_d1 (itlb_pipe_d5_c6), | |
1104 | .itlb_pipe_d2 (itlb_pipe_d6_c6), | |
1105 | .itlb_pipe_d3 (itlb_pipe_d7_c6) | |
1106 | ); | |
1107 | ||
1108 | //---------------------------------------------------------- | |
1109 | // DTLB read detection (1 per thread group) | |
1110 | //---------------------------------------------------------- | |
1111 | ||
1112 | dtlb_rd_c6 dtlb_rd_c6tg0 ( | |
1113 | .mytg (1'h0) | |
1114 | ); | |
1115 | ||
1116 | dtlb_rd_c6 dtlb_rd_c6tg1 ( | |
1117 | .mytg (1'h1) | |
1118 | ); | |
1119 | ||
1120 | //---------------------------------------------------------- | |
1121 | //---------------------------------------------------------- | |
1122 | ||
1123 | //---------------------------------------------------------- | |
1124 | // Shadow IFU Instruction Buffer (1 per thread) | |
1125 | //---------------------------------------------------------- | |
1126 | ||
1127 | tlb_fifo_c6 tlb_fifo_c6t0 ( | |
1128 | ||
1129 | .mytid (3'h0), | |
1130 | .itlb_pipe_d (itlb_pipe_d0_c6) | |
1131 | ); | |
1132 | ||
1133 | //---------------------------------------------------------- | |
1134 | ||
1135 | //---------------------------------------------------------- | |
1136 | // Shadow IFU Instruction Buffer (1 per thread) | |
1137 | //---------------------------------------------------------- | |
1138 | ||
1139 | tlb_fifo_c6 tlb_fifo_c6t1 ( | |
1140 | ||
1141 | .mytid (3'h1), | |
1142 | .itlb_pipe_d (itlb_pipe_d1_c6) | |
1143 | ); | |
1144 | ||
1145 | //---------------------------------------------------------- | |
1146 | ||
1147 | //---------------------------------------------------------- | |
1148 | // Shadow IFU Instruction Buffer (1 per thread) | |
1149 | //---------------------------------------------------------- | |
1150 | ||
1151 | tlb_fifo_c6 tlb_fifo_c6t2 ( | |
1152 | ||
1153 | .mytid (3'h2), | |
1154 | .itlb_pipe_d (itlb_pipe_d2_c6) | |
1155 | ); | |
1156 | ||
1157 | //---------------------------------------------------------- | |
1158 | ||
1159 | //---------------------------------------------------------- | |
1160 | // Shadow IFU Instruction Buffer (1 per thread) | |
1161 | //---------------------------------------------------------- | |
1162 | ||
1163 | tlb_fifo_c6 tlb_fifo_c6t3 ( | |
1164 | ||
1165 | .mytid (3'h3), | |
1166 | .itlb_pipe_d (itlb_pipe_d3_c6) | |
1167 | ); | |
1168 | ||
1169 | //---------------------------------------------------------- | |
1170 | ||
1171 | //---------------------------------------------------------- | |
1172 | // Shadow IFU Instruction Buffer (1 per thread) | |
1173 | //---------------------------------------------------------- | |
1174 | ||
1175 | tlb_fifo_c6 tlb_fifo_c6t4 ( | |
1176 | ||
1177 | .mytid (3'h4), | |
1178 | .itlb_pipe_d (itlb_pipe_d4_c6) | |
1179 | ); | |
1180 | ||
1181 | //---------------------------------------------------------- | |
1182 | ||
1183 | //---------------------------------------------------------- | |
1184 | // Shadow IFU Instruction Buffer (1 per thread) | |
1185 | //---------------------------------------------------------- | |
1186 | ||
1187 | tlb_fifo_c6 tlb_fifo_c6t5 ( | |
1188 | ||
1189 | .mytid (3'h5), | |
1190 | .itlb_pipe_d (itlb_pipe_d5_c6) | |
1191 | ); | |
1192 | ||
1193 | //---------------------------------------------------------- | |
1194 | ||
1195 | //---------------------------------------------------------- | |
1196 | // Shadow IFU Instruction Buffer (1 per thread) | |
1197 | //---------------------------------------------------------- | |
1198 | ||
1199 | tlb_fifo_c6 tlb_fifo_c6t6 ( | |
1200 | ||
1201 | .mytid (3'h6), | |
1202 | .itlb_pipe_d (itlb_pipe_d6_c6) | |
1203 | ); | |
1204 | ||
1205 | //---------------------------------------------------------- | |
1206 | ||
1207 | //---------------------------------------------------------- | |
1208 | // Shadow IFU Instruction Buffer (1 per thread) | |
1209 | //---------------------------------------------------------- | |
1210 | ||
1211 | tlb_fifo_c6 tlb_fifo_c6t7 ( | |
1212 | ||
1213 | .mytid (3'h7), | |
1214 | .itlb_pipe_d (itlb_pipe_d7_c6) | |
1215 | ); | |
1216 | ||
1217 | `endif | |
1218 | ||
1219 | `ifdef CORE_7 | |
1220 | ||
1221 | wire [7:0] nas_pipe_enabled_core7 = {`NASTOP.c7.t7.nas_pipe_enable, | |
1222 | `NASTOP.c7.t6.nas_pipe_enable, | |
1223 | `NASTOP.c7.t5.nas_pipe_enable, | |
1224 | `NASTOP.c7.t4.nas_pipe_enable, | |
1225 | `NASTOP.c7.t3.nas_pipe_enable, | |
1226 | `NASTOP.c7.t2.nas_pipe_enable, | |
1227 | `NASTOP.c7.t1.nas_pipe_enable, | |
1228 | `NASTOP.c7.t0.nas_pipe_enable}; | |
1229 | ||
1230 | ||
1231 | //---------------------------------------------------------- | |
1232 | // I/DTLB miscellaneous sync and followme (1 per core) | |
1233 | //---------------------------------------------------------- | |
1234 | ||
1235 | tlb_misc_c7 tlb_misc_c7 (); | |
1236 | ||
1237 | //---------------------------------------------------------- | |
1238 | // ITLB write detection - HWTW and TLBWRITE (1 per core) | |
1239 | //---------------------------------------------------------- | |
1240 | ||
1241 | itlb_wr_c7 itlb_wr_c7 (); | |
1242 | ||
1243 | //---------------------------------------------------------- | |
1244 | // DTLB write detection - HWTW and TLBWRITE (1 per core) | |
1245 | //---------------------------------------------------------- | |
1246 | ||
1247 | dtlb_wr_c7 dtlb_wr_c7 (); | |
1248 | ||
1249 | //---------------------------------------------------------- | |
1250 | // ITLB read detection - pipeline (1 per thread group) | |
1251 | //---------------------------------------------------------- | |
1252 | itlb_rd_c7 itlb_rd_c7tg0 ( | |
1253 | .mytg (1'h0), | |
1254 | .itlb_pipe_d0 (itlb_pipe_d0_c7), | |
1255 | .itlb_pipe_d1 (itlb_pipe_d1_c7), | |
1256 | .itlb_pipe_d2 (itlb_pipe_d2_c7), | |
1257 | .itlb_pipe_d3 (itlb_pipe_d3_c7) | |
1258 | ); | |
1259 | itlb_rd_c7 itlb_rd_c7tg1 ( | |
1260 | .mytg (1'h1), | |
1261 | .itlb_pipe_d0 (itlb_pipe_d4_c7), | |
1262 | .itlb_pipe_d1 (itlb_pipe_d5_c7), | |
1263 | .itlb_pipe_d2 (itlb_pipe_d6_c7), | |
1264 | .itlb_pipe_d3 (itlb_pipe_d7_c7) | |
1265 | ); | |
1266 | ||
1267 | //---------------------------------------------------------- | |
1268 | // DTLB read detection (1 per thread group) | |
1269 | //---------------------------------------------------------- | |
1270 | ||
1271 | dtlb_rd_c7 dtlb_rd_c7tg0 ( | |
1272 | .mytg (1'h0) | |
1273 | ); | |
1274 | ||
1275 | dtlb_rd_c7 dtlb_rd_c7tg1 ( | |
1276 | .mytg (1'h1) | |
1277 | ); | |
1278 | ||
1279 | //---------------------------------------------------------- | |
1280 | //---------------------------------------------------------- | |
1281 | ||
1282 | //---------------------------------------------------------- | |
1283 | // Shadow IFU Instruction Buffer (1 per thread) | |
1284 | //---------------------------------------------------------- | |
1285 | ||
1286 | tlb_fifo_c7 tlb_fifo_c7t0 ( | |
1287 | ||
1288 | .mytid (3'h0), | |
1289 | .itlb_pipe_d (itlb_pipe_d0_c7) | |
1290 | ); | |
1291 | ||
1292 | //---------------------------------------------------------- | |
1293 | ||
1294 | //---------------------------------------------------------- | |
1295 | // Shadow IFU Instruction Buffer (1 per thread) | |
1296 | //---------------------------------------------------------- | |
1297 | ||
1298 | tlb_fifo_c7 tlb_fifo_c7t1 ( | |
1299 | ||
1300 | .mytid (3'h1), | |
1301 | .itlb_pipe_d (itlb_pipe_d1_c7) | |
1302 | ); | |
1303 | ||
1304 | //---------------------------------------------------------- | |
1305 | ||
1306 | //---------------------------------------------------------- | |
1307 | // Shadow IFU Instruction Buffer (1 per thread) | |
1308 | //---------------------------------------------------------- | |
1309 | ||
1310 | tlb_fifo_c7 tlb_fifo_c7t2 ( | |
1311 | ||
1312 | .mytid (3'h2), | |
1313 | .itlb_pipe_d (itlb_pipe_d2_c7) | |
1314 | ); | |
1315 | ||
1316 | //---------------------------------------------------------- | |
1317 | ||
1318 | //---------------------------------------------------------- | |
1319 | // Shadow IFU Instruction Buffer (1 per thread) | |
1320 | //---------------------------------------------------------- | |
1321 | ||
1322 | tlb_fifo_c7 tlb_fifo_c7t3 ( | |
1323 | ||
1324 | .mytid (3'h3), | |
1325 | .itlb_pipe_d (itlb_pipe_d3_c7) | |
1326 | ); | |
1327 | ||
1328 | //---------------------------------------------------------- | |
1329 | ||
1330 | //---------------------------------------------------------- | |
1331 | // Shadow IFU Instruction Buffer (1 per thread) | |
1332 | //---------------------------------------------------------- | |
1333 | ||
1334 | tlb_fifo_c7 tlb_fifo_c7t4 ( | |
1335 | ||
1336 | .mytid (3'h4), | |
1337 | .itlb_pipe_d (itlb_pipe_d4_c7) | |
1338 | ); | |
1339 | ||
1340 | //---------------------------------------------------------- | |
1341 | ||
1342 | //---------------------------------------------------------- | |
1343 | // Shadow IFU Instruction Buffer (1 per thread) | |
1344 | //---------------------------------------------------------- | |
1345 | ||
1346 | tlb_fifo_c7 tlb_fifo_c7t5 ( | |
1347 | ||
1348 | .mytid (3'h5), | |
1349 | .itlb_pipe_d (itlb_pipe_d5_c7) | |
1350 | ); | |
1351 | ||
1352 | //---------------------------------------------------------- | |
1353 | ||
1354 | //---------------------------------------------------------- | |
1355 | // Shadow IFU Instruction Buffer (1 per thread) | |
1356 | //---------------------------------------------------------- | |
1357 | ||
1358 | tlb_fifo_c7 tlb_fifo_c7t6 ( | |
1359 | ||
1360 | .mytid (3'h6), | |
1361 | .itlb_pipe_d (itlb_pipe_d6_c7) | |
1362 | ); | |
1363 | ||
1364 | //---------------------------------------------------------- | |
1365 | ||
1366 | //---------------------------------------------------------- | |
1367 | // Shadow IFU Instruction Buffer (1 per thread) | |
1368 | //---------------------------------------------------------- | |
1369 | ||
1370 | tlb_fifo_c7 tlb_fifo_c7t7 ( | |
1371 | ||
1372 | .mytid (3'h7), | |
1373 | .itlb_pipe_d (itlb_pipe_d7_c7) | |
1374 | ); | |
1375 | ||
1376 | `endif | |
1377 | ||
1378 | ||
1379 | endmodule | |
1380 | //---------------------------------------------------------- | |
1381 | //---------------------------------------------------------- |