Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / config / fgu.config
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: fgu.config
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#define USEMOD USEFGU
36#define DUT_MOD fgu
37//#define USEMOD USECPU
38//#define DUT_MOD cpu
39// ------------------------------------------------------------------
40// ------------------------------------------------------------------
41// ------------------------------------------------------------------
42// To remove vera:
43// Add the following two lines just after fgu tag
44// -novera_build
45// -novera_run
46// ------------------------------------------------------------------
47#include "defaults.config"
48// ------------------------------------------------------------------
49
50<fgu>
51 -novera_build
52 -novera_run
53 -novcs_use_vera
54 -config_rtl=USEMOD
55 -asm_diag_root=$DV_ROOT/verif/diag
56 -vera_diag_root=$DV_ROOT/verif/diag
57 -vera_config_root=$DV_ROOT/verif
58 -vera_vcon_file=fgu.vcon
59 -image_diag_root=$DV_ROOT/verif
60 -wait_cycle_to_kill=10
61 -model=fgu
62 -flist=$DV_ROOT/verif/env/fgu/fgu.flist
63 -env_base=$DV_ROOT/verif/env/fgu
64 -drm_disk=[/export/home/bw=30]
65 -drm_type=random
66 -drm_freeram=1000
67 -drm_freeprocessor=1.0
68 -drm_license=[vcs=1]
69 SUNVFORCEOPTS
70 -sunv_args=-version
71 -sunv_args=-topcell=DUT_MOD
72 -sunv_args=-out=DUT_MOD.v
73 -sunv_args=-showCompiledOutCode=off
74 -sunv_args=-define=SIM
75 -sunv_args=-define=LIB
76 -sunv_args=-define=INITLATZERO
77//cpu -sunv_args=-define=RTL_NO_SPC1
78//cpu -sunv_args=-define=RTL_NO_SPC2
79//cpu -sunv_args=-define=RTL_NO_SPC3
80//cpu -sunv_args=-define=RTL_NO_SPC4
81//cpu -sunv_args=-define=RTL_NO_SPC5
82//cpu -sunv_args=-define=RTL_NO_SPC6
83//cpu -sunv_args=-define=RTL_NO_SPC7
84//cpu -sunv_args=-primitives=$DV_ROOT/verif/env/fgu/primitive.list
85 -sunv_args=-path=SUNV_RTL_PATH
86 -sunv_args=-excludepreload
87 -sunv_args=-ignorepartial
88 -sunv_args=-unusednet='unused$:unused\[[0-9]+\]$'
89 -sunv_args=-warn=2000
90 -sunv_args=-preload=SUNVLIBS_SUNV
91 -sunv_args=-perlinclude=SUNVPERLINC
92 -vlint_top=DUT_MOD
93 -vlint_args=-turn_unspecified_off
94 -vlint_args=-binary
95 -vlint_args=-vlint
96 -vlint_args=-depth 999
97 -vlint_args=-vr $DV_ROOT/verif/env/config/vlint.rc
98 -vlint_args=SUNVLIBS_OTHER
99 -zeroIn_build_args=-fastmod
100 -zeroIn_build_args=-exit_on_directive_errors
101 -zeroIn_build_args=-d fgu_top
102 -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/fgu/fgu_zeroIn_cfg.v
103 -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/common/verilog/checkers/fgu/fgu_checkers.v
104#ifdef ZEROINCOV
105#ifdef FGUSAT
106 -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/common/coverage/fgu/fgusat_0in_cov.v
107#else
108 -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/common/coverage/fgu/fgusparc_0in_cov.v
109#endif
110#else
111 -zeroIn_build_args="-fastsim turbo"
112#endif
113 -zeroIn_build_args=-sim vcs
114 -zeroIn_build_args=SUNVLIBS_OTHER
115 -vcs_build_args=+v2k
116 -vcs_build_args=-y $DV_ROOT/design/exu/rtl
117 -vcs_build_args=+define+LIB
118 -vcs_build_args=+define+INITLATZERO
119 -vcs_build_args=+incdir+$DV_ROOT/verif/env/fgu
120 -vcs_build_args=+incdir+$DV_ROOT/verif/env/common/coverage/fgu
121 -vcs_build_args="-P $DV_ROOT/verif/env/common/pli/monitor/monitor_pli.tab"
122 -vcs_build_args=$DV_ROOT/verif/env/common/pli/monitor/libmonitor_pli.a
123 -vcs_use_vera
124 -vcs_use_ntb
125 -vcs_build_args=SUNVLIBS_OTHER
126 -vcs_run_args=+0in_checker_finish_delay+30
127 -vcs_run_args=+VERB=10
128</fgu>