Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / fc / fc_coverage.v
CommitLineData
86530b38
AT
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: fc_coverage.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35reg ncu_pcx_stall_pq;
36reg ncu_pcx_stall_pq1;
37reg mcu0_ncu_stall_in;
38reg mcu1_ncu_stall_in;
39reg mcu2_ncu_stall_in;
40reg mcu3_ncu_stall_in;
41reg dmu_ncu_stall_in;
42reg ccu_ncu_stall_in;
43reg niu_ncu_stall_in;
44reg tcu_ncu_stall_in;
45reg dbg1_ncu_stall_in;
46reg rst_ncu_stall_in;
47reg ssi_ncu_stall_in;
48reg [129:0] pcx_ncu_data_px2;
49reg [7:0] ncu_cpx_req_cq;
50reg pcx_ncu_data_rdy_px1;
51
52always @(posedge `NCU.iol2clk)
53 begin
54 mcu0_ncu_stall_in <= `NCU.mcu0_ncu_stall;
55 mcu1_ncu_stall_in <= `NCU.mcu1_ncu_stall;
56 mcu2_ncu_stall_in <= `NCU.mcu2_ncu_stall;
57 mcu3_ncu_stall_in <= `NCU.mcu3_ncu_stall;
58 dmu_ncu_stall_in <= `NCU.dmu_ncu_stall;
59 ccu_ncu_stall_in <= `NCU.ccu_ncu_stall;
60 niu_ncu_stall_in <= `NCU.niu_ncu_stall;
61 tcu_ncu_stall_in <= `NCU.tcu_ncu_stall;
62 dbg1_ncu_stall_in <= `NCU.dbg1_ncu_stall;
63 rst_ncu_stall_in <= `NCU.rst_ncu_stall;
64 ssi_ncu_stall_in <= `NCU.ssi_ncu_stall;
65 end
66always @(posedge core_clk)
67 begin
68 ncu_pcx_stall_pq <= `NCU.ncu_pcx_stall_pq;
69 ncu_pcx_stall_pq1 <= `NCU.ncu_pcx_stall_pq;
70 pcx_ncu_data_px2 <= `NCU.pcx_ncu_data_px2;
71 ncu_cpx_req_cq <= `NCU.ncu_cpx_req_cq;
72 pcx_ncu_data_rdy_px1 <= `NCU.pcx_ncu_data_rdy_px1;
73 end
74
75