Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / fc / flush_prop.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: flush_prop.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef GATESIM
36always @(posedge `CPU.tcu_scan_en) begin
37 if ($test$plusargs("FLUSH_X")) begin
38 force `CPU.tcu.tcu_soc0_scan_out = 1'bx;
39 force `CPU.tcu.tcu_soc1_scan_out = 1'bx;
40 force `CPU.tcu.tcu_soc2_scan_out = 1'bx;
41 force `CPU.tcu.tcu_soc3_scan_out = 1'bx;
42 force `CPU.tcu.tcu_soc4_scan_out = 1'bx;
43 force `CPU.tcu.tcu_soc5_scan_out = 1'bx;
44 force `CPU.tcu.tcu_soc6_scan_out = 1'bx;
45 force `CPU.tcu.tcu_soca_scan_out = 1'bx;
46 force `CPU.tcu.tcu_socb_scan_out = 1'bx;
47 force `CPU.tcu.tcu_socc_scan_out = 1'bx;
48 force `CPU.tcu.tcu_socd_scan_out = 1'bx;
49 force `CPU.tcu.tcu_soce_scan_out = 1'bx;
50 force `CPU.tcu.tcu_socf_scan_out = 1'bx;
51 force `CPU.tcu.tcu_socg_scan_out = 1'bx;
52 force `CPU.tcu.tcu_soch_scan_out = 1'bx;
53 force `CPU.tcu.tcu_spc0_scan_out[0] = 1'bx;
54 force `CPU.tcu.tcu_spc0_scan_out[1] = 1'bx;
55 force `CPU.tcu.tcu_spc1_scan_out[0] = 1'bx;
56 force `CPU.tcu.tcu_spc1_scan_out[1] = 1'bx;
57 force `CPU.tcu.tcu_spc2_scan_out[0] = 1'bx;
58 force `CPU.tcu.tcu_spc2_scan_out[1] = 1'bx;
59 force `CPU.tcu.tcu_spc3_scan_out[0] = 1'bx;
60 force `CPU.tcu.tcu_spc3_scan_out[1] = 1'bx;
61 force `CPU.tcu.tcu_spc4_scan_out[0] = 1'bx;
62 force `CPU.tcu.tcu_spc4_scan_out[1] = 1'bx;
63 force `CPU.tcu.tcu_spc5_scan_out[0] = 1'bx;
64 force `CPU.tcu.tcu_spc5_scan_out[1] = 1'bx;
65 force `CPU.tcu.tcu_spc6_scan_out[0] = 1'bx;
66 force `CPU.tcu.tcu_spc6_scan_out[1] = 1'bx;
67 force `CPU.tcu.tcu_spc7_scan_out[0] = 1'bx;
68 force `CPU.tcu.tcu_spc7_scan_out[1] = 1'bx;
69 repeat (10) @(posedge `CPU.ccu_rst_sys_clk);
70 release `CPU.tcu.tcu_soc0_scan_out ;
71 release `CPU.tcu.tcu_soc1_scan_out ;
72 release `CPU.tcu.tcu_soc2_scan_out ;
73 release `CPU.tcu.tcu_soc3_scan_out ;
74 release `CPU.tcu.tcu_soc4_scan_out ;
75 release `CPU.tcu.tcu_soc5_scan_out ;
76 release `CPU.tcu.tcu_soc6_scan_out ;
77 release `CPU.tcu.tcu_soca_scan_out ;
78 release `CPU.tcu.tcu_socb_scan_out ;
79 release `CPU.tcu.tcu_socc_scan_out ;
80 release `CPU.tcu.tcu_socd_scan_out ;
81 release `CPU.tcu.tcu_soce_scan_out ;
82 release `CPU.tcu.tcu_socf_scan_out ;
83 release `CPU.tcu.tcu_socg_scan_out ;
84 release `CPU.tcu.tcu_soch_scan_out ;
85 release `CPU.tcu.tcu_spc0_scan_out[0] ;
86 release `CPU.tcu.tcu_spc0_scan_out[1] ;
87 release `CPU.tcu.tcu_spc1_scan_out[0] ;
88 release `CPU.tcu.tcu_spc1_scan_out[1] ;
89 release `CPU.tcu.tcu_spc2_scan_out[0] ;
90 release `CPU.tcu.tcu_spc2_scan_out[1] ;
91 release `CPU.tcu.tcu_spc3_scan_out[0] ;
92 release `CPU.tcu.tcu_spc3_scan_out[1] ;
93 release `CPU.tcu.tcu_spc4_scan_out[0] ;
94 release `CPU.tcu.tcu_spc4_scan_out[1] ;
95 release `CPU.tcu.tcu_spc5_scan_out[0] ;
96 release `CPU.tcu.tcu_spc5_scan_out[1] ;
97 release `CPU.tcu.tcu_spc6_scan_out[0] ;
98 release `CPU.tcu.tcu_spc6_scan_out[1] ;
99 release `CPU.tcu.tcu_spc7_scan_out[0] ;
100 release `CPU.tcu.tcu_spc7_scan_out[1] ;
101 end
102end
103`endif // GATESIM
104