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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: denali_root_monitor_PCIEXactorBuilder.vr | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #include <vera_defines.vrh> | |
36 | ||
37 | // XactorFmwork and XactorComponents libraries | |
38 | #include "XactorBaseBuilder.vrh" | |
39 | #include "XactorBasePacket.vrh" | |
40 | #include "XactorBaseSignalInterface.vrh" | |
41 | #include "XactorBaseManager.vrh" | |
42 | #include "XactorManager.vrh" | |
43 | #include "XactorHash.vrh" | |
44 | #include "XactorBinTree.vrh" | |
45 | #include "XactorList.vrh" | |
46 | #include "XactorListWildCard.vrh" | |
47 | #include "XactorCtrl.vrh" | |
48 | #include "XactorUtilities.vrh" | |
49 | #include "XactorDefines.vri" | |
50 | #include "XactorClk.port.vri" | |
51 | ||
52 | // DenaliPCIE libary | |
53 | #include "DenaliPCIE.vri" | |
54 | ||
55 | // FNXPCIEXactor library | |
56 | #include "FNXPCIEXactorDefines.vri" | |
57 | // #include "FNXPCIEXactorPorts.vri" | |
58 | #include "denali_root_monitor_PCIEXactorPorts.vri" | |
59 | ||
60 | // report library | |
61 | #include "cReport.vrh" | |
62 | #include "FNXPCIEXactorReportMacros.vri" | |
63 | ||
64 | class denali_root_monitor_PCIEXactorBuilder extends XactorBaseBuilder { | |
65 | ||
66 | // Inherited Members | |
67 | // MyReport declared in XactorBaseBuilder | |
68 | ||
69 | // Base Class and Method Names For QR Macros | |
70 | local string ClassName = "denali_root_monitor_PCIEXactorBuilder"; | |
71 | local string MethodName = null; | |
72 | ||
73 | local FNXPCIEXactorManager Manager; | |
74 | // local FNXPCIEXactorSignalInterface SignalInterface; | |
75 | ||
76 | local denali_root_monitor_PCIEXactorSignalInterface SignalInterface; | |
77 | ||
78 | local string XactorName; // Name of transactor | |
79 | local integer PortNum; // PCIE Port Number | |
80 | ||
81 | local XactorClk ClkPort; // Clock port | |
82 | // local FNXPCIEXactorDenaliClkPort DenaliClkPort; // Denali PCIE Clocks | |
83 | // 3/4/04 | |
84 | local denali_root_monitor_PCIEXactorDenaliClkPort DenaliClkPort; // Denali PCIE Clocks | |
85 | denali_root_monitor_PCIEXactorMiscPort MiscPort; // 3/4/04 | |
86 | ||
87 | local bit AssertCovEnabled; | |
88 | local FNXPCIEXactorAssertCovDatabase AssertCovDatabase; | |
89 | ||
90 | // Denali PCIE Device Reference For This Transactor | |
91 | // FNXPCIEXactorDenaliDevice PCIEDevice; | |
92 | denali_root_monitor_PCIEXactorDenaliDevice PCIEDevice; | |
93 | ||
94 | // Flow Control Engine | |
95 | FNXPCIEXactorFCEngine FCEngine; | |
96 | ||
97 | // Utilities | |
98 | static FNXPCIEXactorUtilities Util; | |
99 | ||
100 | // SelfExpect members | |
101 | bit SelfExpectEnable; | |
102 | integer MinSelfExpectDly; | |
103 | integer MaxSelfExpectDly; | |
104 | ||
105 | task new( ReportClass _Report, | |
106 | XactorClk _ClkPort, | |
107 | // FNXPCIEXactorDenaliClkPort _DenaliClkPort, | |
108 | // FNXPCIEXactorDenaliDevice _PCIEDevice, | |
109 | // FNXPCIEXactorMiscPort _MiscPort, | |
110 | denali_root_monitor_PCIEXactorDenaliClkPort _DenaliClkPort, | |
111 | denali_root_monitor_PCIEXactorDenaliDevice _PCIEDevice, | |
112 | denali_root_monitor_PCIEXactorMiscPort _MiscPort, | |
113 | integer _PortNum, | |
114 | string _XactorName = "denali_root_monitor_PCIEXactorBuilder" ); | |
115 | ||
116 | // public methods | |
117 | virtual function string CreateName(); | |
118 | virtual function XactorBasePacket CreatePacket(); | |
119 | virtual function XactorBaseManager CreateManager(); | |
120 | virtual function XactorBaseSignalInterface CreateSignalInterface(); | |
121 | virtual function XactorBaseExpectDataStruct CreateExpectDataStruct(); | |
122 | virtual function XactorBaseExpectDataStruct CreateXExpectDataStruct(); | |
123 | virtual function XactorBaseExpectDataStruct CreateHashElement(); | |
124 | virtual function ReportClass CreateReport(); | |
125 | virtual function XactorClk CreateClock(); | |
126 | virtual task AddDenaliCbk( denaliPcieCbReasonT DenCbk ); | |
127 | virtual task EnableAssertCov(); | |
128 | virtual function bit GetAssertCovEnabled(); | |
129 | virtual task ResetAssertCov(); | |
130 | virtual task AddAssertPt( denaliPcieErrorTypeT covPt ); | |
131 | virtual function bit IsAssertPtCovered( denaliPcieErrorTypeT covPt ); | |
132 | virtual function integer GetAssertPtCnt( denaliPcieErrorTypeT covPt ); | |
133 | virtual task DisplayAssertCov( ReportType rptType ); | |
134 | virtual task SetUnexpectedTLPErr(); | |
135 | virtual task SuppressUnexpectedTLPErr(); | |
136 | virtual task SomaSet( string somaParm, string somaValue ); | |
137 | virtual task Epilogue( ReportType rptType ); | |
138 | ||
139 | //Made Public since all errors need to be supressed if a Denali reset is asserted | |
140 | task DenaliMemoryModelInit(); | |
141 | // protected methods | |
142 | local task EnableDefaultDenaliCbks(); | |
143 | ||
144 | } // end of builder sub-class | |
145 | ||
146 | // constructor | |
147 | task denali_root_monitor_PCIEXactorBuilder::new( ReportClass _Report, | |
148 | XactorClk _ClkPort, | |
149 | // FNXPCIEXactorDenaliClkPort _DenaliClkPort, | |
150 | // FNXPCIEXactorDenaliDevice _PCIEDevice, | |
151 | // FNXPCIEXactorMiscPort _MiscPort, | |
152 | denali_root_monitor_PCIEXactorDenaliClkPort _DenaliClkPort, | |
153 | denali_root_monitor_PCIEXactorDenaliDevice _PCIEDevice, | |
154 | denali_root_monitor_PCIEXactorMiscPort _MiscPort, | |
155 | integer _PortNum, | |
156 | string _XactorName = "denali_root_monitor_PCIEXactorBuilder" ) | |
157 | ||
158 | { | |
159 | sprintf( XactorName, "%s_%0d", _XactorName, _PortNum ); | |
160 | ClkPort = _ClkPort; | |
161 | DenaliClkPort = _DenaliClkPort; | |
162 | MyReport = _Report; | |
163 | PCIEDevice = _PCIEDevice; | |
164 | PortNum = _PortNum; | |
165 | MiscPort = _MiscPort; | |
166 | ||
167 | if ( Util == null ) | |
168 | Util = new( MyReport, XactorName ); | |
169 | ||
170 | // Create Xactor Manager | |
171 | Manager = new( this, | |
172 | ClkPort ); | |
173 | ||
174 | // Create Assertion Coverage Database and Default Assertion Coverage to Disabled | |
175 | AssertCovDatabase = new( MyReport, XactorName ); | |
176 | AssertCovEnabled = 0; | |
177 | ||
178 | // Create Signal Interface | |
179 | SignalInterface = new( Manager.ExpectFifo, // incoming TLP transactions Fifo | |
180 | Manager.DllpExpectFifo, // incoming DLLP transactions Fifo | |
181 | Manager.DriveFifo, // outgoing TLP/DLLP transactions Fifo | |
182 | Manager.RetryPktFifo, // retried TLP transactions Fifo | |
183 | MyReport, // Report reference | |
184 | XactorName, // Name of transactor | |
185 | Manager._XactorCtrl, // control (Enable/Disable xactor) | |
186 | ClkPort, // Transactor clock port | |
187 | DenaliClkPort, // Denali PCIE Clock Port | |
188 | PCIEDevice, // Denali PCIE Device reference | |
189 | MiscPort, // Port for Denali reset and Receive Detect signals | |
190 | Util, // Xactor Utilities | |
191 | AssertCovDatabase, // Assertion Coverage Database | |
192 | PortNum // PCIE Port Number (only used for reporting) | |
193 | ); | |
194 | ||
195 | // Flow Control Engine | |
196 | // FCEngine = new( MyReport, SignalInterface, DenaliClkPort, Util, XactorName ); | |
197 | ||
198 | // Default Self-Expect Members | |
199 | SelfExpectEnable = 1'b0; | |
200 | MinSelfExpectDly = 0; | |
201 | MaxSelfExpectDly = 50; | |
202 | ||
203 | // 5-24-05 The same callbacks for the Denali end point device are used | |
204 | // so unless extra callbacks need to be enabled here there is no need | |
205 | // to call EnableDefaultDenaliCbks() | |
206 | // Register Default Denali Callbacks For This PCIE Device | |
207 | // EnableDefaultDenaliCbks(); | |
208 | ||
209 | // Initialize ReqID and BAR Setup of Denali Memory Model | |
210 | DenaliMemoryModelInit(); | |
211 | } | |
212 | ||
213 | function string denali_root_monitor_PCIEXactorBuilder::CreateName() | |
214 | { | |
215 | CreateName = XactorName; | |
216 | } | |
217 | ||
218 | function XactorBasePacket denali_root_monitor_PCIEXactorBuilder::CreatePacket() | |
219 | { | |
220 | FNXPCIEXactorPacket Packet = new( MyReport, | |
221 | XactorName, | |
222 | Util, | |
223 | PortNum ); | |
224 | CreatePacket = Packet; | |
225 | } | |
226 | ||
227 | function XactorBaseManager denali_root_monitor_PCIEXactorBuilder::CreateManager() | |
228 | { | |
229 | CreateManager = Manager; | |
230 | } | |
231 | ||
232 | function XactorBaseSignalInterface denali_root_monitor_PCIEXactorBuilder::CreateSignalInterface() | |
233 | { | |
234 | CreateSignalInterface = SignalInterface; | |
235 | } | |
236 | ||
237 | function XactorBaseExpectDataStruct denali_root_monitor_PCIEXactorBuilder::CreateExpectDataStruct() | |
238 | { | |
239 | XactorList DataStruct = new; | |
240 | CreateExpectDataStruct = DataStruct; | |
241 | } | |
242 | ||
243 | function XactorBaseExpectDataStruct denali_root_monitor_PCIEXactorBuilder::CreateXExpectDataStruct() | |
244 | { | |
245 | XactorListWildCard XDataStruct = new; | |
246 | CreateXExpectDataStruct = XDataStruct; | |
247 | } | |
248 | ||
249 | function XactorBaseExpectDataStruct denali_root_monitor_PCIEXactorBuilder::CreateHashElement() | |
250 | { | |
251 | XactorList HashElement = new; | |
252 | CreateHashElement = HashElement; | |
253 | } | |
254 | ||
255 | function ReportClass denali_root_monitor_PCIEXactorBuilder::CreateReport() | |
256 | { | |
257 | CreateReport = MyReport; | |
258 | } | |
259 | ||
260 | function XactorClk denali_root_monitor_PCIEXactorBuilder::CreateClock() | |
261 | { | |
262 | CreateClock = ClkPort; | |
263 | } | |
264 | ||
265 | task denali_root_monitor_PCIEXactorBuilder::AddDenaliCbk( denaliPcieCbReasonT DenCbk ) | |
266 | { | |
267 | string MethodName = "AddDenaliCbk"; | |
268 | integer status; | |
269 | status = PCIEDevice.addCb( DenCbk ); | |
270 | if (status < 0) | |
271 | PCIEX_QR_ERR( "%s-> Failed to Add Callback=%s", | |
272 | XactorName, DenCbk ); | |
273 | } | |
274 | ||
275 | // This task should enabled all Denali callback points for which | |
276 | // this Xactor has handlers for in the Signal Interface | |
277 | task denali_root_monitor_PCIEXactorBuilder::EnableDefaultDenaliCbks() | |
278 | { | |
279 | // User Queue Callbacks (Packets Generated By Model) | |
280 | AddDenaliCbk( PCIE_CB_TL_user_queue_enter ); | |
281 | AddDenaliCbk( PCIE_CB_TL_user_queue_exit ); | |
282 | ||
283 | // Transaction Layer Xmit Callbacks | |
284 | // AddDenaliCbk( PCIE_CB_TL_transmit_queue_enter ); | |
285 | // AddDenaliCbk( PCIE_CB_TL_transmit_queue_exit ); | |
286 | AddDenaliCbk( PCIE_CB_TL_to_DL ); | |
287 | ||
288 | // DLL Xmit Callbacks | |
289 | // AddDenaliCbk( PCIE_CB_DL_TX_queue_enter ); | |
290 | // AddDenaliCbk( PCIE_CB_DL_TX_queue_exit ); | |
291 | AddDenaliCbk( PCIE_CB_DL_to_PL ); | |
292 | ||
293 | // Physical Layer Xmit Callbacks | |
294 | AddDenaliCbk( PCIE_CB_PL_TX_start_packet ); // Drive Start | |
295 | AddDenaliCbk( PCIE_CB_PL_TX_end_packet ); // Drive End | |
296 | ||
297 | // Transmission Related Callbacks | |
298 | // AddDenaliCbk( PCIE_CB_TX_trans_done ); | |
299 | ||
300 | // DLL Replay Callbacks | |
301 | // AddDenaliCbk( PCIE_CB_DL_TX_retry_buffer_enter ); | |
302 | AddDenaliCbk( PCIE_CB_DL_TX_retry_buffer_exit ); | |
303 | // AddDenaliCbk( PCIE_CB_DL_TX_retry_buffer_purge ); | |
304 | ||
305 | // Physical Layer Recv Callbacks | |
306 | // AddDenaliCbk( PCIE_CB_PL_RX_start_packet ); | |
307 | // AddDenaliCbk( PCIE_CB_PL_RX_end_packet ); | |
308 | AddDenaliCbk( PCIE_CB_PL_to_DL ); | |
309 | ||
310 | // DLL Recv Callbacks | |
311 | AddDenaliCbk( PCIE_CB_DL_RX_queue_enter ); | |
312 | AddDenaliCbk( PCIE_CB_DL_RX_queue_exit ); | |
313 | // AddDenaliCbk( PCIE_CB_DL_to_TL ); | |
314 | ||
315 | // Transaction Layer Recv Callbacks | |
316 | // AddDenaliCbk( PCIE_CB_TL_RX_packet ); | |
317 | ||
318 | // Reception Related Callbacks | |
319 | // AddDenaliCbk( PCIE_CB_RX_trans_done ); | |
320 | ||
321 | // Completion Related Callbacks | |
322 | // AddDenaliCbk( PCIE_CB_TL_TX_completion_queue_enter ); | |
323 | // AddDenaliCbk( PCIE_CB_TL_TX_completion_queue_exit ); | |
324 | // AddDenaliCbk( PCIE_CB_TL_RX_completion_queue_enter ); | |
325 | // AddDenaliCbk( PCIE_CB_TL_RX_completion_queue_exit ); | |
326 | ||
327 | // Error Related Callbacks | |
328 | AddDenaliCbk( PCIE_CB_TX_error ); | |
329 | AddDenaliCbk( PCIE_CB_RX_error ); | |
330 | AddDenaliCbk( PCIE_CB_error ); | |
331 | AddDenaliCbk( PCIE_CB_unknown ); | |
332 | } | |
333 | ||
334 | task denali_root_monitor_PCIEXactorBuilder::EnableAssertCov() | |
335 | { | |
336 | string MethodName = "EnableAssertCov"; | |
337 | AssertCovEnabled = 1; | |
338 | AddDenaliCbk( PCIE_CB_assert_pass ); | |
339 | PCIEX_QR_I( "%s-> Denali Assertion Coverage Enabled.", XactorName ); | |
340 | } | |
341 | ||
342 | function bit denali_root_monitor_PCIEXactorBuilder::GetAssertCovEnabled() | |
343 | { | |
344 | GetAssertCovEnabled = AssertCovEnabled; | |
345 | } | |
346 | ||
347 | task denali_root_monitor_PCIEXactorBuilder::DenaliMemoryModelInit() | |
348 | { | |
349 | // Setup Default ReqID for Denali Model in DEV_CTRL Register | |
350 | // NOTE: The FNX PCIE Xactor Does Not Make Use of the Denali Memory Model So The Value | |
351 | // Set For a Xactor's ReqID is Unimportant Other Than to Make The Model Happy | |
352 | SignalInterface.SetReqID( FNX_PCIE_XTR_DEFAULT_BUS_NUM, | |
353 | PCIEDevice.getId(), // uniquify across Xactor instances | |
354 | FNX_PCIE_XTR_DEFAULT_FUNC_NUM ); | |
355 | ||
356 | // Setup Default 64-bit BAR for Denali Model in REG0_BASE_0 and REG0_BASE_1 Registers | |
357 | SignalInterface.SetupBAR64( PCIE_REG0_BASE_0, | |
358 | PCIE_REG0_BASE_1, | |
359 | FNX_PCIE_XTR_DEFAULT_BAR_64_SIZE, // NOTE: Should match width in default SOMA file | |
360 | FNX_PCIE_XTR_DEFAULT_BAR_64_OFFSET ); | |
361 | ||
362 | ||
363 | ///////////////////////////////////////////////////////// | |
364 | // Begin -> Suppress Denali Error Checks | |
365 | // | |
366 | // Disable Self-Addressing TLP Check | |
367 | SignalInterface.SuppressDenaliErr( PCIE_TL_COR_TLP_ADDRSELF_2); | |
368 | ||
369 | // Disable Device Number Matches Stored Device Number Check | |
370 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlRidDev ); | |
371 | ||
372 | // Disable Bus Number Matches Stored Bus Number Check | |
373 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlRidBus ); | |
374 | ||
375 | // Disable Function Number Matches Stored Function Number Check | |
376 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlRidFunc ); | |
377 | ||
378 | // Disable Completion's BCM must not be set by PCI Express completer. | |
379 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCplBCM0 ); | |
380 | ||
381 | // Disable BAR Address Check For a Device in Specified Memory/IO Range | |
382 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_ADNON_1 ); | |
383 | ||
384 | // Disable Check For a Device with Specified ID | |
385 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_IDNON_2 ); | |
386 | ||
387 | // Disable Check For 64-bit Addresses That Are Below 4GB | |
388 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlAddr4GB ); | |
389 | ||
390 | // Disable Check That Received Cpl/CplD Packets Have a Matching Request | |
391 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_CPLQ0_1 ); | |
392 | ||
393 | // Disable Check That Request Is Not Supported By Device | |
394 | SignalInterface.SuppressDenaliErr( PCIE_TL_COR_TLP_UR_1 ); | |
395 | ||
396 | // Disable Check That Request Address/Length Combination Crosses 4K Boundary | |
397 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlLen4KB ); | |
398 | ||
399 | // Discard the data embedded in CplD for an earlier CfgRd, because the RequesterID | |
400 | // was changed unexpectedly after the request packet [transId=0x%06x] was sent. | |
401 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_CPLUDN ); | |
402 | ||
403 | // Disable Check That Completer ID Is Not Same As Requester ID | |
404 | SignalInterface.SuppressDenaliErr( PCIE_TL_COR_TLP_IDSELF_2 ); | |
405 | ||
406 | // Disable Check That Port Function is defined as Configuration 0. | |
407 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCfg1 ); | |
408 | ||
409 | // Disable Check That Completion is Supplied For Every Driven Request | |
410 | SignalInterface.SuppressDenaliErr( PCIE_TL_COR_TLP_CPLTO_2 ); | |
411 | ||
412 | // Disable Check two different devices write the same data to a config. register | |
413 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_CPLUN ); | |
414 | ||
415 | // Allow FNXPCIEXtr to send any ReqID in Cfg requests. Added by RFT. Approved by JCB. | |
416 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCfgBus); | |
417 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCfgDev); | |
418 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCfgFun); | |
419 | ||
420 | // Allow usage of any requester ID by Xactor regardless of pending | |
421 | // requests in Denali's User/TX Queues | |
422 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_DID_TXQ); | |
423 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_DID_USERQ); | |
424 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_DID_RXCPLQ); | |
425 | ||
426 | // Transactions pending in various Denali Q's need not conform to the BAR | |
427 | // configuration associated with new requests since the Xactor is being | |
428 | // used as a traffic generator | |
429 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_TXCPLQ); | |
430 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_TXCPLQ0); | |
431 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_RXCPLQ); | |
432 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_RXCPLQ0); | |
433 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_TXQ ); | |
434 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_TXQ0); | |
435 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_USERQ); | |
436 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_CFG_MID_USERQ0); | |
437 | ||
438 | // [review jcb 2/9/04] [DEN #17235] Workaround For Issue w/ Denali v1.000-14, Denali Claims CplH/CplD | |
439 | // Credits Advertised During FC Init by an EP Must be Infinite | |
440 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_FCPE_INI_CPLH ); | |
441 | SignalInterface.SuppressDenaliErr( PCIE_TL_FATAL_FCPE_INI_CPLD ); | |
442 | ||
443 | // Request size is greater than Max_Read_Request_Size in Device Control Register. | |
444 | SignalInterface.SuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlLenMRR); | |
445 | // | |
446 | // End -> Suppress Denali Error Checks | |
447 | ///////////////////////////////////////////////////////// | |
448 | } | |
449 | ||
450 | task denali_root_monitor_PCIEXactorBuilder::ResetAssertCov() | |
451 | { | |
452 | AssertCovDatabase.Reset(); | |
453 | } | |
454 | ||
455 | task denali_root_monitor_PCIEXactorBuilder::AddAssertPt( denaliPcieErrorTypeT covPt ) | |
456 | { | |
457 | AssertCovDatabase.Add( covPt ); | |
458 | } | |
459 | ||
460 | function bit denali_root_monitor_PCIEXactorBuilder::IsAssertPtCovered( denaliPcieErrorTypeT covPt ) | |
461 | { | |
462 | IsAssertPtCovered = AssertCovDatabase.Covered( covPt ); | |
463 | } | |
464 | ||
465 | function integer denali_root_monitor_PCIEXactorBuilder::GetAssertPtCnt( denaliPcieErrorTypeT covPt ) | |
466 | { | |
467 | GetAssertPtCnt = AssertCovDatabase.Count( covPt ); | |
468 | } | |
469 | ||
470 | task denali_root_monitor_PCIEXactorBuilder::DisplayAssertCov( ReportType rptType ) | |
471 | { | |
472 | AssertCovDatabase.Display( rptType ); | |
473 | } | |
474 | ||
475 | task denali_root_monitor_PCIEXactorBuilder::Epilogue( ReportType rptType ) | |
476 | { | |
477 | string MethodName = "Epilogue"; | |
478 | ||
479 | PCIEX_QR_Type( rptType, "%s -> Begin\n%s", XactorName, SignalInterface.GetEpilogueStr() ); | |
480 | PCIEX_QR_Type( rptType, "%s -> End", XactorName ); | |
481 | } | |
482 | ||
483 | task denali_root_monitor_PCIEXactorBuilder::SetUnexpectedTLPErr() | |
484 | { | |
485 | string MethodName = "SetUnexpectedTLPErr"; | |
486 | ||
487 | Manager.UnexpectedTLPIsErr = 1; | |
488 | PCIEX_QR_I( "%s -> Unexpected TLP Errors Enabled.", XactorName ); | |
489 | } | |
490 | ||
491 | task denali_root_monitor_PCIEXactorBuilder::SuppressUnexpectedTLPErr() | |
492 | { | |
493 | string MethodName = "SuppressUnexpectedTLPErr"; | |
494 | ||
495 | Manager.UnexpectedTLPIsErr = 0; | |
496 | PCIEX_QR_I("%s -> Unexpected TLP Errors Suppressed.", XactorName ); | |
497 | } | |
498 | ||
499 | task denali_root_monitor_PCIEXactorBuilder::SomaSet( string somaParm, string somaValue ) | |
500 | { | |
501 | string MethodName = "SomaSet"; | |
502 | string somaSetStr; | |
503 | integer status; | |
504 | ||
505 | status = DenaliDDVTclEval( { "mmsomaset", " ", PCIEDevice.GetInstanceName(), " ", somaParm, " ", somaValue } ); | |
506 | if (status >= 0) | |
507 | PCIEX_QR_I( "Inst=%s Parm=%s Val=%s", | |
508 | PCIEDevice.GetInstanceName(), somaParm, somaValue ); | |
509 | else | |
510 | PCIEX_QR_ERR( "mmsomaset Failed. Inst=%s Parm=%s Val=%s", | |
511 | PCIEDevice.GetInstanceName(), somaParm, somaValue ); | |
512 | } |