Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / ilu_peu / soma_fastlink_root_monitor.spc
CommitLineData
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AT
1--
2--======================================================================
3--Copyright 1999-2003 by Denali Software, Inc. All rights reserved.
4--======================================================================
5--
6--This SOMA file describes a memory model, using Denali Software's
7--proprietary SOMA language. By using this SOMA file, you agree to the
8--following terms. If you do not agree to these terms, you may not use
9--this SOMA file.
10--
11--Subject to the restrictions set forth below, Denali Software grants
12--you a non-exclusive, non-transferable license only to use this SOMA
13--file to simulate the memory described in it using tools supplied by
14--Denali Software.
15--
16--You may not:
17--
18-- (1) Use this SOMA file to create software programs or tools that use
19-- SOMA files as either input or output.
20--
21-- (2) Modify this SOMA file or the SOMA language in any manner.
22--
23-- (3) Use this SOMA file to create other languages for describing
24-- memory models.
25--
26-- (4) Distribute this SOMA file to others.
27--
28--This SOMA file is based on information received by Denali Software
29--from third parties. DENALI SOFTWARE PROVIDES THIS SOMA FILE "AS IS"
30--AND EXPRESSLY DISCLAIMS ALL REPRESENTATIONS, WARRANTIES AND
31--CONDITIONS, INCLUDING BUT NOT LIMITED TO WARRANTIES AND CONDITIONS OF
32--MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND
33--NONINFRINGEMENT. DENALI SOFTWARE'S AGGREGATE LIABILITY ARISING FROM
34--YOUR USE OF THIS SOMA FILE IS LIMITED TO ONE U.S. DOLLAR.
35--
36--If you have any questions or if you would like to inquire about
37--obtaining additional or different rights in SOMA files or the SOMA
38--language, please contact Denali Software, at www.denali.com or at
39--info@denalisoft.com.
40--
41--Written on 03 Apr 2003
42--PureView version: 3.100 $DENALI: /home/scratch/guoqing/work/main/platform/SunOS/denali
43Version 0.001
44pcie
45
46Sizes
47SpecVersion "1.0A2"
48linkWidths "1 2 4 8"
49numDownPort 1
50numRCRB 0
51BusNumber 0
52portNumber 0
53numFunc 1
54FuncNumber 0
55RCRBid 0
56configID 0
57portRCRBid 0
58VendorID 0
59DeviceID 0
60RevisionID 0
61BaseClass 0
62SubClass 0
63InterfaceClass 0
64InterruptNum 1
65ROMsize 0
66SubSysID 0
67SubVendorID 0
68Breg0Width 64
69Breg0Size 36
70Breg0RdMin 0
71Breg0RdMax 0
72Breg1Width 32
73Breg1Size 10
74Breg1RdMin 0
75Breg1RdMax 0
76Breg2Width 32
77Breg2Size 10
78Breg2RdMin 0
79Breg2RdMax 0
80Breg3Width 32
81Breg3Size 10
82Breg3RdMin 0
83Breg3RdMax 0
84Breg4Width 32
85Breg4Size 10
86Breg4RdMin 0
87Breg4RdMax 0
88Breg5Width 32
89Breg5Size 10
90Breg5RdMin 0
91Breg5RdMax 0
92BrPrimBus 0
93BrSecBus 0
94BrSubBus 0
95brBreg0Width 32
96brBreg0Size 10
97brBreg0RdMin 0
98brBreg0RdMax 0
99brBreg1Width 32
100brBreg1Size 10
101brBreg1RdMin 0
102brBreg1RdMax 0
103PMSCsel 0
104PMSCsca 0
105PMSCdata 0
106PMCaux 0
107MSInumMsg 1
108PCIEdevMaxPL 4096
109PCIEdevPF 3
110PCIEdevTag 8
111PCIEdevPowLimit 0
112PCIEdcMaxPL 512
113PCIEdcMaxRead 4096
114PCIElkPort 0
115PCIElcRCB 64
116PCIEslNum 0
117PCIEslPowLimit 0
118PCIEXvc1Evc 0
119PCIEXvc1LEvc 0
120PCIEXvc1Arb 0
121PCIEXvcARsel 0
122PCIEXvcARtab "0"
123PCIEXvcR0FCPH 115
124PCIEXvcR0FCPD 2047
125PCIEXvcR0FCNPH 115
126PCIEXvcR0FCNPD 2047
127PCIEXvcR0FCCPLH 0
128PCIEXvcR0FCCPLD 0
129PCIEXvcR0time 0
130PCIEXvcR0map 255
131PCIEXvcR0sel 0
132PCIEXvcR0tab "0"
133PCIEXvcR1FCPH 1
134PCIEXvcR1FCPD 257
135PCIEXvcR1FCNPH 1
136PCIEXvcR1FCNPD 1
137PCIEXvcR1FCCPLH 0
138PCIEXvcR1FCCPLD 0
139PCIEXvcR1time 0
140PCIEXvcR1map 0
141PCIEXvcR1sel 0
142PCIEXvcR1vcID 1
143PCIEXvcR1tab "0"
144PCIEXds1 0
145PCIEXds2 0
146PCIEXpbDVal 0
147PCIEXpbDsubState 0
148PCIEXpbDstate 0
149CntPollingActiveTS1 16
150CntPollingConfigTS1 16
151linkNum "0"
152numFTS 2
153invertPolarity "0"
154DLretBuf 4096
155TLplSize 4096
156TLtrSize 20
157TLCplQSize 16
158vendorIDS ""
159PCIEXvcR2FCPH 1
160PCIEXvcR2FCPD 257
161PCIEXvcR2FCNPH 1
162PCIEXvcR2FCNPD 1
163PCIEXvcR2FCCPLH 0
164PCIEXvcR2FCCPLD 0
165PCIEXvcR2time 0
166PCIEXvcR2map 0
167PCIEXvcR2sel 0
168PCIEXvcR2vcID 1
169PCIEXvcR2tab "0"
170PCIEXvcR3FCPH 1
171PCIEXvcR3FCPD 257
172PCIEXvcR3FCNPH 1
173PCIEXvcR3FCNPD 1
174PCIEXvcR3FCCPLH 0
175PCIEXvcR3FCCPLD 0
176PCIEXvcR3time 0
177PCIEXvcR3map 0
178PCIEXvcR3sel 0
179PCIEXvcR3vcID 1
180PCIEXvcR3tab "0"
181PCIEXvcR4FCPH 1
182PCIEXvcR4FCPD 257
183PCIEXvcR4FCNPH 1
184PCIEXvcR4FCNPD 1
185PCIEXvcR4FCCPLH 0
186PCIEXvcR4FCCPLD 0
187PCIEXvcR4time 0
188PCIEXvcR4map 0
189PCIEXvcR4sel 0
190PCIEXvcR4vcID 1
191PCIEXvcR4tab "0"
192PCIEXvcR5FCPH 1
193PCIEXvcR5FCPD 257
194PCIEXvcR5FCNPH 1
195PCIEXvcR5FCNPD 1
196PCIEXvcR5FCCPLH 0
197PCIEXvcR5FCCPLD 0
198PCIEXvcR5time 0
199PCIEXvcR5map 0
200PCIEXvcR5sel 0
201PCIEXvcR5vcID 1
202PCIEXvcR5tab "0"
203PCIEXvcR6FCPH 1
204PCIEXvcR6FCPD 257
205PCIEXvcR6FCNPH 1
206PCIEXvcR6FCNPD 1
207PCIEXvcR6FCCPLH 0
208PCIEXvcR6FCCPLD 0
209PCIEXvcR6time 0
210PCIEXvcR6map 0
211PCIEXvcR6sel 0
212PCIEXvcR6vcID 1
213PCIEXvcR6tab "0"
214PCIEXvcR7FCPH 1
215PCIEXvcR7FCPD 257
216PCIEXvcR7FCNPH 1
217PCIEXvcR7FCNPD 1
218PCIEXvcR7FCCPLH 0
219PCIEXvcR7FCCPLD 0
220PCIEXvcR7time 0
221PCIEXvcR7map 0
222PCIEXvcR7sel 0
223PCIEXvcR7vcID 1
224PCIEXvcR7tab "0"
225laneRXstatus " 0 1"
226txLaneSKEW "0"
227numSKIP 1
228laneTxDisable " 0"
229laneRxDisable " 0"
230redundantInitFc1Dllps 2
231redundantInitFc2Dllps 2
232DevNumber 0
233CardBus 0
234portCount 1
235CacheLsize 0
236InterruptLine 0
237capPtr 0
238Cardbus 0
239ROMsize0 0
240BrSLTval 0
241ROMsize1 0
242PMCaddr 0
243capPMPtr 0
244MSIaddr 0
245capMSIPtr 0
246AGPaddr 0
247capAGPPtr 0
248AGPsize 3
249VPDaddr 0
250capVPDPtr 0
251VPDsize 2
252SLOTaddr 0
253capSLOTPtr 0
254SLOTsize 1
255HSaddr 0
256capHSPtr 0
257HSsize 1
258PCIXaddr 0
259capPCIXPtr 0
260PCIXsize 1
261AMDaddr 0
262capAMDPtr 0
263AMDsize 1
264VSaddr 0
265capVSPtr 0
266VSsize 4
267DPaddr 0
268capDPPtr 0
269DPsize 1
270CRCaddr 0
271capCRCPtr 0
272CRCsize 1
273HPaddr 0
274capHPPtr 0
275HPsize 1
276PCIEaddr 0
277capPEPtr 0
278PCIEAEaddr 0
279capAEPtr 0
280PCIEVCaddr 0
281capVCPtr 0
282PCIEXvcARloc 0
283PCIEDSaddr 0
284capDSPtr 0
285PCIEPBaddr 0
286capPBPtr 0
287numSymbolErrors 4
288skipIntervalMax 1538
289skipIntervalMin 1180
290beaconSymbol "K28.5+"
291DlTxQueueDelay 0
292DlRxQueueDelay 0
293capSLOTcnt 0
294capSSIDaddr 0
295capSSIDPtr 0
296capSSIDvid 0
297capSSIDsid 0
298phyLaneCount 8
299refClkMultiplier 1
300NFTSWithCommonClock 27
301NFTSWithoutCommonClock 27
302txBitSkewValues "random"
303txSymbolSkewValues "random"
304TLpmeSize 1
305TLCRSCnt 1
306TLTxQDelay 0
307MSIXaddr 0
308capMSIXPtr 0
309MSIXts 1
310MSIXtblOS 0
311MSIXtblBIR 0
312MSIXpbaOS 0
313MSIXpbaBIR 0
314PCIEdsOwnNP 1
315PCIEXaeImTr 1
316PCIEXaeImFC 1
317PCIEXaeImCA 1
318PCIEXaeImRcvrOvf 1
319PCIEXaeImEcrc 1
320PCIEXaeImRcvr 1
321PCIEXvcR0offset 0
322PCIEXvcR1offset 0
323PCIEXvcR2offset 0
324PCIEXvcR3offset 0
325PCIEXvcR4offset 0
326PCIEXvcR5offset 0
327PCIEXvcR6offset 0
328PCIEXvcR7offset 0
329PCIEXvsecDef ""
330
331Features
332ModelMode 1
333DeviceMode 0
334MonitorMode 1
335Layer 1
336modelTLP 1
337modelLLP 1
338modelPLP 1
339intLayer 1
340intLbit 1
341intLsymbol 0
342intLbyte 0
343intLpipe 0
344intLpacket 0
345DeviceType 1
346RC 1
347Switch 0
348Bridge 0
349PCIEtoPCI 0
350PCItoPCIE 0
351Endpoint 0
352Express 0
353Legacy 0
354Port 1
355genSoma 1
356genRCRB 0
357genConfig0 1
358genConfig1 0
359upstream 0
360hasRCRB 0
361ConfigSpace 0
362CommonConfig 0
363ClassCode 0
364BIST 0
365Command 1
366IOspace 1
367MEMspace 1
368EnBusMaster 0
369EnParityError 0
370EnSERR 0
371DisINT 0
372ROMbase 0
373ROMen 0
374config0 1
375baseReg0 1
376Breg0IO 0
377Breg0Pref 0
378baseReg1 1
379Breg1IO 0
380Breg1Pref 0
381baseReg2 0
382Breg2IO 0
383Breg2Pref 0
384baseReg3 0
385Breg3IO 0
386Breg3Pref 0
387baseReg4 0
388Breg4IO 0
389Breg4Pref 0
390baseReg5 0
391Breg5IO 0
392Breg5Pref 0
393config1 0
394brBaseReg0 0
395brBreg0IO 0
396brBreg0Pref 0
397brBaseReg1 0
398brBreg1IO 0
399brBreg1Pref 0
400BrIOrange 0
401BrIO16 0
402BrIO32 0
403BrPreMemRange 0
404BrPreMem32 0
405BrPreMem64 0
406BridgeCtrl 0
407BrPerrRes 0
408BrSERR 0
409PMCap 1
410PMdata 0
411PMCd1 0
412PMCd2 0
413PMCd3cold 0
414PMCd3hot 0
415PMCdsi 0
416MSI 0
417MSI64en 0
418PCIECap 1
419PCIEslot 0
420PCIEdev 1
421PCIEdevL0 0
422PCIEdevL00 1
423PCIEdevL01 0
424PCIEdevL02 0
425PCIEdevL03 0
426PCIEdevL04 0
427PCIEdevL05 0
428PCIEdevL06 0
429PCIEdevL07 0
430PCIEdevL1 0
431PCIEdevL10 1
432PCIEdevL11 0
433PCIEdevL12 0
434PCIEdevL13 0
435PCIEdevL14 0
436PCIEdevL15 0
437PCIEdevL16 0
438PCIEdevL17 0
439PCIEdevAttB 0
440PCIEdevAttI 0
441PCIEdevPowI 0
442PCIEdevPowScale 0
443PCIEdevPowScale0 1
444PCIEdevPowScale1 0
445PCIEdevPowScale2 0
446PCIEdevPowScale3 0
447PCIEdc 1
448PCIEdcCorErr 0
449PCIEdcNonFatalErr 0
450PCIEdcFatalErr 0
451PCIEdcUR 0
452PCIEdcRelOrder 0
453PCIEdcEtag 1
454PCIEdcPF 1
455PCIEdcAux 0
456PCIEdcNoSnoop 1
457PCIElk 0
458PCIElkL0 1
459PCIElkL00 1
460PCIElkL01 0
461PCIElkL02 0
462PCIElkL03 0
463PCIElkL04 0
464PCIElkL05 0
465PCIElkL06 0
466PCIElkL1support 0
467PCIElkL1 0
468PCIElkL10 0
469PCIElkL11 0
470PCIElkL12 0
471PCIElkL13 0
472PCIElkL14 0
473PCIElkL15 0
474PCIElkL16 0
475PCIElkL17 0
476PCIElc 0
477PCIElcL1 0
478PCIElcLkDis 0
479PCIElcExtSyn 0
480PCIEls 1
481PCIElsSlot 1
482PCIEsl 0
483PCIEslAttB 0
484PCIEslPow 0
485PCIEslMRL 0
486PCIEslAttI 0
487PCIEslPowI 0
488PCIEslHPS 0
489PCIEslHPen 0
490PCIEslPowScale 0
491PCIEslPowScale0 1
492PCIEslPowScale1 0
493PCIEslPowScale2 0
494PCIEslPowScale3 0
495PCIEsc 0
496PCIEscAttB 0
497PCIEscPowF 0
498PCIEscMRL 0
499PCIEscPres 0
500PCIEscCom 0
501PCIEscHPI 0
502PCIErc 0
503PCIErcCorErr 0
504PCIErcNonFatalErr 0
505PCIErcFatalErr 0
506PCIErcPME 0
507PCIEX 0
508PCIEXae 1
509PCIEXaeUM 0
510PCIEXaeUMtrain 0
511PCIEXaeUMdll 1
512PCIEXaeUMpoison 1
513PCIEXaeUMfc 0
514PCIEXaeUMcplTO 0
515PCIEXaeUMcplAB 0
516PCIEXaeUMun 0
517PCIEXaeUMofl 1
518PCIEXaeUMmal 1
519PCIEXaeUMecrc 0
520PCIEXaeUMus 0
521PCIEXaeUV 0
522PCIEXaeUVtrain 1
523PCIEXaeUVdll 1
524PCIEXaeUVpoison 0
525PCIEXaeUVfc 0
526PCIEXaeUVcplTO 0
527PCIEXaeUVcplAB 0
528PCIEXaeUVun 0
529PCIEXaeUVofl 1
530PCIEXaeUVmal 1
531PCIEXaeUVecrc 0
532PCIEXaeUVus 0
533PCIEXaeCM 0
534PCIEXaeCMrec 0
535PCIEXaeCMtlp 0
536PCIEXaeCMDLLP 0
537PCIEXaeCMrepN 0
538PCIEXaeCMrepT 0
539PCIEXaeCT 0
540PCIEXaeCTgenEn 0
541PCIEXaeCTgenCap 0
542PCIEXaeCTchkEn 0
543PCIEXaeCTchkCap 0
544PCIEXaeRC 0
545PCIEXaeRCcor 0
546PCIEXaeRCnonFatal 0
547PCIEXaeRCfatal 0
548PCIEXvc 1
549PCIEXvc1 0
550PCIEXvc2 0
551PCIEXvc2arb1 0
552PCIEXvc2arb2 0
553PCIEXvc2arb4 0
554PCIEXvc2arb8 0
555PCIEXvcR0 1
556PCIEXvcR0FC 1
557PCIEXvcR0Ca 0
558PCIEXvcR0Arb 0
559PCIEXvcR0Arb0 1
560PCIEXvcR0Arb1 0
561PCIEXvcR0Arb2 0
562PCIEXvcR0Arb3 0
563PCIEXvcR0Arb4 0
564PCIEXvcR0Arb5 0
565PCIEXvcR0APS 0
566PCIEXvcR0snoop 0
567PCIEXvcR0CT 1
568PCIEXvcR1 1
569PCIEXvcR1FC 1
570PCIEXvcR1Ca 0
571PCIEXvcR1Arb 0
572PCIEXvcR1Arb0 1
573PCIEXvcR1Arb1 0
574PCIEXvcR1Arb2 0
575PCIEXvcR1Arb3 0
576PCIEXvcR1Arb4 0
577PCIEXvcR1Arb5 0
578PCIEXvcR1APS 0
579PCIEXvcR1snoop 0
580PCIEXvcR1CT 0
581PCIEXds 0
582PCIEXpb 0
583PCIEXpbD 0
584PCIEXpbDsca 1
585PCIEXpbDsca0 1
586PCIEXpbDsca1 0
587PCIEXpbDsca2 0
588PCIEXpbDsca3 0
589PCIEXpbDtype 1
590PCIEXpbDtype0 1
591PCIEXpbDtype1 0
592PCIEXpbDtype2 0
593PCIEXpbDtype3 0
594PCIEXpbDtype7 0
595PCIEXpbDrail 1
596PCIEXpbDrail0 1
597PCIEXpbDrail1 0
598PCIEXpbDrail2 0
599PCIEXpbDrail7 0
600PCIEXpbC 0
601PCIEXpbCsys 0
602prot 1
603PL 1
604supportLaneReversal 1
605reverseLanes 0
606elecIdleValue 1
607elecIdleValue0 1
608elecIdleValue1 0
609elecIdleValueZ 0
610usePosSKP 0
611DLL 1
612TL 1
613application 0
614Sideband 1
615sbWake 0
616sbReset 1
617PCIEXvcR2 1
618PCIEXvcR2FC 1
619PCIEXvcR2Ca 0
620PCIEXvcR2Arb 0
621PCIEXvcR2Arb0 1
622PCIEXvcR2Arb1 0
623PCIEXvcR2Arb2 0
624PCIEXvcR2Arb3 0
625PCIEXvcR2Arb4 0
626PCIEXvcR2Arb5 0
627PCIEXvcR2APS 0
628PCIEXvcR2snoop 0
629PCIEXvcR2CT 0
630PCIEXvcR3 1
631PCIEXvcR3FC 1
632PCIEXvcR3Ca 0
633PCIEXvcR3Arb 0
634PCIEXvcR3Arb0 1
635PCIEXvcR3Arb1 0
636PCIEXvcR3Arb2 0
637PCIEXvcR3Arb3 0
638PCIEXvcR3Arb4 0
639PCIEXvcR3Arb5 0
640PCIEXvcR3APS 0
641PCIEXvcR3snoop 0
642PCIEXvcR3CT 0
643PCIEXvcR4 1
644PCIEXvcR4FC 1
645PCIEXvcR4Ca 0
646PCIEXvcR4Arb 0
647PCIEXvcR4Arb0 1
648PCIEXvcR4Arb1 0
649PCIEXvcR4Arb2 0
650PCIEXvcR4Arb3 0
651PCIEXvcR4Arb4 0
652PCIEXvcR4Arb5 0
653PCIEXvcR4APS 0
654PCIEXvcR4snoop 0
655PCIEXvcR4CT 0
656PCIEXvcR5 1
657PCIEXvcR5FC 1
658PCIEXvcR5Ca 0
659PCIEXvcR5Arb 0
660PCIEXvcR5Arb0 1
661PCIEXvcR5Arb1 0
662PCIEXvcR5Arb2 0
663PCIEXvcR5Arb3 0
664PCIEXvcR5Arb4 0
665PCIEXvcR5Arb5 0
666PCIEXvcR5APS 0
667PCIEXvcR5snoop 0
668PCIEXvcR5CT 0
669PCIEXvcR6 1
670PCIEXvcR6FC 1
671PCIEXvcR6Ca 0
672PCIEXvcR6Arb 0
673PCIEXvcR6Arb0 1
674PCIEXvcR6Arb1 0
675PCIEXvcR6Arb2 0
676PCIEXvcR6Arb3 0
677PCIEXvcR6Arb4 0
678PCIEXvcR6Arb5 0
679PCIEXvcR6APS 0
680PCIEXvcR6snoop 0
681PCIEXvcR6CT 0
682PCIEXvcR7 1
683PCIEXvcR7FC 1
684PCIEXvcR7Ca 0
685PCIEXvcR7Arb 0
686PCIEXvcR7Arb0 1
687PCIEXvcR7Arb1 0
688PCIEXvcR7Arb2 0
689PCIEXvcR7Arb3 0
690PCIEXvcR7Arb4 0
691PCIEXvcR7Arb5 0
692PCIEXvcR7APS 0
693PCIEXvcR7snoop 0
694PCIEXvcR7CT 0
695pipeDevice 0
696pipeMacro 0
697pipe8bit 1
698pipe16bit 0
699RCRB 0
700BARspec 0
701ROMbase0 0
702BrSecLat 1
703BrSLTBurst2 1
704BrSLT8 0
705BrSLThardW 0
706BrSecSt 0
707BrSecSt66 0
708BrSecStB2B 0
709BrSecStDev 0
710BrSecStDev0 1
711BrSecStDev1 0
712BrSecStDev2 0
713ROMbase1 0
714BrISA 0
715BrVGA 0
716BrVGA16 0
717BrMasterAbort 0
718BrFastB2B 0
719BrSecDCTimer 0
720BrTimerSerrEn 0
721PMEsupport 0
722PMEd0 1
723PMEd1 1
724PMEd2 1
725MSIen 0
726AGP 0
727VPD 0
728SLOT 0
729HS 0
730PCIX 0
731AMD 0
732VS 0
733DP 0
734CRC 0
735HotPlug 0
736PCIElcAspmDis 1
737PCIEXae2UM 0
738PCIEXae2UMta 0
739PCIEXae2UMma 0
740PCIEXae2UMrta 0
741PCIEXae2UMrma 1
742PCIEXae2UMue 1
743PCIEXae2UMucMsg 0
744PCIEXae2UMucData 1
745PCIEXae2UMucAttr 1
746PCIEXae2UMucAddr 1
747PCIEXae2UMdelay 1
748PCIEXae2UMperr 0
749PCIEXae2UMserr 1
750PCIEXae2UMint 0
751PCIEXae2US 0
752PCIEXae2USta 0
753PCIEXae2USma 0
754PCIEXae2USrta 0
755PCIEXae2USrma 0
756PCIEXae2USue 0
757PCIEXae2USucMsg 1
758PCIEXae2USucData 0
759PCIEXae2USucAttr 1
760PCIEXae2USucAddr 1
761PCIEXae2USdelay 0
762PCIEXae2USperr 0
763PCIEXae2USserr 1
764PCIEXae2USint 0
765reverseLaneNumbers 1
766skipInterval 0
767mergeErrMsgs 0
768disVDMsg0 1
769disVDMsg1 1
770disPoisonTX 0
771AS_EP 0
772capSLOT1st 0
773SSID 0
774PcieSpecVersion 1
775SpecVersion_1_0a2 1
776SpecVersion_1_1 0
777RelativeOrderOnlyInitDllps 0
778PHY 0
779PL_PHY 0
780unknownValue 1
781unknownValue0 1
782unknownValue1 0
783unknownValueZ 0
784unknownValueX 0
785unknownTimingWindow 0
786recoveryFinishesCurrentPkt 1
787capBeacon 0
788capLBmaster 0
789capXLink 0
790fcTimeout 0
791implRCMEM 0
792implRCIO 0
793mfCRS 1
794disP2P 0
795ImInterruptLine 1
796ImMasEn 1
797MasEn 1
798ImMwrInv 1
799PMEclk 0
800B2B3 0
801BPCCen 0
802PMEd3cold 1
803PMEd3hot 1
804PMEImEn 1
805MSIPVMen 0
806MSIX 0
807PCIEdcImRelOrder 1
808PCIEdcImEtag 1
809PCIEdcImPF 1
810PCIEdcImAux 1
811PCIEdcImNoSnoop 1
812PCIEdcImMaxRead 1
813PCIEds 0
814PCIElkL07 0
815PCIElcL0s 1
816PCIEXvcR0FCPHun 0
817PCIEXvcR0FCPDun 0
818PCIEXvcR0FCNPHun 0
819PCIEXvcR0FCNPDun 0
820PCIEXvcR0FCCPLHun 0
821PCIEXvcR0FCCPLDun 0
822PCIEXvcR1FCPHun 0
823PCIEXvcR1FCPDun 0
824PCIEXvcR1FCNPHun 0
825PCIEXvcR1FCNPDun 0
826PCIEXvcR1FCCPLHun 0
827PCIEXvcR1FCCPLDun 0
828PCIEXvcR2FCPHun 0
829PCIEXvcR2FCPDun 0
830PCIEXvcR2FCNPHun 0
831PCIEXvcR2FCNPDun 0
832PCIEXvcR2FCCPLHun 0
833PCIEXvcR2FCCPLDun 0
834PCIEXvcR3FCPHun 0
835PCIEXvcR3FCPDun 0
836PCIEXvcR3FCNPHun 0
837PCIEXvcR3FCNPDun 0
838PCIEXvcR3FCCPLHun 0
839PCIEXvcR3FCCPLDun 0
840PCIEXvcR4FCPHun 0
841PCIEXvcR4FCPDun 0
842PCIEXvcR4FCNPHun 0
843PCIEXvcR4FCNPDun 0
844PCIEXvcR4FCCPLHun 0
845PCIEXvcR4FCCPLDun 0
846PCIEXvcR5FCPHun 0
847PCIEXvcR5FCPDun 0
848PCIEXvcR5FCNPHun 0
849PCIEXvcR5FCNPDun 0
850PCIEXvcR5FCCPLHun 0
851PCIEXvcR5FCCPLDun 0
852PCIEXvcR6FCPHun 0
853PCIEXvcR6FCPDun 0
854PCIEXvcR6FCNPHun 0
855PCIEXvcR6FCNPDun 0
856PCIEXvcR6FCCPLHun 0
857PCIEXvcR6FCCPLDun 0
858PCIEXvcR7FCPHun 0
859PCIEXvcR7FCPDun 0
860PCIEXvcR7FCNPHun 0
861PCIEXvcR7FCNPDun 0
862PCIEXvcR7FCCPLHun 0
863PCIEXvcR7FCCPLDun 0
864PCIEXvsec 0
865
866Pins
867TX TX 8
868TX_ TX_ 8
869RX RX 8
870RX_ RX_ 8
871CLK_TX CLK_TX 1
872CLK_RX CLK_RX 1
873TxData TxData 8
874TxDataK TxDataK 1
875RxData RxData 8
876RxDataK RxDataK 1
877PCLK PCLK 1
878WAKE_ WAKE_ 1
879PERST_ PERST_ 1
880TxDetectRx TxDetectRx 1
881TxElecIdle TxElecIdle 1
882TxCompliance TxCompliance 1
883RxPolarity RxPolarity 1
884Reset_ Reset_ 1
885PowerDown PowerDown 2
886RxValid RxValid 1
887PhyStatus PhyStatus 1
888RxElecIdle RxElecIdle 1
889RxStatus RxStatus 3
890
891Timing
892ttoPollSpeed 400.12 ps
893ttoCfgLnWaitUp 2 ms
894ttoCfgLnWaitDn 2 ms
895ttoPollConfig 48 ms
896ttoPollActive 2 us
897ttoDetectQuiet 400 ns
898ttoDetectActive 200 ns
899ttoCfgLkStartDn 24 ms
900ttoCfgLkStartUp 24 ms
901ttoCfgCompDn 2 ms
902ttoCfgCompUp 24 ms
903ttoCfgLkAcceptDn 2 ms
904ttoCfgLkAcceptUp 2 ms
905ttoCfgIdle 2 ms
906ttoRcvrCfg 48 ms
907ttoRcvrLock 24 ms
908ttoRcvrIdle 2 ms
909ttoDisabled 2 ms
910ttoHotReset 2 ms
911ttoLoopback 2 ms
912ttoTLCpl 1000 ns
913ttxUImin 399.88 ps
914ttxUImax 400.12 ps
915ttxIDLEmin 50 clk
916ttxSetToIDLEmax 20 clk
917ttxLaneSKEWmax 1300 ps
918ttxCxLKmin 0 ms
919ttxCxLKmax 1 ms
920trxUImin 399.88 ps
921trxUImax 400.12 ps
922trxSetToDetectmax 10 ms
923trxTotalSKEWmax 20 ns
924ttoFcInitRollover disabled
925ttxIdleToDiff disabled
926ttoTLCplRx disabled
927ttoFCmin disabled
928ttoFCmax disabled
929ttoPMEmin disabled
930ttoPMEmax disabled
931ttoL0smax disabled
932ttoL0smin disabled
933ttoL1aspmmin disabled
934ttoL1aspmmax disabled
935ttoTurnOffmax disabled
936ttoPMmax disabled
937ttoD3hot2D0max disabled
938ttoPMHSmax disabled
939ttoCRSmax disabled
940ttoSysInit disabled
941ttxIdleToValid disabled
942ttxReceiverDetect disabled
943ttxFCmin disabled
944ttxFCmax disabled
945ttxFCESmin disabled
946ttxFCESmax disabled
947ttxPhyLatency disabled
948trxPhyLatency disabled
949ttxLoopbackEnableLatency disabled
950ttxBeaconMax disabled
951ttxBeaconMin disabled
952trxBeaconMax disabled
953trxBeaconMin disabled
954trxElecIdleMax disabled
955trxElecIdleMin disabled
956ttxDetectRxMax disabled
957ttxDetectRxMin disabled
958trxPhyLockMax disabled
959tP0ToP0sMax disabled
960tP0ToP0sMin disabled
961tP0ToP1Max disabled
962tP0ToP1Min disabled
963tP0ToP2Max disabled
964tP0ToP2Min disabled
965tP0sToP0Max disabled
966tP0sToP0Min disabled
967tP1ToP0Max disabled
968tP1ToP0Min disabled
969tP2ToP1Max disabled
970tP2ToP1Min disabled
971tP2ShutdownMax disabled
972tP2ShutdownMin disabled
973tP1StartupMax disabled
974tP1StartupMin disabled
975tResetToReadyMax disabled
976tResetToReadyMin disabled
977ttxPCLKToDataValidMax disabled
978ttxPCLKToDataValidMin disabled
979trxPCLKSetupMax disabled
980trxPCLKHoldMin disabled
981ttxResetToOutputMax disabled
982ttxResetToOutputMin disabled
983ttxAsyncPhyStatusMax disabled
984ttxAsyncPhyStatusMin disabled
985