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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: N2fcPioCfgIOWrStr.vr | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | class N2fcPioCfgIOWrStr extends PioCfgIOWrPEUStr { | |
36 | ||
37 | local string cmd; | |
38 | local bit [63:0] addr; | |
39 | local bit [31:0] length; | |
40 | local bit [63:0] dat; | |
41 | local integer pio_error; // 0 = no error, 1 = timeout, 2 = uc | |
42 | ||
43 | public task new (PEUTestEnv a_env, | |
44 | string cmd, | |
45 | bit [63:0] addr, | |
46 | bit [31:0] length, | |
47 | bit [63:0] dat, | |
48 | integer err | |
49 | ); | |
50 | ||
51 | public task Execute(); | |
52 | local task SetCplHdr (); | |
53 | local task SetupParms (); | |
54 | } | |
55 | ||
56 | ||
57 | task N2fcPioCfgIOWrStr::new (PEUTestEnv a_env, | |
58 | string cmd, | |
59 | bit [63:0] addr, | |
60 | bit [31:0] length, | |
61 | bit [63:0] dat, | |
62 | integer err | |
63 | ) { | |
64 | ||
65 | super.new (a_env); | |
66 | ||
67 | if ( err == 3 ) { | |
68 | return; // don't set up an expect or a completion | |
69 | } | |
70 | ||
71 | this._env = a_env; | |
72 | this.cmd = cmd; | |
73 | this.addr = addr; | |
74 | this.length = length; | |
75 | this.dat = dat; | |
76 | this.pio_error = err; | |
77 | ||
78 | this.SetupParms (); | |
79 | this.Execute (); | |
80 | } | |
81 | ||
82 | ||
83 | //------------------------------------------------------------------------- | |
84 | // over-ride parent class method | |
85 | //------------------------------------------------------------------------- | |
86 | ||
87 | task N2fcPioCfgIOWrStr::Execute() { | |
88 | integer cnt1,cnt2; | |
89 | ||
90 | //printf ("\nUDEBUG : N2fcPioCfgIOWrStr::Execute %s \n", cmd); | |
91 | ||
92 | SetPacketParams(); | |
93 | ||
94 | _req_id = PiuCsrs.piuREQ_ID; // override base class | |
95 | reqHdr [PEC_PCI__REQ_ID] = this._req_id; | |
96 | cplHdr [PEC_PCI__CPL_REQ_ID] = this._req_id; | |
97 | ||
98 | if (pio_error == 4) { | |
99 | //Make denali check for this instead of just disabling error | |
100 | //[PCISIG-PHY.2.3#11]. [port_0].RX Nullified TLP | |
101 | // f_env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_NULL_TLP ); | |
102 | //Packet will come out as a NULL packet so set the Xtr to check | |
103 | // for the PCIE_PL_NONFATAL_FRAME_NULL_TLP error | |
104 | _env.Pod.FNXPCIEEnableTrans.ExpectNullPkt(); | |
105 | cnt1 = _env.Pod.FNXPCIEBldr.SignalInterface.expectNullPkt; | |
106 | } | |
107 | ||
108 | this._env.expectPCIE(reqHdr, this._data, 1); | |
109 | non_posted_write_cmpl_outstanding++; | |
110 | ||
111 | //If the packet gets transmitted than make sure its NULL | |
112 | if (pio_error == 4) { | |
113 | cnt2 = _env.Pod.FNXPCIEBldr.SignalInterface.expectNullPkt; | |
114 | //Make sure packet expect wasn't removed and a NULL pkt was received | |
115 | if( cnt1 !== (cnt2 + 1) && !sync( CHECK, _env.ev_removePcie ) ){ | |
116 | _env.Report.report(RTYP_TEST_ERROR,"N2fcPioCfgIOWrStr Outgoing packet matched but a NullPkt wasn't received\n"); | |
117 | } | |
118 | } | |
119 | ||
120 | SetCplHdr(); | |
121 | ||
122 | if ( this.pio_error == 1 ) { | |
123 | printf ("\nDEBUG : N2fcPioCfgIOWrStr::Execute pio timeout requested, so no completion generated\n"); | |
124 | return; // timeout - don't send a completion | |
125 | } | |
126 | ||
127 | fork { // don't block other expects | |
128 | ||
129 | sync( ALL, _env.ev_StallPioCpl); // stall the completion if event is OFF | |
130 | ||
131 | if ((this._cpl_status === PEC_PCI__CPL_STATUS_RSVD1) || | |
132 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD2) || | |
133 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD3) || | |
134 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD4)) { | |
135 | this._env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCplSt ); //Malformed Completion TLP - Reserved completion status (%u). | |
136 | } | |
137 | ||
138 | this._env.drivePCIE(cplHdr, 0); | |
139 | ||
140 | if ((this._cpl_status === PEC_PCI__CPL_STATUS_CA) || | |
141 | (this._cpl_status === PEC_PCI__CPL_STATUS_UR) || | |
142 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD1) || | |
143 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD2) || | |
144 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD3) || | |
145 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD4)) { | |
146 | ||
147 | //this._env.expectILU(urHdr, this._data); | |
148 | //mailbox_put(this._errQueue, e_ERR_oe_wuc); | |
149 | //mailbox_put(this._errQueue, cplHdr ); | |
150 | ||
151 | if ( (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD1) || | |
152 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD2) || | |
153 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD3) || | |
154 | (this._cpl_status === PEC_PCI__CPL_STATUS_RSVD4)) { | |
155 | this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_NONFATAL_TLP_MF_vlCplSt ); //Malformed Completion TLP - Reserved completion status (%u). | |
156 | } | |
157 | } | |
158 | ||
159 | else if (this._cpl_status === PEC_PCI__CPL_STATUS_CRS) { | |
160 | ||
161 | this._env.expectTimeoutCpl(reqHdr); | |
162 | //mailbox_put(this._errQueue, e_ERR_oe_crs); | |
163 | //mailbox_put(this._errQueue, cplHdr ); | |
164 | } | |
165 | ||
166 | else if (this._ep_cpl === 1'b_1) { | |
167 | ||
168 | cplHdr [PEC_PCI__EP] = 0; | |
169 | SetCplHdr(); | |
170 | this._env.drivePCIE(cplHdr, 0); | |
171 | // this._env.expectILU(cplHdr, 0); | |
172 | cplHdr [PEC_PCI__EP] = 1; | |
173 | //mailbox_put(this._errQueue, e_ERR_ue_pp); | |
174 | //mailbox_put(this._errQueue, cplHdr); | |
175 | } | |
176 | ||
177 | this._env.freePioTag(this._tag); | |
178 | ||
179 | non_posted_write_cmpl_outstanding--; | |
180 | } | |
181 | join none | |
182 | } | |
183 | ||
184 | ||
185 | //------------------------------------------------------------------------- | |
186 | // New method. capture the header Request Tag and return it on completion | |
187 | //------------------------------------------------------------------------- | |
188 | ||
189 | task N2fcPioCfgIOWrStr::SetCplHdr () { | |
190 | ||
191 | //printf ("\nUDEBUG : N2fcPioCfgIOWrStr::SetCplHdr Got a Req Tag of %0h\n", this._env.ReceivedReqTag); | |
192 | cplHdr[PEC_PCI__CPL_TAG] = this._env.ReceivedReqTag; | |
193 | } | |
194 | ||
195 | ||
196 | ||
197 | //------------------------------------------------------------------------- | |
198 | // New method. Setup parent properties based on Core request | |
199 | //------------------------------------------------------------------------- | |
200 | ||
201 | task N2fcPioCfgIOWrStr::SetupParms() { | |
202 | ||
203 | // setup parameters based on request | |
204 | ||
205 | _type_req_prob_cfg0 = 0; | |
206 | _type_req_prob_cfg1 = 0; | |
207 | _type_req_prob_io = 0; | |
208 | ||
209 | _ep_cpl_prob_false = 100; | |
210 | _ep_cpl_prob_true = 0; | |
211 | ||
212 | _len_min = 1; | |
213 | _len_max = 1; | |
214 | ||
215 | _cpl_id_min = 0; | |
216 | _cpl_id_max = 0; | |
217 | ||
218 | _data_min = dat; | |
219 | ||
220 | _format_req_prob_3dw = 100; | |
221 | _format_req_prob_4dw = 0; | |
222 | ||
223 | _td_cpl_prob_true = 50; | |
224 | _td_cpl_prob_false = 50; | |
225 | ||
226 | case (cmd) { | |
227 | "CFGWR0" : { | |
228 | this._type_req_prob_cfg0 = 1; | |
229 | _addr_lsb_min = {addr[27:12], 4'b0, addr[11:2], 2'b0}; | |
230 | } | |
231 | "CFGWR1" : { | |
232 | this._type_req_prob_cfg1 = 1; | |
233 | _addr_lsb_min = {addr[27:12], 4'b0, addr[11:2], 2'b0}; | |
234 | } | |
235 | "IOWR" : { | |
236 | this._type_req_prob_io = 1; | |
237 | _addr_lsb_min = {addr[27:2], 2'b0}; | |
238 | } | |
239 | default : { printf ("\n N2fcPioCfgIOWrStr unknown command \n"); } | |
240 | } | |
241 | ||
242 | // Select DWBE based on address, length combination | |
243 | // (copied from N2fcPioMWrStr.vr) | |
244 | if((length[7:4] == 0) && (length[3:0] != 0)) { | |
245 | // got to "shift up" the dwbe, addr[2], and data since first_dwbe == 0 is illegal | |
246 | _first_dwbe_min = {length[0], length[1], length[2], length[3]}; | |
247 | _last_dwbe_min = 0; | |
248 | // make sure that address bit 2 is set | |
249 | _addr_lsb_min[2] = 1; | |
250 | _data_min[63:32] = this.dat[31:0]; | |
251 | } | |
252 | else { | |
253 | _first_dwbe_min = {length[4], length[5], length[6], length[7]}; | |
254 | _last_dwbe_min = {length[0], length[1], length[2], length[3]}; | |
255 | // make sure that address bit 2 is cleared | |
256 | _addr_lsb_min[2] = 0; | |
257 | } | |
258 | ||
259 | _addr_lsb_max = _addr_lsb_min; | |
260 | _data_max = _data_min; | |
261 | ||
262 | _first_dwbe_max = _first_dwbe_min; | |
263 | _last_dwbe_max = _last_dwbe_min; | |
264 | ||
265 | } | |
266 |