Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / ilu_peu / vera / N2str / ilupeuDmaURMsgDPEUStr.vr
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ilupeuDmaURMsgDPEUStr.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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10// it under the terms of the GNU General Public License as published by
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21//
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
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34// ========== Copyright Header End ============================================
35class DmaURMsgDPEUStr extends DmaURBasePEUStr {
36
37
38 // ******************************************************************
39 // The Test Environment objects need to execute the strategy.
40 // ******************************************************************
41 local PEUTestEnv _env;
42 local integer _errQueue;
43 static integer _ctr = 0;
44
45
46 // ******************************************************************
47 // TLP Fields - These fields will be randomized using the parameters
48 // in the following section, and obeying the constraints defined
49 // within this class.
50 // ******************************************************************
51 local bit [1:0] _format;
52 local bit [4:0] _type;
53 local bit [2:0] _tc;
54 local bit _td;
55 local bit _ep;
56 local bit [1:0] _attr;
57 local bit [9:0] _len;
58 local bit [15:0] _req_id;
59 local bit [7:0] _tag;
60 local bit [7:0] _m_code;
61 local bit [63:0] _addr;
62 local integer _data;
63
64
65 // ******************************************************************
66 // Constructor
67 // ******************************************************************
68 public task new(PEUTestEnv a_env, (integer a_errQueue = 'bx));
69
70
71 // ******************************************************************
72 // Execute the strategy.
73 // ******************************************************************
74 public task Execute();
75}
76
77
78
79//-------------------------------------------------------------------
80// Method Name:
81// Description:
82//-------------------------------------------------------------------
83task DmaURMsgDPEUStr::new(PEUTestEnv a_env, (integer a_errQueue = 'bx)) {
84
85
86 super.new(a_env);
87 this._env = a_env;
88 this._errQueue = a_errQueue;
89}
90
91
92
93//-------------------------------------------------------------------
94// Method Name:
95// Description:
96//-------------------------------------------------------------------
97task DmaURMsgDPEUStr::Execute() {
98
99
100 bit [PEC_PCI__HDR] reqHdr;
101
102
103 this._format = PEC_PCI__FMT_DATA_4DW;
104
105 this._type [4:3] = 2'b_10;
106 this._type [2:0] = urandom_range(3'h_7, 3'h_0);
107
108 this._tc = 3'b_000;
109 this._td = urandom_range(1'b_1, 1'b_0);
110
111 randcase {
112 this._ep_req_prob_false : this._ep = 1'b_0;
113 this._ep_req_prob_true : this._ep = 1'b_1;
114 }
115
116 this._attr = 2'b_00;
117 this._len = urandom_range(this._env.getMaxPayloadSize() / 4, 10'h_1);
118 this._req_id = urandom_range(16'h_FFFF, 16'h_0);
119// this._tag = urandom_range(8'h_FF, 8'h_00);
120 //Make unique so Denali doesn't hold packets hostage
121 _env.allocDmaTag( this._tag );
122
123
124/*review - Fix Denali to support undefined message codes
125 _ctr = _ctr + 1;
126 case ( _ctr )
127 {
128 1: this._m_code = PEC_PCI__MSG_CODE_VENDOR_TYPE_0;
129 2: this._m_code = PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT;
130 default: this._m_code = urandom_range(8'h_FF, 8'h_00);
131 }
132
133 while ((this._m_code === PEC_PCI__MSG_CODE_ASSERT_INTA) ||
134 (this._m_code === PEC_PCI__MSG_CODE_ASSERT_INTB) ||
135 (this._m_code === PEC_PCI__MSG_CODE_ASSERT_INTC) ||
136 (this._m_code === PEC_PCI__MSG_CODE_ASSERT_INTD) ||
137 (this._m_code === PEC_PCI__MSG_CODE_DEASSERT_INTA) ||
138 (this._m_code === PEC_PCI__MSG_CODE_DEASSERT_INTB) ||
139 (this._m_code === PEC_PCI__MSG_CODE_DEASSERT_INTC) ||
140 (this._m_code === PEC_PCI__MSG_CODE_DEASSERT_INTD) ||
141 (this._m_code === PEC_PCI__MSG_CODE_VENDOR_TYPE_1))
142 this._m_code = urandom_range(8'h_FF, 8'h_00);
143*/
144randcase{
145 2: this._m_code = PEC_PCI__MSG_CODE_VENDOR_TYPE_0;
146 1: this._m_code = PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT;
147}
148
149
150 this._addr = {urandom(), urandom()};
151
152 if( this._m_code == PEC_PCI__MSG_CODE_VENDOR_TYPE_0 ){
153 randcase{
154 1: this._type [2:0] = 3'b000;
155 1: this._type [2:0] = 3'b010;
156 1: this._type [2:0] = 3'b011;
157 1: this._type [2:0] = 3'b100;
158 }
159
160 //review - Denali troubles with vendor defined messages
161 this._addr = { this._type [2:0] == 3'b010 ? this._addr[63:48] : 16'h0,
162 random()%2 ? _env.Scenario.denaliVendorDefinedVendorID2 :
163 _env.Scenario.denaliVendorDefinedVendorID1,
164 32'h0};
165 }
166
167 if( this._m_code == PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
168 this._len = 1;
169 this._addr = 64'h0;
170 this._type [2:0] = 3'b100;
171 }
172
173
174
175 this._data = urandom_range(255, 0);
176
177
178 reqHdr [PEC_PCI__HDR] = {128{1'b_0}};
179 reqHdr [PEC_PCI__FMT] = this._format;
180 reqHdr [PEC_PCI__TYPE] = this._type;
181 reqHdr [PEC_PCI__TC] = this._tc;
182 reqHdr [PEC_PCI__TD] = this._td;
183 reqHdr [PEC_PCI__EP] = this._ep;
184 reqHdr [PEC_PCI__ATTR] = this._attr;
185 reqHdr [PEC_PCI__LEN] = this._len;
186 reqHdr [PEC_PCI__REQ_ID] = this._req_id;
187 reqHdr [PEC_PCI__TLP_TAG] = this._tag;
188 reqHdr [PEC_PCI__MSG_CODE] = this._m_code;
189 reqHdr [PEC_PCI__ADDR] = this._addr;
190
191printf("DmaURMsgDPEUStr _m_code=%h reqHdr=%h \n",_m_code,reqHdr);
192
193 this._env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKROUT );
194 if( this._m_code == PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
195 this._env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_TL_NONFATAL_TLP_PLN0_Msg );
196 }
197 if( this._m_code != PEC_PCI__MSG_CODE_VENDOR_TYPE_0 &&
198 this._m_code != PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
199 this._env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKMSG );
200 }
201
202 if ( super.f_abortErrTlp )
203 {
204 this._env.drivePCIE(reqHdr, this._data, *, *, *, 1);
205 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKROUT );
206 if( this._m_code == PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
207 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_NONFATAL_TLP_PLN0_Msg );
208 }
209 if( this._m_code != PEC_PCI__MSG_CODE_VENDOR_TYPE_0 &&
210 this._m_code != PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
211 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKMSG );
212 }
213 this._env.waitIngressLatency(reqHdr);
214 }
215 else
216 {
217 this._env.reserveIngressCredits(reqHdr);
218 this._env.drivePCIE(reqHdr, this._data);
219 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKROUT );
220 if( this._m_code == PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
221 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_NONFATAL_TLP_PLN0_Msg );
222 }
223 if( this._m_code != PEC_PCI__MSG_CODE_VENDOR_TYPE_0 &&
224 this._m_code != PEC_PCI__MSG_CODE_SET_SLOT_POWER_LIMIT ){
225 this._env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_TL_FATAL_TLP_UNKMSG );
226 }
227 this._env.consumeIngressCredits(reqHdr);
228
229 this._env.waitIngressLatency( reqHdr );
230
231 mailbox_put(this._errQueue, e_ERR_none);
232 mailbox_put(this._errQueue, 2);
233 mailbox_put(this._errQueue, e_ERR_ue_ur);
234 mailbox_put(this._errQueue, reqHdr);
235 mailbox_put(this._errQueue, e_ERR_ue_mfp);
236 mailbox_put(this._errQueue, 128'bx0);
237 }
238
239 _env.freeDmaTag( this._tag );
240}