Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / ilu_peu / vera / N2str / ilupeuEdbErrPEUStr.vr

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: ilupeuEdbErrPEUStr.vr
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// ========== Copyright Header End ============================================
class EdbErrPEUStr extends PEUStrBase 
  {
  integer f_errQueue;				// A mailbox for bad pkt headers
  integer f_len;				// The packet's payload length
  bit f_lenSpecified;				// Was a length specified?
  bit[4:0] f_type;				// The packet's type
  bit f_typeSpecified;				// Was a type specified?
  bit[7:0] f_mask;
  bit f_bndySpecified;
  integer f_bndy;
  integer f_bndySize;

  task new( PEUTestEnv a_env )
    {
    super.new( a_env );
    f_errQueue = 0;
    f_lenSpecified = 0;
    f_typeSpecified = 0;
    f_mask = 8'b0;
    f_bndySpecified = 0;
    }

  task SetErrQueue( integer a_queue )
    {
    f_errQueue = a_queue;
    } /* end SetErrQueue */

  task SetLength( integer a_len )
    {
    f_len = a_len;
    f_lenSpecified = 1;
    } /* end SetLength */

  task SetType( integer a_type )
    {
    f_type = a_type;
    f_typeSpecified = 1;
    } /* end SetType */

  task SetMask( bit[7:0] a_mask )
    {
    f_mask = a_mask;
    } /* end SetMask */

  task SetBndy( integer a_bndy, (integer a_size=64) )
    {
    f_bndySpecified = 1;
    f_bndy = a_bndy;
    f_bndySize = a_size;
    } /* end SetBndy */

  task Execute()
    {
    bit[PEC_PCI__HDR] egressHdr;		// The egress TLP's header
    integer egressData;				// A payload descriptor
    bit[7:0] egressTag;				// The tag for the TLP
    bit[7:0] egressAddr;			// The DOU starting address
    bit[PEC_PCI__HDR] ingressHdr;		// The ingress TLP's header
    integer ingressData;			// A payload descriptor
    bit[7:0] ingressTag;			// The tag for the TLP
    integer cnt1,cnt2;


					// Build a TLP, using the specified
					// type and length, if any.
    if ( !f_typeSpecified )
      {
      randcase
        {
        4 : { f_type = PEC_PCI__TYPE_MEM; f_len = urandom()%2 + 1; }
        1 : { f_type = PEC_PCI__TYPE_CFG0; f_len = 1; }
        1 : { f_type = PEC_PCI__TYPE_CFG1; f_len = 1; }
        1 : { f_type = PEC_PCI__TYPE_IO; f_len = 1; }
        1 : { f_type = PEC_PCI__TYPE_CPL; f_len = urandom()%32 + 1; }
        }
      }

    else if ( !f_lenSpecified ) 
      {
      if ( f_type == PEC_PCI__TYPE_CPL )
        f_len = urandom()%32 + 1;
      else if ( f_type == PEC_PCI__TYPE_MEM )
        f_len = urandom()%2 + 1;
      else
        f_len = 1;
      }

					// If a completion (with data) was
					// requested, then base it on a DMA
					// read request (which we won't submit).
    if ( f_type == PEC_PCI__TYPE_CPL )
      {
      f_env.allocDmaTag( ingressTag );
      f_env.genIngressRdReq( ingressTag, ingressHdr, ingressData, f_len );
      if ( f_bndySpecified )
        f_env.setAddrBndy( ingressHdr, f_bndy, f_bndySize );
      f_env.genEgressCpl( ingressHdr, egressHdr, egressData );
      f_env.allocCplData( ingressHdr[PEC_PCI__LEN], 
                          egressHdr[PEC_PCI__LOWADDR],
                          egressAddr );
      }
    else
      {
      f_env.allocWrTag( egressTag, egressAddr );
      f_env.genEgressWrReq( egressTag, egressHdr, egressData, f_len, f_type );
      if ( f_bndySpecified )
        f_env.setAddrBndy( egressHdr, f_bndy, f_bndySize );
      }

					// Present the TLP to the ILU, and 
					// specify that parity errors are to
					// accompany the payload.
    f_env.errorPayload( egressData, f_mask );
    f_env.driveILU( egressHdr, egressAddr, egressData );

					// We're going to enter the drain state.
    f_env.enterDrainState();

					// Expect the faulty TLP from the TLU.
					// And wait for the TLU to signal the
					// ILU to enter the "drain state".      
					// We used to "disconnectEgressPipeline"
					// when the TLU's behavior was wierd.
    //Make denali check for this instead of just disabling error
    //[PCISIG-PHY.2.3#11].  [port_0].RX Nullified TLP 
//    f_env.Pod.FNXPCIEEnableTrans.tempSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_NULL_TLP );
    //Packet will come out as a NULL packet so set the Xtr to check 
    // for the PCIE_PL_NONFATAL_FRAME_NULL_TLP error
    f_env.Pod.FNXPCIEEnableTrans.ExpectNullPkt();
    cnt1 = f_env.Pod.FNXPCIEBldr.SignalInterface.expectNullPkt; 

    //If the packet gets transmitted than make sure its NULL
    fork
    {
       f_env.expectPCIE( egressHdr, egressData );
       @(posedge CLOCK);
       cnt2 = f_env.Pod.FNXPCIEBldr.SignalInterface.expectNullPkt; 
       //Make sure packet expect wasn't removed and a NULL pkt was received
       if( cnt1 !== (cnt2 + 1)  &&
           !sync( CHECK, f_env.ev_removePcie ) && 
           !sync( CHECK, f_env.ev_drainStateEnd ) &&
           !f_env.drainStateActive ){
          f_env.Report.report(RTYP_TEST_ERROR,"ilupeuEdbErrPEUStr Outgoing packet matched but a NullPkt wasn't received cnt1=%0d cnt2=%0d \n", cnt1,cnt2);
       }
    }
    join none
    
    f_env.waitDrainState();

					// Free the DMA tag if we just pushed
					// a completion through the pipe.
    if ( f_type == PEC_PCI__TYPE_CPL )
      {
      f_env.freeDmaTag( ingressTag );
      }

					// Tell the error-checker about this
					// bad-boy.
    if ( f_errQueue != 0 )
      {
      mailbox_put( f_errQueue, e_ERR_oe_edp );
      mailbox_put( f_errQueue, 128'hx );
      }

    } /* end Execute */
  } /* end EdbErrPEUStr */