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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / ilu_peu / vera / N2str / ilupeuIngressRcvrErr.vr
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ilupeuIngressRcvrErr.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35class IngressRcvrErr extends PEUStrBase
36 {
37 integer f_errQueue; // A mailbox for bad pkt headers
38
39 integer nmbrRcvrErrsToInject = 10; //Total number of packets that get error injected
40 integer rcvrErrPct = 10; //% of packets that get an error
41 //Set the percentage weight of each type of receiver error
42 integer rcvrErr8b10bWeight = 10;
43 integer rcvrErrFramingWeight = 10;
44 integer rcvrErrDisparityWeight = 10;
45 integer rcvrErrFlipBitWeight = 10; //This is sometimes a CRC error - If the STP gets flipped
46 // into a data bit then a CRC error isn't hit
47 integer rcvrErrLcrcWeight = 10; //This is a CRC error
48 integer rcvrErrDupSeqNmbrWeight = 0;
49 integer rcvrErrOutOfSeqNmbrWeight = 0;
50 integer rcvrErrBadSeqNmbrWeight = 0;
51 integer InvertLCRCErrWeight = 0;
52 integer EDBErrWeight = 0;
53 integer InvertLCRCAndEDBErrWeight = 0;
54
55 //
56 integer invertLCRC32ErrInjected = 0;
57 integer EDBErrInjected = 0;
58 integer InvertLCRCAndEDBErrInjected = 0;
59
60
61 //Make the Bad TLP Packet error optional-directed cases
62 //Only rcvrErrFlipBitWeight & rcvrErrLcrcWeight are certain BTP errors
63 // and all others are due to sequence errors, So make the default optional
64 // except for rcvrErrFlipBitWeight & rcvrErrLcrcWeight
65 bit optional_CE_BTP = 1;
66
67 //Only allow 1 of these strategies to be active at a time
68 static integer rcvrErr_semaphore = alloc(SEMAPHORE, 0, 1, 1);
69
70 task new( PEUTestEnv a_env )
71 {
72 super.new( a_env );
73 f_errQueue = 0;
74 }
75
76 task SetErrQueue( integer a_queue )
77 {
78 f_errQueue = a_queue;
79 } /* end SetErrQueue */
80
81 task Execute()
82 {
83 integer nmbrErrs;
84 integer other_nonInvertLCRCAndEDBErrInjected = 0 ;
85 integer denaliReplayTimer;
86 bit recoveryEntered = 0;
87 //Get the semaphore when its your turn
88 semaphore_get( WAIT, rcvrErr_semaphore, 1);
89
90 //
91 optional_CE_BTP = 1;
92
93 //Change Denalis replay timer to take out rx_L0s_adj=250
94 denaliReplayTimer = f_env.Scenario.denaliReplayTimerThreshold - 250;
95 f_env.Pod.FNXPCIEEnableTrans.WriteDenaliReg( PCIE_REG_DEN_REPLAY_TIMER, denaliReplayTimer );
96 //Make the replay buffer smaller so back-back replays don't last too long
97 f_env.Pod.FNXPCIEEnableTrans.WriteDenaliReg( PCIE_REG_DEN_RETRY_SIZE, 32'h300 );
98
99
100 printf("IngressRcvrErr nmbrRcvrErrsToInject=%0d rcvrErrPct=%0d rcvrErr8b10bWeight=%0d rcvrErrFramingWeight=%0d rcvrErrDisparityWeight=%0d rcvrErrFlipBitWeight=%0d rcvrErrLcrcWeight=%0d rcvrErrDupSeqNmbrWeight=%0d rcvrErrOutOfSeqNmbrWeight=%0d rcvrErrBadSeqNmbrWeight=%0d InvertLCRCErrWeight=%0d EDBErrWeight=%0d InvertLCRCAndEDBErrWeight=%0d \n",nmbrRcvrErrsToInject,rcvrErrPct,rcvrErr8b10bWeight,rcvrErrFramingWeight,rcvrErrDisparityWeight,rcvrErrFlipBitWeight,rcvrErrLcrcWeight, rcvrErrDupSeqNmbrWeight, rcvrErrOutOfSeqNmbrWeight, rcvrErrBadSeqNmbrWeight, InvertLCRCErrWeight, EDBErrWeight, InvertLCRCAndEDBErrWeight );
101 //Set the number of packets to cause errors on
102 f_env.nmbrRcvrErrsToInject = nmbrRcvrErrsToInject;
103 f_env.nmbrRcvrErrsInjected = 0;
104 f_env.nmbrRcvrErrsDriven = 0;
105 f_env.rcvrErrPct = rcvrErrPct;
106 //Set the percentage of each type of receiver error
107 f_env.rcvrErr8b10bWeight = rcvrErr8b10bWeight;
108 f_env.rcvrErrFramingWeight = rcvrErrFramingWeight;
109 f_env.rcvrErrDisparityWeight = rcvrErrDisparityWeight;
110 f_env.rcvrErrFlipBitWeight = rcvrErrFlipBitWeight;
111 f_env.rcvrErrLcrcWeight = rcvrErrLcrcWeight;
112 f_env.rcvrErrDupSeqNmbrWeight = rcvrErrDupSeqNmbrWeight;
113 f_env.rcvrErrOutOfSeqNmbrWeight = rcvrErrOutOfSeqNmbrWeight;
114 f_env.rcvrErrBadSeqNmbrWeight = rcvrErrBadSeqNmbrWeight;
115 f_env.InvertLCRCErrWeight = InvertLCRCErrWeight;
116 f_env.EDBErrWeight = EDBErrWeight;
117 f_env.InvertLCRCAndEDBErrWeight = InvertLCRCAndEDBErrWeight;
118
119 //Clear all the specific error trackers
120 f_env.rcvrErr8b10bInjected = 0;
121 f_env.rcvrErrFramingInjected = 0;
122 f_env.rcvrErrDisparityInjected = 0;
123 f_env.rcvrErrFlipBitInjected = 0;
124 f_env.rcvrErrLcrcInjected = 0;
125 f_env.rcvrErrDupSeqNmbrInjected = 0;
126 f_env.rcvrErrOutOfSeqNmbrInjected = 0;
127 f_env.rcvrErrBadSeqNmbrInjected = 0;
128
129 f_env.invertLCRC32ErrInjected = 0;
130 f_env.EDBErrInjected = 0;
131 f_env.InvertLCRCAndEDBErrInjected = 0;
132
133 //Wait until env has injected the right number of errors
134 f_env.enableRcvrErrInjection = 1;
135
136 //If the last Tlp before a retry packet has a framing type error then the
137 // 1st retry packet could get a crc or other error causing the packet to be
138 // dropped. This will cause a Denali replay timeout
139 f_env.Pod.FNXPCIEEnableTrans.SuppressDenaliErr( PCIE_DL_COR_REPLAY_TIMEOUT );
140
141 //Framing error injection could insert a COM which causes peu to get a deskew error
142 // and go into recovery - so disable hang detect for framing errors
143 if( f_env.rcvrErrFramingWeight ){
144 fork
145 {
146 while( f_env.rcvrErrFramingWeight && !f_env.rcvrErrFramingInjected ){
147 repeat(10) @(posedge CLOCK);
148 }
149 //Check to see if recovery is ever entered
150 while( f_env.getLtssmState() === ILUPEU_LTSSM_L0 &&
151 f_env.enableRcvrErrInjection ){
152 repeat(50) @(posedge CLOCK);
153
154 if( f_env.getLtssmState() === ILUPEU_LTSSM_RCVRY_RCVRLOCK ){
155 recoveryEntered = 1;
156 f_env.activityStalled += 1;
157 //Stall the Denali expects until link comes back up
158 f_env.Pod.FNXPCIEEnableTrans.DisableExpectsTimeout();
159 printf("IngressRcvrErr rcvrErrFramingInjected and ltssm entered Recovery f_env.activityStalled=%0d \n",f_env.activityStalled );
160 f_env.toLtssmState( ILUPEU_LTSSM_L0 );
161 printf("IngressRcvrErr rcvrErrFramingInjected and ltssm entered L0 from Recovery\n");
162 f_env.activityStalled -= 1;
163 f_env.Pod.FNXPCIEEnableTrans.EnableExpectsTimeout();
164 }
165 }
166
167 }
168 join none
169 }
170
171 //Wait until all the errors are driven
172 sync( ANY, f_env.ev_rcvrErrsDriven );
173 //terminate the while loop if no framing errors got injected
174 if( f_env.rcvrErrFramingWeight && !f_env.rcvrErrFramingInjected ){
175 terminate;
176 }else if(f_env.rcvrErrFramingWeight && f_env.rcvrErrFramingInjected ){
177 //Last injected error may cause entry into Recovery so wait a while
178 repeat( 50 ) @(posedge if_ILU_PEU_PCIE.refclk);
179 if( f_env.getLtssmState() !== ILUPEU_LTSSM_L0 ){
180 printf("IngressRcvrErr waiting for LTSSM to reenter L0 from Recovery\n");
181 f_env.toLtssmState( ILUPEU_LTSSM_L0,*,OMNI );
182 }
183 }
184
185 printf("at time %d, IngressRcvrErr last error injected check error regs nmbrRcvrErrsToInject=%0d nmbrRcvrErrsInjected=%0d nmbrRcvrErrsDriven=%0d rcvrErr8b10bInjected=%0d rcvrErrFramingInjected=%0d rcvrErrDisparityInjected=%0d rcvrErrFlipBitInjected=%0d rcvrErrLcrcInjected=%0d rcvrErrDupSeqNmbrInjected=%0d rcvrErrOutOfSeqNmbrInjected=%0d rcvrErrBadSeqNmbrInjected=%0d invertLCRC32ErrInjected=%0d, EDBErrInjected=%0d InvertLCRCAndEDBErrInjected = %0d \n",get_time(LO), nmbrRcvrErrsToInject,f_env.nmbrRcvrErrsInjected,f_env.nmbrRcvrErrsDriven,f_env.rcvrErr8b10bInjected,f_env.rcvrErrFramingInjected,f_env.rcvrErrDisparityInjected,f_env.rcvrErrFlipBitInjected,f_env.rcvrErrLcrcInjected, f_env.rcvrErrDupSeqNmbrInjected, f_env.rcvrErrOutOfSeqNmbrInjected, f_env.rcvrErrBadSeqNmbrInjected, f_env.invertLCRC32ErrInjected, f_env.EDBErrInjected, f_env.InvertLCRCAndEDBErrInjected );
186
187 f_env.enableRcvrErrInjection = 0;
188
189 //Delay long enough for a Denali replay timeout in case the NAKd transaction had
190 // a framing type error causing the 1st replayd packet to be bad also
191 repeat( denaliReplayTimer+25 ) @(posedge if_ILU_PEU_PCIE.refclk);
192 //Re enable the hang detect
193// if( f_env.rcvrErrFramingWeight && f_env.rcvrErrFramingInjected ){
194// f_env.activityStalled -= 1;
195// }
196
197 //Track possible errors
198
199 if ((f_env.nmbrRcvrErrsDriven - f_env.InvertLCRCAndEDBErrInjected ) > 0)
200 { other_nonInvertLCRCAndEDBErrInjected = 1; }
201
202 printf("AC: at time %d, other_nonInvertLCRCAndEDBErrInjected = %d", get_time(LO), other_nonInvertLCRCAndEDBErrInjected);
203
204 if (other_nonInvertLCRCAndEDBErrInjected) {
205 nmbrErrs = 2;
206 }
207 else {
208 nmbrErrs = 0;
209 }
210
211 if (f_env.InvertLCRCAndEDBErrInjected == 1) {
212 nmbrErrs += 1;
213 }
214 else if (f_env.InvertLCRCAndEDBErrInjected > 1) {
215 nmbrErrs += 2;
216 }
217
218
219 //ErrLcrc & Err8b10b can possibly cause framing errors
220
221 //Framing Errors will NOT cause a e_ERR_ce_re - Receiver Error
222 // 6/20/05
223 //CRC Errors/framing errors
224 if( f_env.rcvrErrFlipBitInjected || f_env.rcvrErrFramingInjected ||
225 f_env.rcvrErrDisparityInjected || f_env.rcvrErr8b10bInjected ){
226 nmbrErrs += 7;
227 }
228
229 if( f_env.rcvrErrDisparityInjected || f_env.rcvrErr8b10bInjected ){ //Receiver Error
230 nmbrErrs += 2;
231 }
232
233 if( f_env.rcvrErrFramingInjected ){ // More framing errors
234 nmbrErrs += 7;
235 if( recoveryEntered ){
236 nmbrErrs += 2;
237 }
238 }
239 printf("AC: nmbrErrs = %d\n", nmbrErrs);
240
241 // Tell the error-checker about this
242 // bad-boy.
243 if( f_errQueue != 0 ){
244
245 mailbox_put( f_errQueue, e_ERR_none );
246 mailbox_put( f_errQueue, nmbrErrs );
247 //Bad TLPs caused by either CRC errors or sequence errors when a good TLP
248 // follows a bad TLP - for some of the more directed cases make it optional
249// if (f_env.rcvrErrDupSeqNmbrInjected) { // no error for duplicate seq number
250//aC: }
251// else {
252
253 if( f_env.rcvrErrLcrcInjected ||
254 f_env.rcvrErrDupSeqNmbrInjected || f_env.rcvrErrOutOfSeqNmbrInjected ||
255 f_env.rcvrErrBadSeqNmbrInjected || f_env.EDBErrInjected ){
256
257 optional_CE_BTP = 0;
258 }
259
260 if (other_nonInvertLCRCAndEDBErrInjected) {
261
262 if (nmbrErrs > 0 ) {
263 mailbox_put( f_errQueue, e_ERR_ce_btp );
264 if( optional_CE_BTP ){
265 mailbox_put( f_errQueue, 128'bx0 );
266 }else{
267 mailbox_put( f_errQueue, 128'bx );
268 }
269 mailbox_put( f_errQueue, e_ERR_ce_btp );
270 mailbox_put( f_errQueue, 128'bx0 );
271 }
272 }
273
274 if ( f_env.InvertLCRCAndEDBErrInjected == 1) {
275 mailbox_put( f_errQueue, e_ERR_ce_btp );
276 mailbox_put( f_errQueue, 128'bx0 );
277 }
278 else if (f_env.InvertLCRCAndEDBErrInjected > 1) {
279 mailbox_put( f_errQueue, e_ERR_ce_btp );
280 mailbox_put( f_errQueue, 128'bx0 );
281 }
282
283 if( f_env.rcvrErrDisparityInjected || f_env.rcvrErr8b10bInjected ){
284 mailbox_put( f_errQueue, e_ERR_ce_re );
285 mailbox_put( f_errQueue, 128'bx );
286 mailbox_put( f_errQueue, e_ERR_ce_re );
287 mailbox_put( f_errQueue, 128'bx0 ); //A secondary error may also be logged
288 }
289
290 if( f_env.rcvrErrFramingInjected || f_env.rcvrErrFlipBitInjected ||
291 f_env.rcvrErrDisparityInjected || f_env.rcvrErr8b10bInjected ){
292 mailbox_put( f_errQueue, e_ERR_oe_lin );
293 mailbox_put( f_errQueue, 128'bx0 ); //Might fail
294/*
295 if( f_env.rcvrErrFramingInjected > 2 ){ //If only 2 errors END->Data STP->data there will be no dlpl errors
296 mailbox_put( f_errQueue, 128'bx );
297 }else{
298 mailbox_put( f_errQueue, 128'bx0 ); //Might fail
299 }
300*/
301 mailbox_put( f_errQueue, e_ERR_dlpl_stp_no_end_edb );
302 mailbox_put( f_errQueue, 128'bx0 ); //Optional error may not occur
303 mailbox_put( f_errQueue, e_ERR_dlpl_kchar_dllp );
304 mailbox_put( f_errQueue, 128'bx0 );
305 mailbox_put( f_errQueue, e_ERR_dlpl_multi_stp );
306 mailbox_put( f_errQueue, 128'bx0 );
307 mailbox_put( f_errQueue, e_ERR_dlpl_end_no_stp_sdp );
308 mailbox_put( f_errQueue, 128'bx0 );
309 mailbox_put( f_errQueue, e_ERR_dlpl_ill_end_pos );
310 mailbox_put( f_errQueue, 128'bx0 );
311 mailbox_put( f_errQueue, e_ERR_dlpl_sdp_no_end );
312 mailbox_put( f_errQueue, 128'bx0 );
313 }
314
315 if( f_env.rcvrErrFramingInjected ){
316 mailbox_put( f_errQueue, e_ERR_dlpl_ill_stp_pos );
317 mailbox_put( f_errQueue, 128'bx0 );
318 mailbox_put( f_errQueue, e_ERR_dlpl_ill_sdp_pos );
319 mailbox_put( f_errQueue, 128'bx0 );
320 mailbox_put( f_errQueue, e_ERR_dlpl_ill_pad_pos );
321 mailbox_put( f_errQueue, 128'bx0 );
322 mailbox_put( f_errQueue, e_ERR_dlpl_unsup_dllp );
323 mailbox_put( f_errQueue, 128'bx0 );
324 mailbox_put( f_errQueue, e_ERR_dlpl_multi_sdp );
325 mailbox_put( f_errQueue, 128'bx0 );
326 mailbox_put( f_errQueue, e_ERR_ce_bdp );
327 mailbox_put( f_errQueue, 128'bx0 );
328 mailbox_put( f_errQueue, e_ERR_ce_rto ); //If END changed to data before ACK
329 mailbox_put( f_errQueue, 128'bx0 );
330 if( recoveryEntered ){
331 mailbox_put( f_errQueue, e_ERR_oe_nfp );
332 mailbox_put( f_errQueue, 128'bx0 );
333 mailbox_put( f_errQueue, e_ERR_dlpl_align );
334 mailbox_put( f_errQueue, 128'bx0 );
335 }
336 }
337 }
338
339 //Unsuppress the Denali error TX checks that were Suppressed in the PEUTestEnv
340 // This was moved out of TestEnv because packets following the one with the injected
341 // could also get framing type errors in Denali
342
343
344 if( f_env.rcvrErr8b10bInjected ){
345 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_8B10B );
346 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_END );
347 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_DATA0 );
348 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_RSV_KC );
349 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_TLP_END );
350 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_SDP1 );
351 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_DLLP_END );
352 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_PAD );
353 }
354 if( f_env.rcvrErrFramingInjected ){
355 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_END );
356 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_DATA0 );
357 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_RSV_KC );
358 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_TLP_END );
359 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_SDP1 );
360 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_DLLP_END );
361 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_PAD );
362 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_MOS_FTS_NC );
363 }
364 if( f_env.rcvrErrDisparityInjected ){
365 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_END );
366 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_DATA0 );
367 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_TLP_END );
368 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_DISP );
369 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_PAD );
370 }
371 if( f_env.rcvrErrFlipBitInjected ){
372 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_8B10B );
373 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_END );
374 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_DATA0 );
375 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_RSV_KC );
376 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_TLP_END );
377 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_BAD_SDP1 );
378 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_DLLP_END );
379 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_FRAME_PAD );
380 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_PL_NONFATAL_SYM_DISP );
381 }
382 if( f_env.rcvrErrLcrcInjected ){
383 }
384 if( f_env.rcvrErrDupSeqNmbrInjected ){
385 }
386 if( f_env.rcvrErrOutOfSeqNmbrInjected ){
387 }
388 if( f_env.rcvrErrBadSeqNmbrInjected ){
389 }
390 if( f_env.invertLCRC32ErrInjected ){
391 }
392 if( f_env.EDBErrInjected ){
393 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr(PCIE_PL_NONFATAL_FRAME_NULL_TLP );
394 }
395
396 //
397 f_env.Pod.FNXPCIEEnableTrans.unSuppressDenaliErr( PCIE_DL_COR_REPLAY_TIMEOUT );
398
399 repeat( 10 ) @(posedge CLOCK);
400 semaphore_put( rcvrErr_semaphore, 1 );
401 } /* end Execute */
402 } /* end IngressRcvrErr */
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