Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / ilu_peu / vera / N2str / ilupeuPioMWrStr.vr
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ilupeuPioMWrStr.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
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13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
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20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
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34// ========== Copyright Header End ============================================
35class PioMWrPEUStr extends PioBasePEUStr {
36
37
38 // ******************************************************************
39 // The Test Environment objects need to execute the strategy.
40 // ******************************************************************
41 protected PEUTestEnv _env;
42
43
44 // ******************************************************************
45 // TLP Fields - These fields will be randomized using the parameters
46 // in the following section, and obeying the constraints defined
47 // within this class.
48 // ******************************************************************
49 protected bit [1:0] _format;
50 protected bit [4:0] _type;
51
52 protected bit [2:0] _tc;
53
54 protected bit _td;
55 protected bit _ep;
56
57 protected bit [1:0] _attr;
58 protected rand bit [9:0] _len;
59 protected bit [15:0] _req_id;
60 protected bit [7:0] _tag;
61 protected rand bit [31:0] _addr_lsb;
62 protected rand bit [31:0] _addr_msb;
63
64 protected rand bit [3:0] _last_dwbe;
65 protected rand bit [3:0] _first_dwbe;
66
67 protected bit [63:0] _data;
68 protected bit [7:0] dataAddr;
69 protected bit [PEC_PCI__HDR] pktHdr;
70
71
72 // ******************************************************************
73 // The following constraint is used to generate the correct values
74 // for the TLP.
75 // ******************************************************************
76 constraint generate_tlp {
77
78 this._len in {this._len_min : this._len_max};
79
80 this._addr_msb in {this._addr_msb_min : this._addr_msb_max};
81
82 this._addr_lsb in {this._addr_lsb_min : this._addr_lsb_max};
83 ({8'b_000_0000, this._addr_lsb[5:2]} + {2'b_0, this._len}) <= 12'h_010;
84
85 this._first_dwbe in {this._first_dwbe_min : this._first_dwbe_max};
86 this._last_dwbe in {this._last_dwbe_min : this._last_dwbe_max };
87
88 if (this._len > 10'h_001) {
89 this._first_dwbe != 4'b_0000;
90 this._last_dwbe != 4'b_0000;
91 }
92 else { // _len == 1
93 if ((_first_dwbe_min !=_first_dwbe_max) && (_last_dwbe_min != _last_dwbe_max)) {
94 this._first_dwbe != 4'b_0000;
95 this._last_dwbe == 4'b_0000;
96 }
97 }
98
99 // N2 can have any value byte mask, via the VIS partial store instruction -somePerson
100 // also, if len==1, either first_dwbe or last_dwbe must be 0 and the other non-0
101
102 //if (((this._len == 10'h_002) && (this._addr_lsb[2] != 1'b_0)) ||
103 // (this._len >= 10'h_003))
104 // this._first_dwbe in { 4'b_1111, 4'b_1110, 4'b_1100, 4'b_1000 };
105
106 //if (this._len == 10'h_001)
107 // this._last_dwbe == 4'b_0000;
108
109 //if (((this._len == 10'h_002) && (this._addr_lsb[2] != 1'b_0)) ||
110 // (this._len >= 10'h_003))
111 // this._last_dwbe in { 4'b_1111, 4'b_0111, 4'b_0011, 4'b_0001 };
112 }
113
114
115 // ******************************************************************
116 // Constructor
117 // ******************************************************************
118 public task new(PEUTestEnv a_env);
119
120
121 // ******************************************************************
122 // set the packet Parameters
123 // ******************************************************************
124 public task SetPacketParams();
125
126
127 // ******************************************************************
128 // Execute the strategy. Drive a TLP into the ILU, and expect it out
129 // of the PEU.
130 // ******************************************************************
131 public task Execute();
132}
133
134
135
136//-------------------------------------------------------------------
137// Method Name:
138// Description:
139//-------------------------------------------------------------------
140task PioMWrPEUStr::new(PEUTestEnv a_env) {
141
142
143 super.new(a_env);
144 this._env = a_env;
145}
146
147
148
149//-------------------------------------------------------------------
150// Method Name:
151// Description:
152//-------------------------------------------------------------------
153task PioMWrPEUStr::SetPacketParams() {
154 integer pass_constrain = 0;
155 this._env.allocWrTag(this._tag, dataAddr);
156
157
158 this._type = PEC_PCI__TYPE_MEM;
159 this._tc = 3'b_000;
160 this._td = 1'b_0;
161 this._ep = 1'b_0;
162 this._attr = 2'b_00;
163
164
165 this._req_id = urandom_range(this._req_id_max, this._req_id_min);
166 this._data[63:32] = urandom_range(this._data_max[63:32], this._data_min[63:32]);
167 this._data[31: 0] = urandom_range(this._data_max[31: 0], this._data_min[31: 0]);
168
169
170 randcase {
171 this._format_req_prob_3dw : this._format = PEC_PCI__FMT_DATA_3DW;
172 this._format_req_prob_4dw : this._format = PEC_PCI__FMT_DATA_4DW;
173 }
174
175
176//N2 only suports 8 byte PIO write, 16 byte PIO read.
177//So if _len_max happens to get set too high adjust it
178//# of payload bytes = _len*4
179 if( this._len_max >= 10'h_002 ){
180 this._len_max = 10'h_002;
181 }
182 if( this._len_min > this._len_max ){
183 this._len_min = this._len_max;
184 }
185
186// 8/20 Fu: bypass randomize for it create problem for gate sim
187#ifdef N2_FC
188 while (!pass_constrain)
189 {
190 this._len = urandom_range(this._len_max, this._len_min);
191 this._addr_msb = urandom_range(this._addr_msb_max, this._addr_msb_min);
192 this._addr_lsb = urandom_range(this._addr_lsb_max, this._addr_lsb_min);
193
194 pass_constrain = ((this._addr_lsb[5:2] + this._len) <= 16) ? 1 : 0;
195 printf ("GATE DEBUG RANDOMIZE: addr_msb = %x, addr_lsb = %x, len = %x\n", _addr_msb, _addr_lsb, _len);
196 }
197
198 pass_constrain = 0;
199 while (!pass_constrain)
200 {
201 this._first_dwbe = urandom_range(this._first_dwbe_max, this._first_dwbe_min);
202 this._last_dwbe = urandom_range(this._last_dwbe_max, this._last_dwbe_min);
203
204 pass_constrain = 1;
205 if (this._len > 10'h_001) {
206 if (this._first_dwbe == 4'b_0000) pass_constrain = 0;
207 if (this._last_dwbe == 4'b_0000) pass_constrain = 0;
208 }
209 else { // _len == 1
210 if ((_first_dwbe_min !=_first_dwbe_max) && (_last_dwbe_min != _last_dwbe_max))
211 {
212 if (this._first_dwbe == 4'b_0000) pass_constrain = 0;
213 if (this._last_dwbe != 4'b_0000) pass_constrain = 0;
214 }
215 }
216 printf ("GATE DEBUG RANDOMIZE: first_dwbe = %x, last_dwbe = %x\n", _first_dwbe, _last_dwbe);
217 }
218//
219#else
220
221 if( this.randomize() != OK ) {
222 _env.Report.report(RTYP_TEST_ERROR,"PioMWrPEUStr::SetPacketParams - randomize failure \n" );
223 }
224#endif
225
226 pktHdr [PEC_PCI__HDR] = {128{1'b_0}};
227 pktHdr [PEC_PCI__FMT] = this._format;
228 pktHdr [PEC_PCI__TYPE] = this._type;
229 pktHdr [PEC_PCI__TC] = this._tc;
230 pktHdr [PEC_PCI__TD] = this._td;
231 pktHdr [PEC_PCI__EP] = this._ep;
232 pktHdr [PEC_PCI__ATTR] = this._attr;
233 pktHdr [PEC_PCI__LEN] = this._len;
234 pktHdr [PEC_PCI__REQ_ID] = this._req_id;
235 pktHdr [PEC_PCI__TLP_TAG] = this._tag;
236 pktHdr [PEC_PCI__LAST_DWBE] = this._last_dwbe;
237 pktHdr [PEC_PCI__FIRST_DWBE] = this._first_dwbe;
238
239//N2 email clarifying address alignment for PIOs
240//4.PIO write case (STORE_REQ)
241//There has been a change from NCU recently in order to support paritial
242//store. NCU spec needs to be updated for this. Core sends an 8-bit byte
243//mask (position mask) to NCU. NCU sends this 8-bit byte mask to DMU
244//unmodified. Also NCU will turn off the lower 3 bits of the PA before
245//forwarding the address to DMU. In other words the lower 3 bits of the PA
246//are beign ignored and force to 0 for PIO write case.
247//
248
249 //8 byte writes need to be aligned
250 this._addr_lsb[2] = this._len == 10'h002? 1'b0 : this._addr_lsb[2] ;
251 if (this._format[0] === 1'b1)
252 //pktHdr [PEC_PCI__ADDR] = { this._addr_msb, this._addr_lsb[31:3], 3'b_000 };
253 pktHdr [PEC_PCI__ADDR] = { this._addr_msb, this._addr_lsb[31:2], 2'b_00 };
254 else
255 //pktHdr [PEC_PCI__ADDR32] = { this._addr_lsb[31:3], 3'b_000 };
256 pktHdr [PEC_PCI__ADDR32] = { this._addr_lsb[31:2], 2'b_00 };
257}
258
259task PioMWrPEUStr::Execute() {
260
261 SetPacketParams();
262
263 this._env.driveILU(pktHdr, dataAddr, this._data);
264
265 this._env.expectPCIE(pktHdr, this._data);
266}