projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: dmu.vri | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | #ifndef INC_LPUSD_DEFINES_VRI | |
| 36 | #define INC_LPUSD_DEFINES_VRI | |
| 37 | ||
| 38 | //############################# | |
| 39 | // INGRESS COMMAND RECORD (ICR) | |
| 40 | // From PRM to CTM | |
| 41 | //############################# | |
| 42 | ||
| 43 | #define FIRE_DLC_ICR_SBDTAG_LSB 0 // 0 start of SBDTAG field | |
| 44 | #define FIRE_DLC_ICR_SBDTAG_WDTH 5 | |
| 45 | #define FIRE_DLC_ICR_SBDTAG_MSB `FIRE_DLC_ICR_SBDTAG_LSB + `FIRE_DLC_ICR_SBDTAG_WDTH -1 | |
| 46 | // ~~~~~ sbdtag field access ~~~~~ | |
| 47 | #define FIRE_DLC_ICR_SBDTAG `FIRE_DLC_ICR_SBDTAG_MSB:`FIRE_DLC_ICR_SBDTAG_LSB | |
| 48 | ||
| 49 | #define FIRE_DLC_ICR_DPTR_LSB `FIRE_DLC_ICR_SBDTAG_LSB + `FIRE_DLC_ICR_SBDTAG_WDTH // 6 start of DPTR field | |
| 50 | #define FIRE_DLC_ICR_DPTR_WDTH 7 | |
| 51 | #define FIRE_DLC_ICR_DPTR_MSB `FIRE_DLC_ICR_DPTR_LSB + `FIRE_DLC_ICR_DPTR_WDTH -1 | |
| 52 | // ~~~~~ dptr field access ~~~~~ | |
| 53 | #define FIRE_DLC_ICR_DPTR `FIRE_DLC_ICR_DPTR_MSB:`FIRE_DLC_ICR_DPTR_LSB | |
| 54 | ||
| 55 | #define FIRE_DLC_ICR_STAT_LSB `FIRE_DLC_ICR_DPTR_LSB + `FIRE_DLC_ICR_DPTR_WDTH //11 start of STAT field | |
| 56 | #define FIRE_DLC_ICR_STAT_WDTH 3 | |
| 57 | #define FIRE_DLC_ICR_STAT_MSB `FIRE_DLC_ICR_STAT_LSB + `FIRE_DLC_ICR_STAT_WDTH -1 | |
| 58 | // ~~~~~ stat field access ~~~~~ | |
| 59 | #define FIRE_DLC_ICR_STAT `FIRE_DLC_ICR_STAT_MSB:`FIRE_DLC_ICR_STAT_LSB | |
| 60 | ||
| 61 | #define FIRE_DLC_ICR_ADDR_LSB `FIRE_DLC_ICR_STAT_LSB + `FIRE_DLC_ICR_STAT_WDTH //14 start of ADDR field | |
| 62 | //BP n2 5-24-04 | |
| 63 | //#define FIRE_DLC_ICR_ADDR_WDTH 37 | |
| 64 | #define FIRE_DLC_ICR_ADDR_WDTH 38 | |
| 65 | #define FIRE_DLC_ICR_ADDR_MSB `FIRE_DLC_ICR_ADDR_LSB + `FIRE_DLC_ICR_ADDR_WDTH -1 | |
| 66 | // ~~~~~ addr field access ~~~~~ | |
| 67 | #define FIRE_DLC_ICR_ADDR `FIRE_DLC_ICR_ADDR_MSB:`FIRE_DLC_ICR_ADDR_LSB | |
| 68 | ||
| 69 | #define FIRE_DLC_ICR_CLSTS_LSB `FIRE_DLC_ICR_ADDR_LSB + `FIRE_DLC_ICR_ADDR_WDTH //51 start of cl_sts feld | |
| 70 | #define FIRE_DLC_ICR_CLSTS_WDTH 1 | |
| 71 | #define FIRE_DLC_ICR_CLSTS_MSB `FIRE_DLC_ICR_CLSTS_LSB + `FIRE_DLC_ICR_CLSTS_WDTH -1 | |
| 72 | // ~~~~~ clsts field access ~~~~~ | |
| 73 | #define FIRE_DLC_ICR_CLSTS `FIRE_DLC_ICR_CLSTS_MSB:`FIRE_DLC_ICR_CLSTS_LSB | |
| 74 | ||
| 75 | #define FIRE_DLC_ICR_TYP_LSB `FIRE_DLC_ICR_CLSTS_LSB + `FIRE_DLC_ICR_CLSTS_WDTH //52 start of TYPE field | |
| 76 | #define FIRE_DLC_ICR_TYP_WDTH 7 | |
| 77 | #define FIRE_DLC_ICR_TYP_MSB `FIRE_DLC_ICR_TYP_LSB + `FIRE_DLC_ICR_TYP_WDTH -1 | |
| 78 | // ~~~~~ typ field access ~~~~~ | |
| 79 | #define FIRE_DLC_ICR_TYP `FIRE_DLC_ICR_TYP_MSB:`FIRE_DLC_ICR_TYP_LSB | |
| 80 | ||
| 81 | #define FIRE_DLC_ICR_REC_WDTH `FIRE_DLC_ICR_TYP_LSB + `FIRE_DLC_ICR_TYP_WDTH //59 Command Record Width | |
| 82 | ||
| 83 | #define FIRE_DLC_ICR_MSB `FIRE_DLC_ICR_REC_WDTH -1 // Command Record MSB | |
| 84 | ||
| 85 | //############################# | |
| 86 | // INGRESS PACKET RECORD (IPR) | |
| 87 | // From RCM to PRM | |
| 88 | //############################# | |
| 89 | ||
| 90 | #define FIRE_DLC_IPR_SBDTAG_LSB 0 // 0 start of SBD Tag field | |
| 91 | #define FIRE_DLC_IPR_SBDTAG_WDTH 5 | |
| 92 | #define FIRE_DLC_IPR_SBDTAG_MSB `FIRE_DLC_IPR_SBDTAG_LSB + `FIRE_DLC_IPR_SBDTAG_WDTH -1 | |
| 93 | ||
| 94 | #define FIRE_DLC_IPR_DPTR_LSB `FIRE_DLC_IPR_SBDTAG_LSB + `FIRE_DLC_IPR_SBDTAG_WDTH // 5 start of DPTR field | |
| 95 | #define FIRE_DLC_IPR_DPTR_WDTH 7 | |
| 96 | #define FIRE_DLC_IPR_DPTR_MSB `FIRE_DLC_IPR_DPTR_LSB + `FIRE_DLC_IPR_DPTR_WDTH -1 | |
| 97 | ||
| 98 | #define FIRE_DLC_IPR_ADDRERR_LSB `FIRE_DLC_IPR_DPTR_LSB + `FIRE_DLC_IPR_DPTR_WDTH //12 start of ADDRERR field | |
| 99 | #define FIRE_DLC_IPR_ADDRERR_WDTH 1 | |
| 100 | #define FIRE_DLC_IPR_ADDRERR_MSB `FIRE_DLC_IPR_ADDRERR_LSB + `FIRE_DLC_IPR_ADDRERR_WDTH -1 | |
| 101 | ||
| 102 | #define FIRE_DLC_IPR_ADDR_LSB `FIRE_DLC_IPR_ADDRERR_LSB + `FIRE_DLC_IPR_ADDRERR_WDTH //13 start of ADDR field | |
| 103 | #define FIRE_DLC_IPR_ADDR_WDTH 41 | |
| 104 | #define FIRE_DLC_IPR_ADDR_MSB `FIRE_DLC_IPR_ADDR_LSB + `FIRE_DLC_IPR_ADDR_WDTH -1 | |
| 105 | ||
| 106 | #define FIRE_DLC_IPR_PKSEQNUM_LSB `FIRE_DLC_IPR_ADDR_LSB + `FIRE_DLC_IPR_ADDR_WDTH //54 start of PKSEQ# field | |
| 107 | #define FIRE_DLC_IPR_PKSEQNUM_WDTH 5 | |
| 108 | #define FIRE_DLC_IPR_PKSEQNUM_MSB `FIRE_DLC_IPR_PKSEQNUM_LSB + `FIRE_DLC_IPR_PKSEQNUM_WDTH -1 | |
| 109 | ||
| 110 | #define FIRE_DLC_IPR_CNTXTNUM_LSB `FIRE_DLC_IPR_PKSEQNUM_LSB + `FIRE_DLC_IPR_PKSEQNUM_WDTH //59 start of CNTX# field | |
| 111 | #define FIRE_DLC_IPR_CNTXTNUM_WDTH 5 | |
| 112 | #define FIRE_DLC_IPR_CNTXTNUM_MSB `FIRE_DLC_IPR_CNTXTNUM_LSB + `FIRE_DLC_IPR_CNTXTNUM_WDTH -1 | |
| 113 | ||
| 114 | #define FIRE_DLC_IPR_BYTCNT_LSB `FIRE_DLC_IPR_CNTXTNUM_LSB + `FIRE_DLC_IPR_CNTXTNUM_WDTH //64 start of BYTE CNT field | |
| 115 | #define FIRE_DLC_IPR_BYTCNT_WDTH 12 | |
| 116 | #define FIRE_DLC_IPR_BYTCNT_MSB `FIRE_DLC_IPR_BYTCNT_LSB + `FIRE_DLC_IPR_BYTCNT_WDTH -1 | |
| 117 | ||
| 118 | #define FIRE_DLC_IPR_LEN_LSB `FIRE_DLC_IPR_BYTCNT_LSB + `FIRE_DLC_IPR_BYTCNT_WDTH //76 start of LENGTH field | |
| 119 | #define FIRE_DLC_IPR_LEN_WDTH 10 | |
| 120 | #define FIRE_DLC_IPR_LEN_MSB `FIRE_DLC_IPR_LEN_LSB + `FIRE_DLC_IPR_LEN_WDTH -1 | |
| 121 | ||
| 122 | #define FIRE_DLC_IPR_TYP_LSB `FIRE_DLC_IPR_LEN_LSB + `FIRE_DLC_IPR_LEN_WDTH //86 start of TYPE field | |
| 123 | #define FIRE_DLC_IPR_TYP_WDTH 7 | |
| 124 | #define FIRE_DLC_IPR_TYP_MSB `FIRE_DLC_IPR_TYP_LSB + `FIRE_DLC_IPR_TYP_WDTH -1 | |
| 125 | ||
| 126 | #define FIRE_DLC_IPR_REC_WDTH `FIRE_DLC_IPR_TYP_LSB + `FIRE_DLC_IPR_TYP_WDTH //93 Packet Record Width | |
| 127 | ||
| 128 | #define FIRE_DLC_IPR_MSB `FIRE_DLC_IPR_REC_WDTH -1 // Packet Record MSB | |
| 129 | ||
| 130 | //############################# | |
| 131 | // INGRESS SCHEDULE RECORD (ISR) | |
| 132 | // From MMU to RCM | |
| 133 | //############################# | |
| 134 | ||
| 135 | #define FIRE_DLC_ISR_SBDTAG_LSB 0 // 0 start of SBD Tag field | |
| 136 | #define FIRE_DLC_ISR_SBDTAG_WDTH 5 | |
| 137 | #define FIRE_DLC_ISR_SBDTAG_MSB `FIRE_DLC_ISR_SBDTAG_LSB + `FIRE_DLC_ISR_SBDTAG_WDTH -1 | |
| 138 | #define FIRE_DLC_ISR_SBDTAG_BITS `FIRE_DLC_ISR_SBDTAG_MSB : `FIRE_DLC_ISR_SBDTAG_LSB | |
| 139 | ||
| 140 | #define FIRE_DLC_ISR_DPTR_LSB `FIRE_DLC_ISR_SBDTAG_LSB + `FIRE_DLC_ISR_SBDTAG_WDTH // 5 start of DPTR field | |
| 141 | #define FIRE_DLC_ISR_DPTR_WDTH 7 | |
| 142 | #define FIRE_DLC_ISR_DPTR_MSB `FIRE_DLC_ISR_DPTR_LSB + `FIRE_DLC_ISR_DPTR_WDTH -1 | |
| 143 | #define FIRE_DLC_ISR_DPTR_BITS `FIRE_DLC_ISR_DPTR_MSB : `FIRE_DLC_ISR_DPTR_LSB | |
| 144 | ||
| 145 | #define FIRE_DLC_ISR_ADDRERR_LSB `FIRE_DLC_ISR_DPTR_LSB + `FIRE_DLC_ISR_DPTR_WDTH //12 start of ADDRERR field | |
| 146 | #define FIRE_DLC_ISR_ADDRERR_WDTH 1 | |
| 147 | #define FIRE_DLC_ISR_ADDRERR_MSB `FIRE_DLC_ISR_ADDRERR_LSB + `FIRE_DLC_ISR_ADDRERR_WDTH -1 | |
| 148 | #define FIRE_DLC_ISR_ADDRERR_BITS `FIRE_DLC_ISR_ADDRERR_MSB : `FIRE_DLC_ISR_ADDRERR_LSB | |
| 149 | ||
| 150 | #define FIRE_DLC_ISR_ADDR_LSB `FIRE_DLC_ISR_ADDRERR_LSB + `FIRE_DLC_ISR_ADDRERR_WDTH //13 start of ADDR field | |
| 151 | #define FIRE_DLC_ISR_ADDR_WDTH 41 | |
| 152 | #define FIRE_DLC_ISR_ADDR_MSB `FIRE_DLC_ISR_ADDR_LSB + `FIRE_DLC_ISR_ADDR_WDTH -1 | |
| 153 | #define FIRE_DLC_ISR_ADDR_BITS `FIRE_DLC_ISR_ADDR_MSB : `FIRE_DLC_ISR_ADDR_LSB | |
| 154 | ||
| 155 | #define FIRE_DLC_ISR_DWBE_LSB `FIRE_DLC_ISR_ADDR_LSB + `FIRE_DLC_ISR_ADDR_WDTH //54 start of BYTE CNT field | |
| 156 | #define FIRE_DLC_ISR_DWBE_WDTH 8 | |
| 157 | #define FIRE_DLC_ISR_DWBE_MSB `FIRE_DLC_ISR_DWBE_LSB + `FIRE_DLC_ISR_DWBE_WDTH -1 | |
| 158 | #define FIRE_DLC_ISR_DWBE_BITS `FIRE_DLC_ISR_DWBE_MSB : `FIRE_DLC_ISR_DWBE_LSB | |
| 159 | ||
| 160 | #define FIRE_DLC_ISR_LEN_LSB `FIRE_DLC_ISR_DWBE_LSB + `FIRE_DLC_ISR_DWBE_WDTH //62 start of LENGTH field | |
| 161 | #define FIRE_DLC_ISR_LEN_WDTH 10 | |
| 162 | #define FIRE_DLC_ISR_LEN_MSB `FIRE_DLC_ISR_LEN_LSB + `FIRE_DLC_ISR_LEN_WDTH -1 | |
| 163 | #define FIRE_DLC_ISR_LEN_BITS `FIRE_DLC_ISR_LEN_MSB : `FIRE_DLC_ISR_LEN_LSB | |
| 164 | ||
| 165 | #define FIRE_DLC_ISR_TYP_LSB `FIRE_DLC_ISR_LEN_LSB + `FIRE_DLC_ISR_LEN_WDTH //72 start of TYPE field | |
| 166 | #define FIRE_DLC_ISR_TYP_WDTH 7 | |
| 167 | #define FIRE_DLC_ISR_TYP_MSB `FIRE_DLC_ISR_TYP_LSB + `FIRE_DLC_ISR_TYP_WDTH -1 | |
| 168 | #define FIRE_DLC_ISR_TYP_BITS `FIRE_DLC_ISR_TYP_MSB : `FIRE_DLC_ISR_TYP_LSB | |
| 169 | ||
| 170 | #define FIRE_DLC_ISR_REC_WDTH `FIRE_DLC_ISR_TYP_LSB + `FIRE_DLC_ISR_TYP_WDTH //79 Schedule Record Width | |
| 171 | ||
| 172 | #define FIRE_DLC_ISR_LSB `FIRE_DLC_ISR_SBDTAG_LSB | |
| 173 | #define FIRE_DLC_ISR_MSB `FIRE_DLC_ISR_REC_WDTH -1 // Schedule Record MSB | |
| 174 | #define FIRE_DLC_ISR_BITS `FIRE_DLC_ISR_MSB : `FIRE_DLC_ISR_LSB | |
| 175 | ||
| 176 | //############################# | |
| 177 | // INGRESS SCHEDULE RECORD (SRM) | |
| 178 | // From RMU to MMU | |
| 179 | //############################# | |
| 180 | ||
| 181 | #define FIRE_DLC_SRM_SBDTAG_LSB 0 | |
| 182 | #define FIRE_DLC_SRM_SBDTAG_WDTH 5 | |
| 183 | #define FIRE_DLC_SRM_SBDTAG_MSB `FIRE_DLC_SRM_SBDTAG_LSB + `FIRE_DLC_SRM_SBDTAG_WDTH - 1 | |
| 184 | #define FIRE_DLC_SRM_SBDTAG_BITS `FIRE_DLC_SRM_SBDTAG_MSB : `FIRE_DLC_SRM_SBDTAG_LSB | |
| 185 | ||
| 186 | #define FIRE_DLC_SRM_DPTR_LSB `FIRE_DLC_SRM_SBDTAG_LSB + `FIRE_DLC_SRM_SBDTAG_WDTH | |
| 187 | #define FIRE_DLC_SRM_DPTR_WDTH 7 | |
| 188 | #define FIRE_DLC_SRM_DPTR_MSB `FIRE_DLC_SRM_DPTR_LSB + `FIRE_DLC_SRM_DPTR_WDTH - 1 | |
| 189 | #define FIRE_DLC_SRM_DPTR_BITS `FIRE_DLC_SRM_DPTR_MSB : `FIRE_DLC_SRM_DPTR_LSB | |
| 190 | ||
| 191 | #define FIRE_DLC_SRM_ADDR_LSB `FIRE_DLC_SRM_DPTR_LSB + `FIRE_DLC_SRM_DPTR_WDTH | |
| 192 | #define FIRE_DLC_SRM_ADDR_WDTH 62 | |
| 193 | #define FIRE_DLC_SRM_ADDR_MSB `FIRE_DLC_SRM_ADDR_LSB + `FIRE_DLC_SRM_ADDR_WDTH - 1 | |
| 194 | #define FIRE_DLC_SRM_ADDR_BITS `FIRE_DLC_SRM_ADDR_MSB : `FIRE_DLC_SRM_ADDR_LSB | |
| 195 | ||
| 196 | #define FIRE_DLC_SRM_DWBE_LSB `FIRE_DLC_SRM_ADDR_LSB + `FIRE_DLC_SRM_ADDR_WDTH | |
| 197 | #define FIRE_DLC_SRM_DWBE_WDTH 8 | |
| 198 | #define FIRE_DLC_SRM_DWBE_MSB `FIRE_DLC_SRM_DWBE_LSB + `FIRE_DLC_SRM_DWBE_WDTH - 1 | |
| 199 | #define FIRE_DLC_SRM_DWBE_BITS `FIRE_DLC_SRM_DWBE_MSB : `FIRE_DLC_SRM_DWBE_LSB | |
| 200 | ||
| 201 | #define FIRE_DLC_SRM_REQID_LSB `FIRE_DLC_SRM_DWBE_LSB + `FIRE_DLC_SRM_DWBE_WDTH | |
| 202 | #define FIRE_DLC_SRM_REQID_WDTH 16 | |
| 203 | #define FIRE_DLC_SRM_REQID_MSB `FIRE_DLC_SRM_REQID_LSB + `FIRE_DLC_SRM_REQID_WDTH - 1 | |
| 204 | #define FIRE_DLC_SRM_REQID_BITS `FIRE_DLC_SRM_REQID_MSB : `FIRE_DLC_SRM_REQID_LSB | |
| 205 | ||
| 206 | #define FIRE_DLC_SRM_LEN_LSB `FIRE_DLC_SRM_REQID_LSB + `FIRE_DLC_SRM_REQID_WDTH | |
| 207 | #define FIRE_DLC_SRM_LEN_WDTH 10 | |
| 208 | #define FIRE_DLC_SRM_LEN_MSB `FIRE_DLC_SRM_LEN_LSB + `FIRE_DLC_SRM_LEN_WDTH - 1 | |
| 209 | #define FIRE_DLC_SRM_LEN_BITS `FIRE_DLC_SRM_LEN_MSB : `FIRE_DLC_SRM_LEN_LSB | |
| 210 | ||
| 211 | #define FIRE_DLC_SRM_TYPE_LSB `FIRE_DLC_SRM_LEN_LSB + `FIRE_DLC_SRM_LEN_WDTH | |
| 212 | #define FIRE_DLC_SRM_TYPE_WDTH 7 | |
| 213 | #define FIRE_DLC_SRM_TYPE_MSB `FIRE_DLC_SRM_TYPE_LSB + `FIRE_DLC_SRM_TYPE_WDTH - 1 | |
| 214 | #define FIRE_DLC_SRM_TYPE_BITS `FIRE_DLC_SRM_TYPE_MSB : `FIRE_DLC_SRM_TYPE_LSB | |
| 215 | ||
| 216 | #define FIRE_DLC_SRM_LSB `FIRE_DLC_SRM_SBDTAG_LSB | |
| 217 | #define FIRE_DLC_SRM_WDTH `FIRE_DLC_SRM_TYPE_LSB + `FIRE_DLC_SRM_TYPE_WDTH | |
| 218 | #define FIRE_DLC_SRM_MSB `FIRE_DLC_SRM_WDTH - 1 | |
| 219 | #define FIRE_DLC_SRM_BITS `FIRE_DLC_SRM_MSB : `FIRE_DLC_SRM_LSB | |
| 220 | ||
| 221 | //############################### | |
| 222 | // TABLEWALK COMMAND RECORD (TCR) | |
| 223 | // From MMU to CLU | |
| 224 | //############################### | |
| 225 | ||
| 226 | #define FIRE_DLC_TCR_MTAG_LSB 0 | |
| 227 | #define FIRE_DLC_TCR_MTAG_WDTH 6 | |
| 228 | #define FIRE_DLC_TCR_MTAG_MSB `FIRE_DLC_TCR_MTAG_LSB + `FIRE_DLC_TCR_MTAG_WDTH - 1 | |
| 229 | #define FIRE_DLC_TCR_MTAG_BITS `FIRE_DLC_TCR_MTAG_MSB : `FIRE_DLC_TCR_MTAG_LSB | |
| 230 | // ~~~~~ mtag field access ~~~~~ | |
| 231 | #define FIRE_DLC_TCR_MTAG `FIRE_DLC_TCR_MTAG_MSB:`FIRE_DLC_TCR_MTAG_LSB | |
| 232 | ||
| 233 | #define FIRE_DLC_TCR_ADDR_LSB `FIRE_DLC_TCR_MTAG_LSB + `FIRE_DLC_TCR_MTAG_WDTH | |
| 234 | #define FIRE_DLC_TCR_ADDR_WDTH 37 | |
| 235 | #define FIRE_DLC_TCR_ADDR_MSB `FIRE_DLC_TCR_ADDR_LSB + `FIRE_DLC_TCR_ADDR_WDTH - 1 | |
| 236 | #define FIRE_DLC_TCR_ADDR_BITS `FIRE_DLC_TCR_ADDR_MSB : `FIRE_DLC_TCR_ADDR_LSB | |
| 237 | // ~~~~~ addr field access ~~~~~ | |
| 238 | #define FIRE_DLC_TCR_ADDR `FIRE_DLC_TCR_ADDR_MSB:`FIRE_DLC_TCR_ADDR_LSB | |
| 239 | ||
| 240 | #define FIRE_DLC_TCR_LSB `FIRE_DLC_TCR_MTAG_LSB | |
| 241 | #define FIRE_DLC_TCR_WDTH `FIRE_DLC_TCR_ADDR_LSB + `FIRE_DLC_TCR_ADDR_WDTH | |
| 242 | #define FIRE_DLC_TCR_MSB `FIRE_DLC_TCR_WDTH - 1 | |
| 243 | #define FIRE_DLC_TCR_BITS `FIRE_DLC_TCR_MSB : `FIRE_DLC_TCR_LSB | |
| 244 | ||
| 245 | //############################ | |
| 246 | // TABLEWALK DATA RECORD (TDR) | |
| 247 | // From CLU to MMU | |
| 248 | //############################ | |
| 249 | ||
| 250 | #define FIRE_DLC_TDR_DATA_LSB 0 | |
| 251 | #define FIRE_DLC_TDR_DATA_WDTH 128 | |
| 252 | #define FIRE_DLC_TDR_DATA_MSB `FIRE_DLC_TDR_DATA_LSB + `FIRE_DLC_TDR_DATA_WDTH - 1 | |
| 253 | #define FIRE_DLC_TDR_DATA_BITS `FIRE_DLC_TDR_DATA_MSB : `FIRE_DLC_TDR_DATA_LSB | |
| 254 | // ~~~~~ data field access ~~~~~ | |
| 255 | #define FIRE_DLC_TDR_DATA `FIRE_DLC_TDR_DATA_MSB:`FIRE_DLC_TDR_DATA_LSB | |
| 256 | ||
| 257 | #define FIRE_DLC_TDR_DPAR_LSB `FIRE_DLC_TDR_DATA_LSB + `FIRE_DLC_TDR_DATA_WDTH | |
| 258 | #define FIRE_DLC_TDR_DPAR_WDTH 4 | |
| 259 | #define FIRE_DLC_TDR_DPAR_MSB `FIRE_DLC_TDR_DPAR_LSB + `FIRE_DLC_TDR_DPAR_WDTH - 1 | |
| 260 | #define FIRE_DLC_TDR_DPAR_BITS `FIRE_DLC_TDR_DPAR_MSB : `FIRE_DLC_TDR_DPAR_LSB | |
| 261 | // ~~~~~ dpar field access ~~~~~ | |
| 262 | #define FIRE_DLC_TDR_DPAR `FIRE_DLC_TDR_DPAR_MSB:`FIRE_DLC_TDR_DPAR_LSB | |
| 263 | ||
| 264 | #define FIRE_DLC_TDR_MTAG_LSB `FIRE_DLC_TDR_DPAR_LSB + `FIRE_DLC_TDR_DPAR_WDTH | |
| 265 | #define FIRE_DLC_TDR_MTAG_WDTH 6 | |
| 266 | #define FIRE_DLC_TDR_MTAG_MSB `FIRE_DLC_TDR_MTAG_LSB + `FIRE_DLC_TDR_MTAG_WDTH - 1 | |
| 267 | #define FIRE_DLC_TDR_MTAG_BITS `FIRE_DLC_TDR_MTAG_MSB : `FIRE_DLC_TDR_MTAG_LSB | |
| 268 | // ~~~~~ mtag field access ~~~~~ | |
| 269 | #define FIRE_DLC_TDR_MTAG `FIRE_DLC_TDR_MTAG_MSB:`FIRE_DLC_TDR_MTAG_LSB | |
| 270 | ||
| 271 | #define FIRE_DLC_TDR_DERR_LSB `FIRE_DLC_TDR_MTAG_LSB + `FIRE_DLC_TDR_MTAG_WDTH | |
| 272 | #define FIRE_DLC_TDR_DERR_WDTH 1 | |
| 273 | #define FIRE_DLC_TDR_DERR_MSB `FIRE_DLC_TDR_DERR_LSB + `FIRE_DLC_TDR_DERR_WDTH - 1 | |
| 274 | #define FIRE_DLC_TDR_DERR_BITS `FIRE_DLC_TDR_DERR_MSB : `FIRE_DLC_TDR_DERR_LSB | |
| 275 | // ~~~~~ derr field access ~~~~~ | |
| 276 | #define FIRE_DLC_TDR_DERR `FIRE_DLC_TDR_DERR_MSB:`FIRE_DLC_TDR_DERR_LSB | |
| 277 | ||
| 278 | #define FIRE_DLC_TDR_CERR_LSB `FIRE_DLC_TDR_DERR_LSB + `FIRE_DLC_TDR_DERR_WDTH | |
| 279 | #define FIRE_DLC_TDR_CERR_WDTH 1 | |
| 280 | #define FIRE_DLC_TDR_CERR_MSB `FIRE_DLC_TDR_CERR_LSB + `FIRE_DLC_TDR_CERR_WDTH - 1 | |
| 281 | #define FIRE_DLC_TDR_CERR_BITS `FIRE_DLC_TDR_CERR_MSB : `FIRE_DLC_TDR_CERR_LSB | |
| 282 | // ~~~~~ cerr field access ~~~~~ | |
| 283 | #define FIRE_DLC_TDR_CERR `FIRE_DLC_TDR_CERR_MSB:`FIRE_DLC_TDR_CERR_LSB | |
| 284 | ||
| 285 | #define FIRE_DLC_TDR_LSB `FIRE_DLC_TDR_DATA_LSB | |
| 286 | #define FIRE_DLC_TDR_WDTH `FIRE_DLC_TDR_CERR_LSB + `FIRE_DLC_TDR_CERR_WDTH | |
| 287 | #define FIRE_DLC_TDR_MSB `FIRE_DLC_TDR_WDTH - 1 | |
| 288 | #define FIRE_DLC_TDR_BITS `FIRE_DLC_TDR_MSB : `FIRE_DLC_TDR_LSB | |
| 289 | ||
| 290 | //########################### | |
| 291 | // EGRESS PACKET RECORD (EPR) | |
| 292 | // From CRM to TCM | |
| 293 | //########################### | |
| 294 | ||
| 295 | #define FIRE_DLC_EPR_CNTXTNUM_LSB 0 // 0 start of CNTX# field | |
| 296 | #define FIRE_DLC_EPR_CNTXTNUM_WDTH 5 | |
| 297 | #define FIRE_DLC_EPR_CNTXTNUM_MSB `FIRE_DLC_EPR_CNTXTNUM_LSB + `FIRE_DLC_EPR_CNTXTNUM_WDTH -1 | |
| 298 | // ~~~~~ cntxtnum field access ~~~~~ | |
| 299 | #define FIRE_DLC_EPR_CNTXTNUM `FIRE_DLC_EPR_CNTXTNUM_MSB:`FIRE_DLC_EPR_CNTXTNUM_LSB | |
| 300 | ||
| 301 | #define FIRE_DLC_EPR_PKSEQNUM_LSB `FIRE_DLC_EPR_CNTXTNUM_LSB + `FIRE_DLC_EPR_CNTXTNUM_WDTH // 5 start of PKSEQ# field | |
| 302 | #define FIRE_DLC_EPR_PKSEQNUM_WDTH 5 | |
| 303 | #define FIRE_DLC_EPR_PKSEQNUM_MSB `FIRE_DLC_EPR_PKSEQNUM_LSB + `FIRE_DLC_EPR_PKSEQNUM_WDTH -1 | |
| 304 | // ~~~~~ pkseqnum field access ~~~~~ | |
| 305 | #define FIRE_DLC_EPR_PKSEQNUM `FIRE_DLC_EPR_PKSEQNUM_MSB:`FIRE_DLC_EPR_PKSEQNUM_LSB | |
| 306 | ||
| 307 | #define FIRE_DLC_EPR_DPTR_LSB `FIRE_DLC_EPR_PKSEQNUM_LSB + `FIRE_DLC_EPR_PKSEQNUM_WDTH //10 start of DPTR field | |
| 308 | #define FIRE_DLC_EPR_DPTR_WDTH 6 | |
| 309 | #define FIRE_DLC_EPR_DPTR_MSB `FIRE_DLC_EPR_DPTR_LSB + `FIRE_DLC_EPR_DPTR_WDTH -1 | |
| 310 | // ~~~~~ dptr field access ~~~~~ | |
| 311 | #define FIRE_DLC_EPR_DPTR `FIRE_DLC_EPR_DPTR_MSB:`FIRE_DLC_EPR_DPTR_LSB | |
| 312 | ||
| 313 | #define FIRE_DLC_EPR_SBDTAG_LSB `FIRE_DLC_EPR_DPTR_LSB + `FIRE_DLC_EPR_DPTR_WDTH //16 start of SBD Tag field | |
| 314 | #define FIRE_DLC_EPR_SBDTAG_WDTH 5 | |
| 315 | #define FIRE_DLC_EPR_SBDTAG_MSB `FIRE_DLC_EPR_SBDTAG_LSB + `FIRE_DLC_EPR_SBDTAG_WDTH -1 | |
| 316 | // ~~~~~ sbdtag field access ~~~~~ | |
| 317 | #define FIRE_DLC_EPR_SBDTAG `FIRE_DLC_EPR_SBDTAG_MSB:`FIRE_DLC_EPR_SBDTAG_LSB | |
| 318 | ||
| 319 | #define FIRE_DLC_EPR_ADDR_LSB `FIRE_DLC_EPR_SBDTAG_LSB + `FIRE_DLC_EPR_SBDTAG_WDTH //21 start of ADDR field | |
| 320 | #define FIRE_DLC_EPR_ADDR_WDTH 34 | |
| 321 | #define FIRE_DLC_EPR_ADDR_MSB `FIRE_DLC_EPR_ADDR_LSB + `FIRE_DLC_EPR_ADDR_WDTH -1 | |
| 322 | // ~~~~~ addr field access ~~~~~ | |
| 323 | #define FIRE_DLC_EPR_ADDR `FIRE_DLC_EPR_ADDR_MSB:`FIRE_DLC_EPR_ADDR_LSB | |
| 324 | ||
| 325 | #define FIRE_DLC_EPR_DWBE_LSB `FIRE_DLC_EPR_ADDR_LSB + `FIRE_DLC_EPR_ADDR_WDTH //55 start of BYTE CNT field | |
| 326 | #define FIRE_DLC_EPR_DWBE_WDTH 8 | |
| 327 | #define FIRE_DLC_EPR_DWBE_MSB `FIRE_DLC_EPR_DWBE_LSB + `FIRE_DLC_EPR_DWBE_WDTH -1 | |
| 328 | ||
| 329 | #define FIRE_DLC_EPR_LEN_LSB `FIRE_DLC_EPR_DWBE_LSB + `FIRE_DLC_EPR_DWBE_WDTH //63 start of LENGTH field | |
| 330 | #define FIRE_DLC_EPR_LEN_WDTH 10 | |
| 331 | #define FIRE_DLC_EPR_LEN_MSB `FIRE_DLC_EPR_LEN_LSB + `FIRE_DLC_EPR_LEN_WDTH -1 | |
| 332 | // ~~~~~ len field access ~~~~~ | |
| 333 | #define FIRE_DLC_EPR_LEN `FIRE_DLC_EPR_LEN_MSB:`FIRE_DLC_EPR_LEN_LSB | |
| 334 | ||
| 335 | #define FIRE_DLC_EPR_TYP_LSB `FIRE_DLC_EPR_LEN_LSB + `FIRE_DLC_EPR_LEN_WDTH //73 start of TYPE field | |
| 336 | #define FIRE_DLC_EPR_TYP_WDTH 7 | |
| 337 | #define FIRE_DLC_EPR_TYP_MSB `FIRE_DLC_EPR_TYP_LSB + `FIRE_DLC_EPR_TYP_WDTH -1 | |
| 338 | // ~~~~~ type field access ~~~~~ | |
| 339 | #define FIRE_DLC_EPR_TYP `FIRE_DLC_EPR_TYP_MSB:`FIRE_DLC_EPR_TYP_LSB | |
| 340 | ||
| 341 | #define FIRE_DLC_EPR_REC_WDTH `FIRE_DLC_EPR_TYP_LSB + `FIRE_DLC_EPR_TYP_WDTH //80 Packet Record WIDTH | |
| 342 | ||
| 343 | #define FIRE_DLC_EPR_MSB `FIRE_DLC_EPR_REC_WDTH -1 // Packet Record MSB | |
| 344 | ||
| 345 | //############################# | |
| 346 | // EGRESS RETIRE RECORD (ERR) | |
| 347 | // From TCM to RRM | |
| 348 | //############################# | |
| 349 | ||
| 350 | #define FIRE_DLC_ERR_DPTR_LSB 0 // 0 start of DPTR field | |
| 351 | #define FIRE_DLC_ERR_DPTR_WDTH 6 | |
| 352 | #define FIRE_DLC_ERR_DPTR_MSB `FIRE_DLC_ERR_DPTR_LSB + `FIRE_DLC_ERR_DPTR_WDTH -1 | |
| 353 | // ~~~~ dptr field access ~~~~ | |
| 354 | #define FIRE_DLC_ERR_DPTR `FIRE_DLC_ERR_DPTR_MSB:`FIRE_DLC_ERR_DPTR_LSB | |
| 355 | ||
| 356 | #define FIRE_DLC_ERR_SBDTAG_LSB `FIRE_DLC_ERR_DPTR_LSB + `FIRE_DLC_ERR_DPTR_WDTH // 6 start of SBD Tag field | |
| 357 | #define FIRE_DLC_ERR_SBDTAG_WDTH 5 | |
| 358 | #define FIRE_DLC_ERR_SBDTAG_MSB `FIRE_DLC_ERR_SBDTAG_LSB + `FIRE_DLC_ERR_SBDTAG_WDTH -1 | |
| 359 | // ~~~~ sbdtag field access ~~~~ | |
| 360 | #define FIRE_DLC_ERR_SBDTAG `FIRE_DLC_ERR_SBDTAG_MSB:`FIRE_DLC_ERR_SBDTAG_LSB | |
| 361 | ||
| 362 | #define FIRE_DLC_ERR_ADDR_LSB `FIRE_DLC_ERR_SBDTAG_LSB + `FIRE_DLC_ERR_SBDTAG_WDTH //11 start of ADDR field | |
| 363 | #define FIRE_DLC_ERR_ADDR_WDTH 34 | |
| 364 | #define FIRE_DLC_ERR_ADDR_MSB `FIRE_DLC_ERR_ADDR_LSB + `FIRE_DLC_ERR_ADDR_WDTH -1 | |
| 365 | // ~~~~ addr field access ~~~~ | |
| 366 | #define FIRE_DLC_ERR_ADDR `FIRE_DLC_ERR_ADDR_MSB:`FIRE_DLC_ERR_ADDR_LSB | |
| 367 | ||
| 368 | #define FIRE_DLC_ERR_FDWBE_LSB `FIRE_DLC_ERR_ADDR_LSB + `FIRE_DLC_ERR_ADDR_WDTH //45 start of FDWBE field | |
| 369 | #define FIRE_DLC_ERR_FDWBE_WDTH 4 | |
| 370 | #define FIRE_DLC_ERR_FDWBE_MSB `FIRE_DLC_ERR_FDWBE_LSB + `FIRE_DLC_ERR_FDWBE_WDTH -1 | |
| 371 | // ~~~~ fdwbe field access ~~~~ | |
| 372 | #define FIRE_DLC_ERR_FDWBE `FIRE_DLC_ERR_FDWBE_MSB:`FIRE_DLC_ERR_FDWBE_LSB | |
| 373 | ||
| 374 | #define FIRE_DLC_ERR_LDWBE_LSB `FIRE_DLC_ERR_FDWBE_LSB + `FIRE_DLC_ERR_FDWBE_WDTH //49 start of LDWBE field | |
| 375 | #define FIRE_DLC_ERR_LDWBE_WDTH 4 | |
| 376 | #define FIRE_DLC_ERR_LDWBE_MSB `FIRE_DLC_ERR_LDWBE_LSB + `FIRE_DLC_ERR_LDWBE_WDTH -1 | |
| 377 | // ~~~~ ldwbe field access ~~~~ | |
| 378 | #define FIRE_DLC_ERR_LDWBE `FIRE_DLC_ERR_LDWBE_MSB:`FIRE_DLC_ERR_LDWBE_LSB | |
| 379 | ||
| 380 | #define FIRE_DLC_ERR_LEN_LSB `FIRE_DLC_ERR_LDWBE_LSB + `FIRE_DLC_ERR_LDWBE_WDTH //53 start of LENGTH field | |
| 381 | #define FIRE_DLC_ERR_LEN_WDTH 10 | |
| 382 | #define FIRE_DLC_ERR_LEN_MSB `FIRE_DLC_ERR_LEN_LSB + `FIRE_DLC_ERR_LEN_WDTH -1 | |
| 383 | // ~~~~ len field access ~~~~ | |
| 384 | #define FIRE_DLC_ERR_LEN `FIRE_DLC_ERR_LEN_MSB:`FIRE_DLC_ERR_LEN_LSB | |
| 385 | ||
| 386 | #define FIRE_DLC_ERR_TYP_LSB `FIRE_DLC_ERR_LEN_LSB + `FIRE_DLC_ERR_LEN_WDTH //63 start of TYPE field | |
| 387 | #define FIRE_DLC_ERR_TYP_WDTH 7 | |
| 388 | #define FIRE_DLC_ERR_TYP_MSB `FIRE_DLC_ERR_TYP_LSB + `FIRE_DLC_ERR_TYP_WDTH -1 | |
| 389 | // ~~~~ type field access ~~~~ | |
| 390 | #define FIRE_DLC_ERR_TYP `FIRE_DLC_ERR_TYP_MSB:`FIRE_DLC_ERR_TYP_LSB | |
| 391 | ||
| 392 | #define FIRE_DLC_ERR_REC_WDTH `FIRE_DLC_ERR_TYP_LSB + `FIRE_DLC_ERR_TYP_WDTH //70 Retire Record Width | |
| 393 | ||
| 394 | #define FIRE_DLC_ERR_MSB `FIRE_DLC_ERR_REC_WDTH -1 // Retire Record MSB | |
| 395 | ||
| 396 | //############################# | |
| 397 | // INTERRUPT IN RECORD (IIN) | |
| 398 | // From LRM to IMU | |
| 399 | //############################# | |
| 400 | ||
| 401 | #define FIRE_DLC_IIN_LRMTAG_LSB 0 // Start of LRM TAG Field | |
| 402 | #define FIRE_DLC_IIN_LRMTAG_WDTH 8 // Width of LRM TAG Field | |
| 403 | #define FIRE_DLC_IIN_LRMTAG_MSB `FIRE_DLC_IIN_LRMTAG_LSB + `FIRE_DLC_IIN_LRMTAG_WDTH -1 // MSB of LRM TAG Field | |
| 404 | ||
| 405 | #define FIRE_DLC_IIN_DPTR_LSB `FIRE_DLC_IIN_LRMTAG_LSB + `FIRE_DLC_IIN_LRMTAG_WDTH // Start of Data Pointer Field | |
| 406 | #define FIRE_DLC_IIN_DPTR_WDTH 7 // Width of Data Pointer Field | |
| 407 | #define FIRE_DLC_IIN_DPTR_MSB `FIRE_DLC_IIN_DPTR_LSB + `FIRE_DLC_IIN_DPTR_WDTH -1 // MSB of Data Pointer Field | |
| 408 | ||
| 409 | #define FIRE_DLC_IIN_ADDR_LSB `FIRE_DLC_IIN_DPTR_LSB + `FIRE_DLC_IIN_DPTR_WDTH // Start of Address Field | |
| 410 | #define FIRE_DLC_IIN_ADDR_WDTH 62 // Width of Address Field | |
| 411 | #define FIRE_DLC_IIN_ADDR_MSB `FIRE_DLC_IIN_ADDR_LSB + `FIRE_DLC_IIN_ADDR_WDTH -1 // MSB of Address Field | |
| 412 | ||
| 413 | #define FIRE_DLC_IIN_DATA_LSB `FIRE_DLC_IIN_ADDR_LSB + `FIRE_DLC_IIN_ADDR_WDTH // Start of Data Field | |
| 414 | #define FIRE_DLC_IIN_DATA_WDTH 8 // Width of Data Field | |
| 415 | #define FIRE_DLC_IIN_DATA_MSB `FIRE_DLC_IIN_DATA_LSB + `FIRE_DLC_IIN_DATA_WDTH -1 // MSB of Data Field | |
| 416 | ||
| 417 | #define FIRE_DLC_IIN_TLPTAG_LSB `FIRE_DLC_IIN_DATA_LSB + `FIRE_DLC_IIN_DATA_WDTH // Start of TLP Tag Field | |
| 418 | #define FIRE_DLC_IIN_TLPTAG_WDTH 8 // Width of TLP Tag Field | |
| 419 | #define FIRE_DLC_IIN_TLPTAG_MSB `FIRE_DLC_IIN_TLPTAG_LSB + `FIRE_DLC_IIN_TLPTAG_WDTH -1 // MSB of TLP Tag Field | |
| 420 | ||
| 421 | #define FIRE_DLC_IIN_REQID_LSB `FIRE_DLC_IIN_TLPTAG_LSB + `FIRE_DLC_IIN_TLPTAG_WDTH // Start of REQ ID Field | |
| 422 | #define FIRE_DLC_IIN_REQID_WDTH 16 // Width of REQ ID Field | |
| 423 | #define FIRE_DLC_IIN_REQID_MSB `FIRE_DLC_IIN_REQID_LSB + `FIRE_DLC_IIN_REQID_WDTH -1 // MSB of REQ ID Field | |
| 424 | ||
| 425 | #define FIRE_DLC_IIN_LEN_LSB `FIRE_DLC_IIN_REQID_LSB + `FIRE_DLC_IIN_REQID_WDTH // Start of Length Field | |
| 426 | #define FIRE_DLC_IIN_LEN_WDTH 10 // Width of Length Field | |
| 427 | #define FIRE_DLC_IIN_LEN_MSB `FIRE_DLC_IIN_LEN_LSB + `FIRE_DLC_IIN_LEN_WDTH -1 // MSB of Length Field | |
| 428 | ||
| 429 | #define FIRE_DLC_IIN_ATR_LSB `FIRE_DLC_IIN_LEN_LSB + `FIRE_DLC_IIN_LEN_WDTH // Start of Attribute Field | |
| 430 | #define FIRE_DLC_IIN_ATR_WDTH 2 // Width of Attribute Field | |
| 431 | #define FIRE_DLC_IIN_ATR_MSB `FIRE_DLC_IIN_ATR_LSB + `FIRE_DLC_IIN_ATR_WDTH -1 // MSB of Attribute Field | |
| 432 | ||
| 433 | #define FIRE_DLC_IIN_TC_LSB `FIRE_DLC_IIN_ATR_LSB + `FIRE_DLC_IIN_ATR_WDTH // Start of TC Field | |
| 434 | #define FIRE_DLC_IIN_TC_WDTH 3 // Width of TC Field | |
| 435 | #define FIRE_DLC_IIN_TC_MSB `FIRE_DLC_IIN_TC_LSB + `FIRE_DLC_IIN_TC_WDTH -1 // MSB of TC Field | |
| 436 | ||
| 437 | #define FIRE_DLC_IIN_TYPE_LSB `FIRE_DLC_IIN_TC_LSB + `FIRE_DLC_IIN_TC_WDTH // Start of Type Field | |
| 438 | #define FIRE_DLC_IIN_TYPE_WDTH 7 // Width of Type Field | |
| 439 | #define FIRE_DLC_IIN_TYPE_MSB `FIRE_DLC_IIN_TYPE_LSB + `FIRE_DLC_IIN_TYPE_WDTH -1 // MSB of Type Field | |
| 440 | ||
| 441 | #define FIRE_DLC_IIN_REC_WDTH `FIRE_DLC_IIN_TYPE_LSB + `FIRE_DLC_IIN_TYPE_WDTH // Complete Record With | |
| 442 | ||
| 443 | //############################# | |
| 444 | // MSI DATA FORMAT (MDF) | |
| 445 | // From DIM to IMU | |
| 446 | //############################# | |
| 447 | ||
| 448 | #define FIRE_DLC_MDF_DATA_LSB 0 // Start of Data Field | |
| 449 | #define FIRE_DLC_MDF_DATA_WDTH 32 // Width of Data Field | |
| 450 | #define FIRE_DLC_MDF_DATA_MSB `FIRE_DLC_MDF_DATA_LSB + `FIRE_DLC_MDF_DATA_WDTH -1 // MSB of Data Field | |
| 451 | ||
| 452 | #define FIRE_DLC_MDF_PERR_LSB `FIRE_DLC_MDF_DATA_LSB + `FIRE_DLC_MDF_DATA_WDTH // Start of Parity Error Field | |
| 453 | #define FIRE_DLC_MDF_PERR_WDTH 1 // Width of Parity Error Field | |
| 454 | #define FIRE_DLC_MDF_PERR_MSB `FIRE_DLC_MDF_PERR_LSB + `FIRE_DLC_MDF_PERR_WDTH -1 // MSB of Parity Error Field | |
| 455 | ||
| 456 | #define FIRE_DLC_MDF_REC_WDTH `FIRE_DLC_MDF_PERR_LSB + `FIRE_DLC_MDF_PERR_WDTH // Complete Record With | |
| 457 | ||
| 458 | //############################# | |
| 459 | // STATIC CSR WIDTHS (SCW) | |
| 460 | // From IMU to TMU | |
| 461 | //############################# | |
| 462 | ||
| 463 | #define FIRE_DLC_SCW_MSI32_WDTH 16 | |
| 464 | #define FIRE_DLC_SCW_MSI64_WDTH 48 | |
| 465 | #define FIRE_DLC_SCW_MEM64_WDTH 40 | |
| 466 | ||
| 467 | //############################# | |
| 468 | // INTERRUPT OUT RECORD (IOT) | |
| 469 | // From IMU to LRM | |
| 470 | //############################# | |
| 471 | ||
| 472 | #define FIRE_DLC_IOT_LRMTAG_LSB 0 // Start of LRM TAG Field | |
| 473 | #define FIRE_DLC_IOT_LRMTAG_WDTH 8 // Width of LRM TAG Field | |
| 474 | #define FIRE_DLC_IOT_LRMTAG_MSB `FIRE_DLC_IOT_LRMTAG_LSB + `FIRE_DLC_IOT_LRMTAG_WDTH -1 // MSB of LRM TAG Field | |
| 475 | ||
| 476 | #define FIRE_DLC_IOT_DPTR_LSB `FIRE_DLC_IOT_LRMTAG_LSB + `FIRE_DLC_IOT_LRMTAG_WDTH // Start of Data Pointer Field | |
| 477 | #define FIRE_DLC_IOT_DPTR_WDTH 7 // Width of Data Pointer Field | |
| 478 | #define FIRE_DLC_IOT_DPTR_MSB `FIRE_DLC_IOT_DPTR_LSB + `FIRE_DLC_IOT_DPTR_WDTH -1 // MSB of Data Pointer Field | |
| 479 | // ~~~~ dptr field access ~~~~ | |
| 480 | #define FIRE_DLC_IOT_DPTR `FIRE_DLC_IOT_DPTR_MSB:`FIRE_DLC_IOT_DPTR_LSB | |
| 481 | ||
| 482 | #define FIRE_DLC_IOT_ADDR_LSB `FIRE_DLC_IOT_DPTR_LSB + `FIRE_DLC_IOT_DPTR_WDTH // Start of Address Field | |
| 483 | #define FIRE_DLC_IOT_ADDR_WDTH 62 // Width of Address Field | |
| 484 | #define FIRE_DLC_IOT_ADDR_MSB `FIRE_DLC_IOT_ADDR_LSB + `FIRE_DLC_IOT_ADDR_WDTH -1 // MSB of Address Field | |
| 485 | // ~~~~ addr field access ~~~~ | |
| 486 | #define FIRE_DLC_IOT_ADDR `FIRE_DLC_IOT_ADDR_MSB:`FIRE_DLC_IOT_ADDR_LSB | |
| 487 | ||
| 488 | #define FIRE_DLC_IOT_DATA_LSB `FIRE_DLC_IOT_ADDR_LSB + `FIRE_DLC_IOT_ADDR_WDTH // Start of Data Field | |
| 489 | #define FIRE_DLC_IOT_DATA_WDTH 8 // Width of Data Field | |
| 490 | #define FIRE_DLC_IOT_DATA_MSB `FIRE_DLC_IOT_DATA_LSB + `FIRE_DLC_IOT_DATA_WDTH -1 // MSB of Data Field | |
| 491 | // ~~~~ data field access ~~~~ | |
| 492 | #define FIRE_DLC_IOT_DATA `FIRE_DLC_IOT_DATA_MSB:`FIRE_DLC_IOT_DATA_LSB | |
| 493 | ||
| 494 | #define FIRE_DLC_IOT_TLPTAG_LSB `FIRE_DLC_IOT_DATA_LSB + `FIRE_DLC_IOT_DATA_WDTH // Start of TLP Tag Field | |
| 495 | #define FIRE_DLC_IOT_TLPTAG_WDTH 8 // Width of TLP Tag Field | |
| 496 | #define FIRE_DLC_IOT_TLPTAG_MSB `FIRE_DLC_IOT_TLPTAG_LSB + `FIRE_DLC_IOT_TLPTAG_WDTH -1 // MSB of TLP Tag Field | |
| 497 | ||
| 498 | #define FIRE_DLC_IOT_REQID_LSB `FIRE_DLC_IOT_TLPTAG_LSB + `FIRE_DLC_IOT_TLPTAG_WDTH // Start of REQ ID Field | |
| 499 | #define FIRE_DLC_IOT_REQID_WDTH 16 // Width of REQ ID Field | |
| 500 | #define FIRE_DLC_IOT_REQID_MSB `FIRE_DLC_IOT_REQID_LSB + `FIRE_DLC_IOT_REQID_WDTH -1 // MSB of REQ ID Field | |
| 501 | // ~~~~ reqid field access ~~~~ | |
| 502 | #define FIRE_DLC_IOT_REQID `FIRE_DLC_IOT_REQID_MSB:`FIRE_DLC_IOT_REQID_LSB | |
| 503 | ||
| 504 | #define FIRE_DLC_IOT_LEN_LSB `FIRE_DLC_IOT_REQID_LSB + `FIRE_DLC_IOT_REQID_WDTH // Start of Length Field | |
| 505 | #define FIRE_DLC_IOT_LEN_WDTH 10 // Width of Length Field | |
| 506 | #define FIRE_DLC_IOT_LEN_MSB `FIRE_DLC_IOT_LEN_LSB + `FIRE_DLC_IOT_LEN_WDTH -1 // MSB of Length Field | |
| 507 | // ~~~~ reqid field access ~~~~ | |
| 508 | #define FIRE_DLC_IOT_LEN `FIRE_DLC_IOT_LEN_MSB:`FIRE_DLC_IOT_LEN_LSB | |
| 509 | ||
| 510 | #define FIRE_DLC_IOT_ATR_LSB `FIRE_DLC_IOT_LEN_LSB + `FIRE_DLC_IOT_LEN_WDTH // Start of Attribute Field | |
| 511 | #define FIRE_DLC_IOT_ATR_WDTH 2 // Width of Attribute Field | |
| 512 | #define FIRE_DLC_IOT_ATR_MSB `FIRE_DLC_IOT_ATR_LSB + `FIRE_DLC_IOT_ATR_WDTH -1 // MSB of Attribute Field | |
| 513 | ||
| 514 | #define FIRE_DLC_IOT_TC_LSB `FIRE_DLC_IOT_ATR_LSB + `FIRE_DLC_IOT_ATR_WDTH // Start of TC Field | |
| 515 | #define FIRE_DLC_IOT_TC_WDTH 3 // Width of TC Field | |
| 516 | #define FIRE_DLC_IOT_TC_MSB `FIRE_DLC_IOT_TC_LSB + `FIRE_DLC_IOT_TC_WDTH -1 // MSB of TC Field | |
| 517 | ||
| 518 | #define FIRE_DLC_IOT_TYPE_LSB `FIRE_DLC_IOT_TC_LSB + `FIRE_DLC_IOT_TC_WDTH // Start of Type Field | |
| 519 | #define FIRE_DLC_IOT_TYPE_WDTH 7 // Width of Type Field | |
| 520 | #define FIRE_DLC_IOT_TYPE_MSB `FIRE_DLC_IOT_TYPE_LSB + `FIRE_DLC_IOT_TYPE_WDTH -1 // MSB of Type Field | |
| 521 | // ~~~~ type field access ~~~~ | |
| 522 | #define FIRE_DLC_IOT_TYPE `FIRE_DLC_IOT_TYPE_MSB:`FIRE_DLC_IOT_TYPE_LSB | |
| 523 | ||
| 524 | #define FIRE_DLC_IOT_REC_WDTH `FIRE_DLC_IOT_TYPE_LSB + `FIRE_DLC_IOT_TYPE_WDTH // Complete Record With | |
| 525 | ||
| 526 | //############################# | |
| 527 | // MONDO REQUEST RECORD (MQR) | |
| 528 | // From IMU to LRM | |
| 529 | //############################# | |
| 530 | ||
| 531 | #define FIRE_DLC_MQR_ID_LSB 0 // Start of ID Field | |
| 532 | #define FIRE_DLC_MQR_ID_WDTH 2 // Width of ID Field | |
| 533 | #define FIRE_DLC_MQR_ID_MSB `FIRE_DLC_MQR_ID_LSB + `FIRE_DLC_MQR_ID_WDTH -1 // MSB of ID Field | |
| 534 | ||
| 535 | #define FIRE_DLC_MQR_TID_LSB `FIRE_DLC_MQR_ID_LSB + `FIRE_DLC_MQR_ID_WDTH // Start of TID Field | |
| 536 | #define FIRE_DLC_MQR_TID_WDTH 5 // Width of TID Field | |
| 537 | #define FIRE_DLC_MQR_TID_MSB `FIRE_DLC_MQR_TID_LSB + `FIRE_DLC_MQR_TID_WDTH -1 // MSB of TID Field | |
| 538 | ||
| 539 | #define FIRE_DLC_MQR_INO_LSB `FIRE_DLC_MQR_TID_LSB + `FIRE_DLC_MQR_TID_WDTH // Start of INO Field | |
| 540 | #define FIRE_DLC_MQR_INO_WDTH 6 // Width of INO Field | |
| 541 | #define FIRE_DLC_MQR_INO_MSB `FIRE_DLC_MQR_INO_LSB + `FIRE_DLC_MQR_INO_WDTH -1 // MSB of INO Field | |
| 542 | ||
| 543 | #define FIRE_DLC_MQR_MODE_LSB `FIRE_DLC_MQR_INO_LSB + `FIRE_DLC_MQR_INO_WDTH // Start of MODE Field | |
| 544 | #define FIRE_DLC_MQR_MODE_WDTH 1 // Width of MODE Field | |
| 545 | #define FIRE_DLC_MQR_MODE_MSB `FIRE_DLC_MQR_MODE_LSB + `FIRE_DLC_MQR_MODE_WDTH -1 // MSB of MODE Field | |
| 546 | ||
| 547 | #define FIRE_DLC_MQR_REC_WDTH `FIRE_DLC_MQR_MODE_LSB + `FIRE_DLC_MQR_MODE_WDTH +1 // Complete Record With | |
| 548 | ||
| 549 | //############################# | |
| 550 | // MONDO REPLY RECORD (MRR) | |
| 551 | // From RRM to IMU | |
| 552 | //############################# | |
| 553 | ||
| 554 | #define FIRE_DLC_MRR_ACK_LSB 0 // Start of ACK Field | |
| 555 | #define FIRE_DLC_MRR_ACK_WDTH 1 // Width of ACK Field | |
| 556 | #define FIRE_DLC_MRR_ACK_MSB `FIRE_DLC_MRR_ACK_LSB + `FIRE_DLC_MRR_ACK_WDTH -1 // MSB of ACK Field | |
| 557 | ||
| 558 | #define FIRE_DLC_MRR_TAG_LSB `FIRE_DLC_MRR_ACK_LSB + `FIRE_DLC_MRR_ACK_WDTH // Start of Tag Field | |
| 559 | #define FIRE_DLC_MRR_TAG_WDTH 2 // Width of Tag Field | |
| 560 | #define FIRE_DLC_MRR_TAG_MSB `FIRE_DLC_MRR_TAG_LSB + `FIRE_DLC_MRR_TAG_WDTH -1 // MSB of Tag Field | |
| 561 | ||
| 562 | #define FIRE_DLC_MRR_REC_WDTH `FIRE_DLC_MRR_TAG_LSB + `FIRE_DLC_MRR_TAG_WDTH // Complete Record With | |
| 563 | ||
| 564 | //############################# | |
| 565 | // IMU's DMS DIU RAM RECORD (IRD) | |
| 566 | // From IMU's DMS to DIU | |
| 567 | //############################# | |
| 568 | ||
| 569 | #define FIRE_DLC_IRD_ADDR_WDTH 4 // Address width, to address 16 entries | |
| 570 | #define FIRE_DLC_IRD_DATA_WDTH 128 // Data width, 16 bytes | |
| 571 | #define FIRE_DLC_IRD_DPAR_WDTH 5 // Parity width 32 bit parity on data 1 bit for 16 bit bmask | |
| 572 | #define FIRE_DLC_IRD_BMASK_WDTH 16 // 16 bit bmask | |
| 573 | ||
| 574 | //############################# | |
| 575 | // TMU's DIM DIU RAM RECORD (TRD) | |
| 576 | // From TMU's DIM to DIU | |
| 577 | //############################# | |
| 578 | ||
| 579 | #define FIRE_DLC_TRD_ADDR_WDTH 8 // Address width, to address 128 entries DMA / 64 entries PIO 1 bit select | |
| 580 | #define FIRE_DLC_TRD_DATA_WDTH 128 // Data width, 16 bytes | |
| 581 | #define FIRE_DLC_TRD_DPAR_WDTH 5 // Parity width 32 bit parity on data 1 bit for 16 bit bmask | |
| 582 | #define FIRE_DLC_TRD_BMASK_WDTH 16 // 16 bit bmask | |
| 583 | ||
| 584 | //############################# | |
| 585 | // CLU's CTM DIU RAM RECORD (CRD) | |
| 586 | // From CLU's CTM to DIU | |
| 587 | //############################# | |
| 588 | ||
| 589 | #define FIRE_DLC_CRD_ADDR_WDTH 9 // Address width, to address 128 entries DMA / 64 entries PIO / 16 entries INT 2 bit select | |
| 590 | ||
| 591 | // from DIU to CLU's CTM | |
| 592 | #define FIRE_DLC_CRD_DATA_WDTH 128 // Data with, 16 bytes | |
| 593 | #define FIRE_DLC_CRD_DPAR_WDTH 5 // Parity width 32 bit parity on data 1 bit for 16 bit bmask | |
| 594 | #define FIRE_DLC_CRD_BMASK_WDTH 16 // 16 bit bmask | |
| 595 | ||
| 596 | //############################# | |
| 597 | // CLU's CRM DOU DMA RAM RECORD (CDD) | |
| 598 | // From CLU's CRM to DOU | |
| 599 | //############################# | |
| 600 | ||
| 601 | #define FIRE_DLC_CDD_ADDR_WDTH 7 // Address width, to address 128 entries DMA | |
| 602 | #define FIRE_DLC_CDD_DATA_WDTH 128 // Data width, 16 bytes | |
| 603 | #define FIRE_DLC_CDD_DPAR_WDTH 4 // Parity width 32 bit parity on data | |
| 604 | ||
| 605 | //############################# | |
| 606 | // CLU's CRM DOU PIO RAM RECORD (CPD) | |
| 607 | // From CLU's CRM to DOU | |
| 608 | //############################# | |
| 609 | ||
| 610 | #define FIRE_DLC_CPD_ADDR_WDTH 6 // Address width, to address 64 entries PIO | |
| 611 | #define FIRE_DLC_CPD_DATA_WDTH 128 // Data width, 16 bytes | |
| 612 | #define FIRE_DLC_CPD_DPAR_WDTH 4 // Parity width 32 bit parity on data | |
| 613 | ||
| 614 | //############################# | |
| 615 | // ILU's EIL DOU RAM RECORD (ERD) | |
| 616 | // From ILU's EIL to DOU | |
| 617 | //############################# | |
| 618 | ||
| 619 | #define FIRE_DLC_ERD_ADDR_WDTH 8 // Address width, to address 128 entries DMA / 64 entries PIO | |
| 620 | ||
| 621 | //############################# | |
| 622 | // From DOU to ILU's EIL | |
| 623 | //############################# | |
| 624 | ||
| 625 | #define FIRE_DLC_ERD_DATA_WDTH 128 // Data width, 16 bytes | |
| 626 | #define FIRE_DLC_ERD_DPAR_WDTH 4 // Parity width 32 bit parity on data | |
| 627 | ||
| 628 | //############################# | |
| 629 | // Ingress Data Path TMU-ILU (ITI) | |
| 630 | //############################# | |
| 631 | ||
| 632 | #define FIRE_DLC_ITI_ADDR_WDTH 8 // Address width, to IDB | |
| 633 | #define FIRE_DLC_ITI_DATA_WDTH 128 // Data width, 16 bytes | |
| 634 | #define FIRE_DLC_ITI_DPAR_WDTH 4 // Parity width 32 bit parity on data | |
| 635 | ||
| 636 | //############################# | |
| 637 | // Ingress MPS width from ILU to CMU | |
| 638 | //############################# | |
| 639 | ||
| 640 | #define FIRE_DLC_MPS 3 // max. payload size | |
| 641 | ||
| 642 | //############################# | |
| 643 | // PSB RECORD (PSR) | |
| 644 | // From PMU and CLU to PSB | |
| 645 | //############################# | |
| 646 | ||
| 647 | #define FIRE_DLC_PSR_CMD_TYPE_LSB 0 // LSB of Command Type Field | |
| 648 | #define FIRE_DLC_PSR_CMD_TYPE_WDTH 4 // Command Type Width | |
| 649 | #define FIRE_DLC_PSR_CMD_TYPE_MSB `FIRE_DLC_PSR_CMD_TYPE_LSB + `FIRE_DLC_PSR_CMD_TYPE_WDTH-1 // MSB of Command Type Field | |
| 650 | ||
| 651 | #define FIRE_DLC_PSR_TRN_LSB 0 // LSB of PKTAG Field | |
| 652 | #define FIRE_DLC_PSR_TRN_WDTH 5 // PKTAG Width | |
| 653 | #define FIRE_DLC_PSR_TRN_MSB `FIRE_DLC_PSR_TRN_LSB + `FIRE_DLC_PSR_TRN_WDTH -1 // MSB of PKTAG Field | |
| 654 | ||
| 655 | // DMA READ, DMA WRITE | |
| 656 | ||
| 657 | #define FIRE_DLC_PSR_BYTECNT_LSB 0 | |
| 658 | #define FIRE_DLC_PSR_BYTECNT_WDTH 12 // BYTE COUNT Width | |
| 659 | #define FIRE_DLC_PSR_BYTECNT_MSB `FIRE_DLC_PSR_BYTECNT_LSB + `FIRE_DLC_PSR_BYTECNT_WDTH -1 // MSB of BYTE COUNT Field | |
| 660 | // ~~~~ bytecount field access ~~~~ | |
| 661 | #define FIRE_DLC_PSR_BYTECNT `FIRE_DLC_PSR_BYTECNT_MSB:`FIRE_DLC_PSR_BYTECNT_LSB | |
| 662 | ||
| 663 | #define FIRE_DLC_PSR_LENGTH_LSB `FIRE_DLC_PSR_BYTECNT_LSB + `FIRE_DLC_PSR_BYTECNT_WDTH // LSB of LENGTH Field | |
| 664 | #define FIRE_DLC_PSR_LENGTH_WDTH 10 // LENGTH Width | |
| 665 | #define FIRE_DLC_PSR_LENGTH_MSB `FIRE_DLC_PSR_LENGTH_LSB + `FIRE_DLC_PSR_LENGTH_WDTH -1 // MSB of LENGTH Field | |
| 666 | // ~~~~ length field access ~~~~ | |
| 667 | #define FIRE_DLC_PSR_LENGTH `FIRE_DLC_PSR_LENGTH_MSB:`FIRE_DLC_PSR_LENGTH_LSB | |
| 668 | ||
| 669 | #define FIRE_DLC_PSR_CLTOT_LSB `FIRE_DLC_PSR_LENGTH_LSB + `FIRE_DLC_PSR_LENGTH_WDTH // LSB of CLTOT Field | |
| 670 | #define FIRE_DLC_PSR_CLTOT_WDTH 4 // CLTOT Width | |
| 671 | #define FIRE_DLC_PSR_CLTOT_MSB `FIRE_DLC_PSR_CLTOT_LSB + `FIRE_DLC_PSR_CLTOT_WDTH -1 // MSB of CLTOT Field | |
| 672 | // ~~~~ cl_total field access ~~~~ | |
| 673 | #define FIRE_DLC_PSR_CLTOT `FIRE_DLC_PSR_CLTOT_MSB:`FIRE_DLC_PSR_CLTOT_LSB | |
| 674 | ||
| 675 | #define FIRE_DLC_PSR_PKSEQ_LSB `FIRE_DLC_PSR_CLTOT_LSB + `FIRE_DLC_PSR_CLTOT_WDTH // LSB of PKSEQ Field | |
| 676 | #define FIRE_DLC_PSR_PKSEQ_WDTH 5 // PKSEQ Width | |
| 677 | #define FIRE_DLC_PSR_PKSEQ_MSB `FIRE_DLC_PSR_PKSEQ_LSB + `FIRE_DLC_PSR_PKSEQ_WDTH -1 // MSB of PKSEQ Field | |
| 678 | // ~~~~ pkt_sequence field access ~~~~ | |
| 679 | #define FIRE_DLC_PSR_PKSEQ `FIRE_DLC_PSR_PKSEQ_MSB:`FIRE_DLC_PSR_PKSEQ_LSB | |
| 680 | ||
| 681 | #define FIRE_DLC_PSR_CNTX_LSB `FIRE_DLC_PSR_PKSEQ_LSB + `FIRE_DLC_PSR_PKSEQ_WDTH // LSB of CNTX Field | |
| 682 | #define FIRE_DLC_PSR_CNTX_WDTH 5 // CNTX Width | |
| 683 | #define FIRE_DLC_PSR_CNTX_MSB `FIRE_DLC_PSR_CNTX_LSB + `FIRE_DLC_PSR_CNTX_WDTH -1 // MSB of CNTX Field | |
| 684 | // ~~~~ context_number field access ~~~~ | |
| 685 | #define FIRE_DLC_PSR_CNTX `FIRE_DLC_PSR_CNTX_MSB:`FIRE_DLC_PSR_CNTX_LSB | |
| 686 | ||
| 687 | #define FIRE_DLC_PSR_TRTAG_LSB `FIRE_DLC_PSR_CNTX_LSB + `FIRE_DLC_PSR_CNTX_WDTH // LSB of TRTAG Field | |
| 688 | #define FIRE_DLC_PSR_TRTAG_WDTH 5 // TRTAG Width | |
| 689 | #define FIRE_DLC_PSR_TRTAG_MSB `FIRE_DLC_PSR_TRTAG_LSB + `FIRE_DLC_PSR_TRTAG_WDTH -1 // MSB of TRTAG Field | |
| 690 | // ~~~~ psb sbd tag field access ~~~~ | |
| 691 | #define FIRE_DLC_PSR_TRTAG `FIRE_DLC_PSR_TRTAG_MSB:`FIRE_DLC_PSR_TRTAG_LSB | |
| 692 | ||
| 693 | #define FIRE_DLC_PSR_DMA_DATA_WDTH `FIRE_DLC_PSR_TRTAG_LSB + `FIRE_DLC_PSR_TRTAG_WDTH // DMA Read/Write Data width == 41 | |
| 694 | ||
| 695 | ||
| 696 | // PIO READ, PIO WRITE | |
| 697 | //BP n2 5-24-04 | |
| 698 | //#define FIRE_DLC_PSR_TRANSID_LSB 0 // LSB of TRANSID Field | |
| 699 | //#define FIRE_DLC_PSR_TRANSID_WDTH 2 // TRANSIDS Width | |
| 700 | //#define FIRE_DLC_PSR_TRANSID_MSB `FIRE_DLC_PSR_TRANSID_LSB + `FIRE_DLC_PSR_TRANSID_WDTH -1 // MSB of TRANSID Field | |
| 701 | ||
| 702 | //#define FIRE_DLC_PSR_AGENTID_LSB `FIRE_DLC_PSR_TRANSID_LSB + `FIRE_DLC_PSR_TRANSID_WDTH // | |
| 703 | //#define FIRE_DLC_PSR_AGENTID_WDTH 4 // AGENTID Width | |
| 704 | //#define FIRE_DLC_PSR_AGENTID_MSB `FIRE_DLC_PSR_AGENTID_LSB + `FIRE_DLC_PSR_AGENTID_WDTH -1 // | |
| 705 | ||
| 706 | #define FIRE_DLC_PSR_THRDID_LSB 0 // | |
| 707 | #define FIRE_DLC_PSR_THRDID_WDTH 7 // THRDID Width | |
| 708 | #define FIRE_DLC_PSR_THRDID_MSB `FIRE_DLC_PSR_THRDID_LSB + `FIRE_DLC_PSR_THRDID_WDTH -1 // | |
| 709 | ||
| 710 | //#define FIRE_DLC_PSR_PIO_DATA_WDTH `FIRE_DLC_PSR_AGENTID_LSB + `FIRE_DLC_PSR_AGENTID_WDTH // PIO Read/Write Data width == 6 | |
| 711 | #define FIRE_DLC_PSR_PIO_DATA_WDTH `FIRE_DLC_PSR_THRDID_LSB + `FIRE_DLC_PSR_THRDID_WDTH // PIO Read/Write Data width == 7 | |
| 712 | ||
| 713 | //############################# | |
| 714 | // TSB RECORD (TSR) | |
| 715 | // From RMU to TSB | |
| 716 | //############################# | |
| 717 | ||
| 718 | #define FIRE_DLC_TSR_CMD_TYPE_LSB 0 // LSB of COMMAND TYPE | |
| 719 | #define FIRE_DLC_TSR_CMD_TYPE_WDTH 4 // COMMAND TYPE Width | |
| 720 | #define FIRE_DLC_TSR_CMD_TYPE_MSB `FIRE_DLC_TSR_CMD_TYPE_LSB + `FIRE_DLC_TSR_CMD_TYPE_WDTH -1 // MSB of COMMAND TYPE | |
| 721 | ||
| 722 | #define FIRE_DLC_TSR_TRN_LSB 0 // LSB of TRN Field | |
| 723 | #define FIRE_DLC_TSR_TRN_WDTH 5 // TRN Width | |
| 724 | #define FIRE_DLC_TSR_TRN_MSB `FIRE_DLC_TSR_TRN_LSB + `FIRE_DLC_TSR_TRN_WDTH -1 // LSB of TRN Field | |
| 725 | ||
| 726 | ||
| 727 | #define FIRE_DLC_TSR_ADALIGN_LSB 0 // LSB of ADDRESS ALIGN Field | |
| 728 | #define FIRE_DLC_TSR_ADALIGN_WDTH 7 // ADDRESS ALIGN Width | |
| 729 | #define FIRE_DLC_TSR_ADALIGN_MSB `FIRE_DLC_TSR_ADALIGN_LSB + `FIRE_DLC_TSR_ADALIGN_WDTH -1 // MSB of ADDRESS ALIGN Field | |
| 730 | // ~~~~~ ADALIGN field access ~~~~~ | |
| 731 | #define FIRE_DLC_TSR_ADALIGN `FIRE_DLC_TSR_ADALIGN_MSB:`FIRE_DLC_TSR_ADALIGN_LSB | |
| 732 | ||
| 733 | #define FIRE_DLC_TSR_TLPTAG_LSB `FIRE_DLC_TSR_ADALIGN_LSB + `FIRE_DLC_TSR_ADALIGN_WDTH // LSB of TLP TAG Field | |
| 734 | #define FIRE_DLC_TSR_TLPTAG_WDTH 8 // TLP TAG Width | |
| 735 | #define FIRE_DLC_TSR_TLPTAG_MSB `FIRE_DLC_TSR_TLPTAG_LSB + `FIRE_DLC_TSR_TLPTAG_WDTH -1 // MSB of TLP TAG Field | |
| 736 | // ~~~~~ TLPTAG field access ~~~~~ | |
| 737 | #define FIRE_DLC_TSR_TLPTAG `FIRE_DLC_TSR_TLPTAG_MSB:`FIRE_DLC_TSR_TLPTAG_LSB | |
| 738 | ||
| 739 | #define FIRE_DLC_TSR_REQID_LSB `FIRE_DLC_TSR_TLPTAG_LSB + `FIRE_DLC_TSR_TLPTAG_WDTH // LSB of REQUEST ID Field | |
| 740 | #define FIRE_DLC_TSR_REQID_WDTH 16 // REQUEST ID Width | |
| 741 | #define FIRE_DLC_TSR_REQID_MSB `FIRE_DLC_TSR_REQID_LSB + `FIRE_DLC_TSR_REQID_WDTH -1 // MSB of REQUEST ID Field | |
| 742 | // ~~~~~ REQID field access ~~~~~ | |
| 743 | #define FIRE_DLC_TSR_REQID `FIRE_DLC_TSR_REQID_MSB:`FIRE_DLC_TSR_REQID_LSB | |
| 744 | ||
| 745 | #define FIRE_DLC_TSR_BYTECNT_LSB `FIRE_DLC_TSR_REQID_LSB + `FIRE_DLC_TSR_REQID_WDTH // LSB of BYTE COUNT Field | |
| 746 | #define FIRE_DLC_TSR_BYTECNT_WDTH 12 // BYTE COUNT Width | |
| 747 | #define FIRE_DLC_TSR_BYTECNT_MSB `FIRE_DLC_TSR_BYTECNT_LSB + `FIRE_DLC_TSR_BYTECNT_WDTH -1 // MSB of BYTE COUNT Field | |
| 748 | // ~~~~~ BYTECNT field access ~~~~~ | |
| 749 | #define FIRE_DLC_TSR_BYTECNT `FIRE_DLC_TSR_BYTECNT_MSB:`FIRE_DLC_TSR_BYTECNT_LSB | |
| 750 | ||
| 751 | #define FIRE_DLC_TSR_ATTR_LSB `FIRE_DLC_TSR_BYTECNT_LSB + `FIRE_DLC_TSR_BYTECNT_WDTH // LSB of ATTRIBUTE Field | |
| 752 | #define FIRE_DLC_TSR_ATTR_WDTH 2 // ATTRIBUTE Width | |
| 753 | #define FIRE_DLC_TSR_ATTR_MSB `FIRE_DLC_TSR_ATTR_LSB + `FIRE_DLC_TSR_ATTR_WDTH -1 // MSB of ATTRIBUTE Field | |
| 754 | // ~~~~~ ATTR field access ~~~~~ | |
| 755 | #define FIRE_DLC_TSR_ATTR `FIRE_DLC_TSR_ATTR_MSB:`FIRE_DLC_TSR_ATTR_LSB | |
| 756 | ||
| 757 | #define FIRE_DLC_TSR_TC_LSB `FIRE_DLC_TSR_ATTR_LSB + `FIRE_DLC_TSR_ATTR_WDTH // LSB of TRAFFIC CLASS Field | |
| 758 | #define FIRE_DLC_TSR_TC_WDTH 3 // TRAFFIC CLASS Width | |
| 759 | #define FIRE_DLC_TSR_TC_MSB `FIRE_DLC_TSR_TC_LSB + `FIRE_DLC_TSR_TC_WDTH -1 // MSB of TRAFFIC CLASS Field | |
| 760 | // ~~~~~ TC field access ~~~~~ | |
| 761 | #define FIRE_DLC_TSR_TC `FIRE_DLC_TSR_TC_MSB:`FIRE_DLC_TSR_TC_LSB | |
| 762 | ||
| 763 | #define FIRE_DLC_TSR_RD_DATA_WDTH `FIRE_DLC_TSR_TC_LSB + `FIRE_DLC_TSR_TC_WDTH // Read Data width == 48 | |
| 764 | #define FIRE_DLC_TSR_WR_DATA_WDTH `FIRE_DLC_TSR_TC_LSB + `FIRE_DLC_TSR_TC_WDTH // Write Data width == 48 | |
| 765 | ||
| 766 | //############################# | |
| 767 | // Ingress DIM Record (DIM) | |
| 768 | // From DIM to LRM | |
| 769 | //############################# | |
| 770 | ||
| 771 | #define FIRE_DLC_DIM_DPTR_LSB 0 // Start of DPTR Field | |
| 772 | #define FIRE_DLC_DIM_DPTR_WDTH 7 // Width of DPTR Field | |
| 773 | #define FIRE_DLC_DIM_DPTR_MSB `FIRE_DLC_DIM_DPTR_LSB + `FIRE_DLC_DIM_DPTR_WDTH -1 // MSB of DPTR Field | |
| 774 | ||
| 775 | #define FIRE_DLC_DIM_ADDR_LSB `FIRE_DLC_DIM_DPTR_LSB + `FIRE_DLC_DIM_DPTR_WDTH // Start of ADDR Field | |
| 776 | #define FIRE_DLC_DIM_ADDR_WDTH 62 // Width of ADDR Field | |
| 777 | #define FIRE_DLC_DIM_ADDR_MSB `FIRE_DLC_DIM_ADDR_LSB + `FIRE_DLC_DIM_ADDR_WDTH -1 // MSB of ADDR Field | |
| 778 | ||
| 779 | #define FIRE_DLC_DIM_FDWBE_LSB `FIRE_DLC_DIM_ADDR_LSB + `FIRE_DLC_DIM_ADDR_WDTH | |
| 780 | #define FIRE_DLC_DIM_FDWBE_WDTH 4 | |
| 781 | #define FIRE_DLC_DIM_FDWBE_MSB `FIRE_DLC_DIM_FDWBE_LSB + `FIRE_DLC_DIM_FDWBE_WDTH -1 | |
| 782 | ||
| 783 | #define FIRE_DLC_DIM_LDWBE_LSB `FIRE_DLC_DIM_FDWBE_LSB + `FIRE_DLC_DIM_FDWBE_WDTH // Start of Field | |
| 784 | #define FIRE_DLC_DIM_LDWBE_WDTH 4 // Width of Field | |
| 785 | #define FIRE_DLC_DIM_LDWBE_MSB `FIRE_DLC_DIM_LDWBE_LSB + `FIRE_DLC_DIM_LDWBE_WDTH -1 // MSB of Field | |
| 786 | ||
| 787 | #define FIRE_DLC_DIM_TAG_LSB `FIRE_DLC_DIM_LDWBE_LSB + `FIRE_DLC_DIM_LDWBE_WDTH // Start of Field | |
| 788 | #define FIRE_DLC_DIM_TAG_WDTH 8 // Width of Field | |
| 789 | #define FIRE_DLC_DIM_TAG_MSB `FIRE_DLC_DIM_TAG_LSB + `FIRE_DLC_DIM_TAG_WDTH -1 // MSB of Field | |
| 790 | ||
| 791 | #define FIRE_DLC_DIM_REQID_LSB `FIRE_DLC_DIM_TAG_LSB + `FIRE_DLC_DIM_TAG_WDTH // Start of Field | |
| 792 | #define FIRE_DLC_DIM_REQID_WDTH 16 // Width of Field | |
| 793 | #define FIRE_DLC_DIM_REQID_MSB `FIRE_DLC_DIM_REQID_LSB + `FIRE_DLC_DIM_REQID_WDTH -1 // MSB of Field | |
| 794 | ||
| 795 | #define FIRE_DLC_DIM_LEN_LSB `FIRE_DLC_DIM_REQID_LSB + `FIRE_DLC_DIM_REQID_WDTH // Start of Field | |
| 796 | #define FIRE_DLC_DIM_LEN_WDTH 10 // Width of Field | |
| 797 | #define FIRE_DLC_DIM_LEN_MSB `FIRE_DLC_DIM_LEN_LSB + `FIRE_DLC_DIM_LEN_WDTH -1 // MSB of Field | |
| 798 | ||
| 799 | #define FIRE_DLC_DIM_ATR_LSB `FIRE_DLC_DIM_LEN_LSB + `FIRE_DLC_DIM_LEN_WDTH // Start of Field | |
| 800 | #define FIRE_DLC_DIM_ATR_WDTH 2 // Width of Field | |
| 801 | #define FIRE_DLC_DIM_ATR_MSB `FIRE_DLC_DIM_ATR_LSB + `FIRE_DLC_DIM_ATR_WDTH -1 // MSB of Field | |
| 802 | ||
| 803 | #define FIRE_DLC_DIM_TC_LSB `FIRE_DLC_DIM_ATR_LSB + `FIRE_DLC_DIM_ATR_WDTH // Start of Field | |
| 804 | #define FIRE_DLC_DIM_TC_WDTH 3 // Width of Field | |
| 805 | #define FIRE_DLC_DIM_TC_MSB `FIRE_DLC_DIM_TC_LSB + `FIRE_DLC_DIM_TC_WDTH -1 // MSB of Field | |
| 806 | ||
| 807 | #define FIRE_DLC_DIM_TYPE_LSB `FIRE_DLC_DIM_TC_LSB + `FIRE_DLC_DIM_TC_WDTH // Start of Field | |
| 808 | #define FIRE_DLC_DIM_TYPE_WDTH 7 // Width of Field | |
| 809 | #define FIRE_DLC_DIM_TYPE_MSB `FIRE_DLC_DIM_TYPE_LSB + `FIRE_DLC_DIM_TYPE_WDTH -1 // MSB of Field | |
| 810 | ||
| 811 | #define FIRE_DLC_DIM_REC_WDTH `FIRE_DLC_DIM_TYPE_LSB + `FIRE_DLC_DIM_TYPE_WDTH // Complete Record With | |
| 812 | ||
| 813 | //############################# | |
| 814 | // Egress RRM Record (RRM) | |
| 815 | // From RRM to DEM | |
| 816 | //############################# | |
| 817 | ||
| 818 | #define FIRE_DLC_RRM_DPTR_LSB 0 // Start of Field | |
| 819 | #define FIRE_DLC_RRM_DPTR_WDTH 6 // Width of Field | |
| 820 | #define FIRE_DLC_RRM_DPTR_MSB `FIRE_DLC_RRM_DPTR_LSB + `FIRE_DLC_RRM_DPTR_WDTH -1 // MSB of Field | |
| 821 | ||
| 822 | #define FIRE_DLC_RRM_TAG_LSB `FIRE_DLC_RRM_DPTR_LSB + `FIRE_DLC_RRM_DPTR_WDTH // Start of Field | |
| 823 | #define FIRE_DLC_RRM_TAG_WDTH 8 // Width of Field | |
| 824 | #define FIRE_DLC_RRM_TAG_MSB `FIRE_DLC_RRM_TAG_LSB + `FIRE_DLC_RRM_TAG_WDTH -1 // MSB of Field | |
| 825 | ||
| 826 | #define FIRE_DLC_RRM_ADDR_LSB `FIRE_DLC_RRM_TAG_LSB + `FIRE_DLC_RRM_TAG_WDTH // Start of Field | |
| 827 | #define FIRE_DLC_RRM_ADDR_WDTH 34 // Width of Field | |
| 828 | #define FIRE_DLC_RRM_ADDR_MSB `FIRE_DLC_RRM_ADDR_LSB + `FIRE_DLC_RRM_ADDR_WDTH -1 // MSB of Field | |
| 829 | ||
| 830 | #define FIRE_DLC_RRM_FDWBE_LSB `FIRE_DLC_RRM_ADDR_LSB + `FIRE_DLC_RRM_ADDR_WDTH // Start of Field | |
| 831 | #define FIRE_DLC_RRM_FDWBE_WDTH 4 // Width of Field | |
| 832 | #define FIRE_DLC_RRM_FDWBE_MSB `FIRE_DLC_RRM_FDWBE_LSB + `FIRE_DLC_RRM_FDWBE_WDTH -1 // MSB of Field | |
| 833 | ||
| 834 | #define FIRE_DLC_RRM_LDWBE_LSB `FIRE_DLC_RRM_FDWBE_LSB + `FIRE_DLC_RRM_FDWBE_WDTH // Start of Field | |
| 835 | #define FIRE_DLC_RRM_LDWBE_WDTH 4 // Width of Field | |
| 836 | #define FIRE_DLC_RRM_LDWBE_MSB `FIRE_DLC_RRM_LDWBE_LSB + `FIRE_DLC_RRM_LDWBE_WDTH -1 // MSB of Field | |
| 837 | ||
| 838 | #define FIRE_DLC_RRM_REQID_LSB `FIRE_DLC_RRM_LDWBE_LSB + `FIRE_DLC_RRM_LDWBE_WDTH // Start of Field | |
| 839 | #define FIRE_DLC_RRM_REQID_WDTH 16 // Width of Field | |
| 840 | #define FIRE_DLC_RRM_REQID_MSB `FIRE_DLC_RRM_REQID_LSB + `FIRE_DLC_RRM_REQID_WDTH -1 // MSB of Field | |
| 841 | ||
| 842 | #define FIRE_DLC_RRM_LEN_LSB `FIRE_DLC_RRM_REQID_LSB + `FIRE_DLC_RRM_REQID_WDTH // Start of Field | |
| 843 | #define FIRE_DLC_RRM_LEN_WDTH 10 // Width of Field | |
| 844 | #define FIRE_DLC_RRM_LEN_MSB `FIRE_DLC_RRM_LEN_LSB + `FIRE_DLC_RRM_LEN_WDTH -1 // MSB of Field | |
| 845 | ||
| 846 | #define FIRE_DLC_RRM_ATR_LSB `FIRE_DLC_RRM_LEN_LSB + `FIRE_DLC_RRM_LEN_WDTH // Start of Field | |
| 847 | #define FIRE_DLC_RRM_ATR_WDTH 2 // Width of Field | |
| 848 | #define FIRE_DLC_RRM_ATR_MSB `FIRE_DLC_RRM_ATR_LSB + `FIRE_DLC_RRM_ATR_WDTH -1 // MSB of Field | |
| 849 | ||
| 850 | #define FIRE_DLC_RRM_TC_LSB `FIRE_DLC_RRM_ATR_LSB + `FIRE_DLC_RRM_ATR_WDTH // Start of Field | |
| 851 | #define FIRE_DLC_RRM_TC_WDTH 3 // Width of Field | |
| 852 | #define FIRE_DLC_RRM_TC_MSB `FIRE_DLC_RRM_TC_LSB + `FIRE_DLC_RRM_TC_WDTH -1 // MSB of Field | |
| 853 | ||
| 854 | #define FIRE_DLC_RRM_TYPE_LSB `FIRE_DLC_RRM_TC_LSB + `FIRE_DLC_RRM_TC_WDTH // Start of Field | |
| 855 | #define FIRE_DLC_RRM_TYPE_WDTH 7 // Width of Field | |
| 856 | #define FIRE_DLC_RRM_TYPE_MSB `FIRE_DLC_RRM_TYPE_LSB + `FIRE_DLC_RRM_TYPE_WDTH -1 // MSB of Field | |
| 857 | ||
| 858 | #define FIRE_DLC_RRM_REC_WDTH `FIRE_DLC_RRM_TYPE_LSB + `FIRE_DLC_RRM_TYPE_WDTH // Complete Record With | |
| 859 | ||
| 860 | //############################# | |
| 861 | // Ingress PEC Record (IPE) | |
| 862 | // From IIL to DIM | |
| 863 | //############################# | |
| 864 | ||
| 865 | #define FIRE_DLC_IPE_ADDR_LSB 0 | |
| 866 | #define FIRE_DLC_IPE_ADDR_WDTH 62 // Width of Field | |
| 867 | #define FIRE_DLC_IPE_ADDR_MSB `FIRE_DLC_IPE_ADDR_LSB + `FIRE_DLC_IPE_ADDR_WDTH -1 // MSB of Field | |
| 868 | ||
| 869 | #define FIRE_DLC_IPE_FDWBE_LSB `FIRE_DLC_IPE_ADDR_LSB + `FIRE_DLC_IPE_ADDR_WDTH // Start of Field | |
| 870 | #define FIRE_DLC_IPE_FDWBE_WDTH 4 // Width of Field | |
| 871 | #define FIRE_DLC_IPE_FDWBE_MSB `FIRE_DLC_IPE_FDWBE_LSB + `FIRE_DLC_IPE_FDWBE_WDTH -1 // MSB of Field | |
| 872 | ||
| 873 | #define FIRE_DLC_IPE_LDWBE_LSB `FIRE_DLC_IPE_FDWBE_LSB + `FIRE_DLC_IPE_FDWBE_WDTH // Start of Field | |
| 874 | #define FIRE_DLC_IPE_LDWBE_WDTH 4 // Width of Field | |
| 875 | #define FIRE_DLC_IPE_LDWBE_MSB `FIRE_DLC_IPE_LDWBE_LSB + `FIRE_DLC_IPE_LDWBE_WDTH -1 // MSB of Field | |
| 876 | ||
| 877 | #define FIRE_DLC_IPE_TAG_LSB `FIRE_DLC_IPE_LDWBE_LSB + `FIRE_DLC_IPE_LDWBE_WDTH // Start of Field | |
| 878 | #define FIRE_DLC_IPE_TAG_WDTH 8 // Width of Field | |
| 879 | #define FIRE_DLC_IPE_TAG_MSB `FIRE_DLC_IPE_TAG_LSB + `FIRE_DLC_IPE_TAG_WDTH -1 // MSB of Field | |
| 880 | ||
| 881 | #define FIRE_DLC_IPE_REQID_LSB `FIRE_DLC_IPE_TAG_LSB + `FIRE_DLC_IPE_TAG_WDTH // Start of Field | |
| 882 | #define FIRE_DLC_IPE_REQID_WDTH 16 // Width of Field | |
| 883 | #define FIRE_DLC_IPE_REQID_MSB `FIRE_DLC_IPE_REQID_LSB + `FIRE_DLC_IPE_REQID_WDTH -1 // MSB of Field | |
| 884 | ||
| 885 | #define FIRE_DLC_IPE_LEN_LSB `FIRE_DLC_IPE_REQID_LSB + `FIRE_DLC_IPE_REQID_WDTH // Start of Field | |
| 886 | #define FIRE_DLC_IPE_LEN_WDTH 10 // Width of Field | |
| 887 | #define FIRE_DLC_IPE_LEN_MSB `FIRE_DLC_IPE_LEN_LSB + `FIRE_DLC_IPE_LEN_WDTH -1 // MSB of Field | |
| 888 | ||
| 889 | #define FIRE_DLC_IPE_ATR_LSB `FIRE_DLC_IPE_LEN_LSB + `FIRE_DLC_IPE_LEN_WDTH // Start of Field | |
| 890 | #define FIRE_DLC_IPE_ATR_WDTH 2 // Width of Field | |
| 891 | #define FIRE_DLC_IPE_ATR_MSB `FIRE_DLC_IPE_ATR_LSB + `FIRE_DLC_IPE_ATR_WDTH -1 // MSB of Field | |
| 892 | ||
| 893 | #define FIRE_DLC_IPE_TC_LSB `FIRE_DLC_IPE_ATR_LSB + `FIRE_DLC_IPE_ATR_WDTH // Start of Field | |
| 894 | #define FIRE_DLC_IPE_TC_WDTH 3 // Width of Field | |
| 895 | #define FIRE_DLC_IPE_TC_MSB `FIRE_DLC_IPE_TC_LSB + `FIRE_DLC_IPE_TC_WDTH -1 // MSB of Field | |
| 896 | ||
| 897 | #define FIRE_DLC_IPE_TYPE_LSB `FIRE_DLC_IPE_TC_LSB + `FIRE_DLC_IPE_TC_WDTH // Start of Field | |
| 898 | #define FIRE_DLC_IPE_TYPE_WDTH 5 // Width of Field | |
| 899 | #define FIRE_DLC_IPE_TYPE_MSB `FIRE_DLC_IPE_TYPE_LSB + `FIRE_DLC_IPE_TYPE_WDTH -1 // MSB of Field | |
| 900 | ||
| 901 | #define FIRE_DLC_IPE_F_LSB `FIRE_DLC_IPE_TYPE_LSB + `FIRE_DLC_IPE_TYPE_WDTH // Start of Field | |
| 902 | #define FIRE_DLC_IPE_F_WDTH 2 // Width of Field | |
| 903 | #define FIRE_DLC_IPE_F_MSB `FIRE_DLC_IPE_F_LSB + `FIRE_DLC_IPE_F_WDTH -1 // MSB of Field | |
| 904 | ||
| 905 | #define FIRE_DLC_IPE_REC_WDTH `FIRE_DLC_IPE_F_LSB + `FIRE_DLC_IPE_F_WDTH // Complete Record With | |
| 906 | ||
| 907 | //############################# | |
| 908 | // Egress PEC Record (EPE) | |
| 909 | // From DEM to EIL | |
| 910 | //############################# | |
| 911 | ||
| 912 | #define FIRE_DLC_EPE_DPTR_LSB 0 // Start of Field | |
| 913 | #define FIRE_DLC_EPE_DPTR_WDTH 6 // Width of Field | |
| 914 | #define FIRE_DLC_EPE_DPTR_MSB `FIRE_DLC_EPE_DPTR_LSB + `FIRE_DLC_EPE_DPTR_WDTH -1 // MSB of Field | |
| 915 | ||
| 916 | #define FIRE_DLC_EPE_ADDR_LSB `FIRE_DLC_EPE_DPTR_LSB + `FIRE_DLC_EPE_DPTR_WDTH // Start of Field | |
| 917 | #define FIRE_DLC_EPE_ADDR_WDTH 64 // Width of Field | |
| 918 | #define FIRE_DLC_EPE_ADDR_MSB `FIRE_DLC_EPE_ADDR_LSB + `FIRE_DLC_EPE_ADDR_WDTH -1 // MSB of Field | |
| 919 | ||
| 920 | #define FIRE_DLC_EPE_FDWBE_LSB `FIRE_DLC_EPE_ADDR_LSB + `FIRE_DLC_EPE_ADDR_WDTH // Start of Field | |
| 921 | #define FIRE_DLC_EPE_FDWBE_WDTH 4 // Width of Field | |
| 922 | #define FIRE_DLC_EPE_FDWBE_MSB `FIRE_DLC_EPE_FDWBE_LSB + `FIRE_DLC_EPE_FDWBE_WDTH -1 // MSB of Field | |
| 923 | ||
| 924 | #define FIRE_DLC_EPE_LDWBE_LSB `FIRE_DLC_EPE_FDWBE_LSB + `FIRE_DLC_EPE_FDWBE_WDTH // Start of Field | |
| 925 | #define FIRE_DLC_EPE_LDWBE_WDTH 4 // Width of Field | |
| 926 | #define FIRE_DLC_EPE_LDWBE_MSB `FIRE_DLC_EPE_LDWBE_LSB + `FIRE_DLC_EPE_LDWBE_WDTH -1 // MSB of Field | |
| 927 | ||
| 928 | #define FIRE_DLC_EPE_TAG_LSB `FIRE_DLC_EPE_LDWBE_LSB + `FIRE_DLC_EPE_LDWBE_WDTH // Start of Field | |
| 929 | #define FIRE_DLC_EPE_TAG_WDTH 8 // Width of Field | |
| 930 | #define FIRE_DLC_EPE_TAG_MSB `FIRE_DLC_EPE_TAG_LSB + `FIRE_DLC_EPE_TAG_WDTH -1 // MSB of Field | |
| 931 | ||
| 932 | #define FIRE_DLC_EPE_REQID_LSB `FIRE_DLC_EPE_TAG_LSB + `FIRE_DLC_EPE_TAG_WDTH // Start of Field | |
| 933 | #define FIRE_DLC_EPE_REQID_WDTH 16 // Width of Field | |
| 934 | #define FIRE_DLC_EPE_REQID_MSB `FIRE_DLC_EPE_REQID_LSB + `FIRE_DLC_EPE_REQID_WDTH -1 // MSB of Field | |
| 935 | ||
| 936 | #define FIRE_DLC_EPE_LEN_LSB `FIRE_DLC_EPE_REQID_LSB + `FIRE_DLC_EPE_REQID_WDTH // Start of Field | |
| 937 | #define FIRE_DLC_EPE_LEN_WDTH 10 // Width of Field | |
| 938 | #define FIRE_DLC_EPE_LEN_MSB `FIRE_DLC_EPE_LEN_LSB + `FIRE_DLC_EPE_LEN_WDTH -1 // MSB of Field | |
| 939 | ||
| 940 | #define FIRE_DLC_EPE_ATR_LSB `FIRE_DLC_EPE_LEN_LSB + `FIRE_DLC_EPE_LEN_WDTH // Start of Field | |
| 941 | #define FIRE_DLC_EPE_ATR_WDTH 2 // Width of Field | |
| 942 | #define FIRE_DLC_EPE_ATR_MSB `FIRE_DLC_EPE_ATR_LSB + `FIRE_DLC_EPE_ATR_WDTH -1 // MSB of Field | |
| 943 | ||
| 944 | #define FIRE_DLC_EPE_TC_LSB `FIRE_DLC_EPE_ATR_LSB + `FIRE_DLC_EPE_ATR_WDTH // Start of Field | |
| 945 | #define FIRE_DLC_EPE_TC_WDTH 3 // Width of Field | |
| 946 | #define FIRE_DLC_EPE_TC_MSB `FIRE_DLC_EPE_TC_LSB + `FIRE_DLC_EPE_TC_WDTH -1 // MSB of Field | |
| 947 | ||
| 948 | #define FIRE_DLC_EPE_TYPE_LSB `FIRE_DLC_EPE_TC_LSB + `FIRE_DLC_EPE_TC_WDTH // Start of Field | |
| 949 | #define FIRE_DLC_EPE_TYPE_WDTH 5 // Width of Field | |
| 950 | #define FIRE_DLC_EPE_TYPE_MSB `FIRE_DLC_EPE_TYPE_LSB + `FIRE_DLC_EPE_TYPE_WDTH -1 // MSB of Field | |
| 951 | ||
| 952 | #define FIRE_DLC_EPE_F_LSB `FIRE_DLC_EPE_TYPE_LSB + `FIRE_DLC_EPE_TYPE_WDTH // Start of Field | |
| 953 | #define FIRE_DLC_EPE_F_WDTH 2 // Width of Field | |
| 954 | #define FIRE_DLC_EPE_F_MSB `FIRE_DLC_EPE_F_LSB + `FIRE_DLC_EPE_F_WDTH -1 // MSB of Field | |
| 955 | ||
| 956 | #define FIRE_DLC_EPE_REC_WDTH `FIRE_DLC_EPE_F_LSB + `FIRE_DLC_EPE_F_WDTH // Complete Record With | |
| 957 | ||
| 958 | //############################# | |
| 959 | // Ingress (Upbound) Release Record (URR) | |
| 960 | // From DIM to IIL | |
| 961 | //############################# | |
| 962 | ||
| 963 | #define FIRE_DLC_URR_DPTR_LSB 0 // Start of Field | |
| 964 | #define FIRE_DLC_URR_DPTR_WDTH 8 // Width of Field | |
| 965 | #define FIRE_DLC_URR_DPTR_MSB `FIRE_DLC_URR_DPTR_LSB + `FIRE_DLC_URR_DPTR_WDTH -1 // MSB of Field | |
| 966 | ||
| 967 | #define FIRE_DLC_URR_TYPE_LSB `FIRE_DLC_URR_DPTR_LSB + `FIRE_DLC_URR_DPTR_WDTH // Start of Field | |
| 968 | #define FIRE_DLC_URR_TYPE_WDTH 1 // Width of Field | |
| 969 | #define FIRE_DLC_URR_TYPE_MSB `FIRE_DLC_URR_TYPE_LSB + `FIRE_DLC_URR_TYPE_WDTH -1 // MSB of Field | |
| 970 | ||
| 971 | #define FIRE_DLC_URR_REC_WDTH `FIRE_DLC_URR_TYPE_LSB + `FIRE_DLC_URR_TYPE_WDTH | |
| 972 | ||
| 973 | //############################# | |
| 974 | // Egress (Downbound) Release Record (DRR) | |
| 975 | // From EIL to RRM | |
| 976 | //############################# | |
| 977 | ||
| 978 | #define FIRE_DLC_DRR_DPTR_LSB 0 // Start of Field | |
| 979 | #define FIRE_DLC_DRR_DPTR_WDTH 8 // Width of Field | |
| 980 | #define FIRE_DLC_DRR_DPTR_MSB `FIRE_DLC_DRR_DPTR_LSB + `FIRE_DLC_DRR_DPTR_WDTH -1 // MSB of Field | |
| 981 | ||
| 982 | #define FIRE_DLC_DRR_TYPE_LSB `FIRE_DLC_DRR_DPTR_LSB + `FIRE_DLC_DRR_DPTR_WDTH // Start of Field | |
| 983 | #define FIRE_DLC_DRR_TYPE_WDTH 1 // Width of Field | |
| 984 | #define FIRE_DLC_DRR_TYPE_MSB `FIRE_DLC_DRR_TYPE_LSB + `FIRE_DLC_DRR_TYPE_WDTH -1 // MSB of Field | |
| 985 | ||
| 986 | #define FIRE_DLC_DRR_REC_WDTH `FIRE_DLC_DRR_TYPE_LSB + `FIRE_DLC_DRR_TYPE_WDTH | |
| 987 | ||
| 988 | //############################# | |
| 989 | // Ingress DIU Buffer Read/write Pointers | |
| 990 | // Between CLU to TMU | |
| 991 | //############################# | |
| 992 | ||
| 993 | #define FIRE_DLC_DMA_RPTR_WDTH 6 | |
| 994 | #define FIRE_DLC_INT_RPTR_WDTH 5 | |
| 995 | ||
| 996 | #define FIRE_DLC_DMA_WPTR_WDTH 6 | |
| 997 | #define FIRE_DLC_PIO_WPTR_WDTH 5 | |
| 998 | ||
| 999 | //############################# | |
| 1000 | // Egress DOU Buffer Release | |
| 1001 | // From RMU to CLU | |
| 1002 | //############################# | |
| 1003 | ||
| 1004 | #define FIRE_DLC_DOU_REL_WDTH 5 | |
| 1005 | ||
| 1006 | //####################################### | |
| 1007 | // Egress DOU DMA Read Completion Buffer | |
| 1008 | // Status Record Portion k2y_dou_dptr | |
| 1009 | // From CLU to ILU | |
| 1010 | //####################################### | |
| 1011 | ||
| 1012 | #define FIRE_DLC_DOU_DPTR_WDTH 5 | |
| 1013 | #define FIRE_DLC_DOU_DPTR_DPTH 32 | |
| 1014 | ||
| 1015 | ||
| 1016 | //####################################### | |
| 1017 | // Debug Ports | |
| 1018 | // | |
| 1019 | //####################################### | |
| 1020 | #define FIRE_DLC_DEBUG_SEL_WDTH 6 | |
| 1021 | #define FIRE_DLC_DBG_SEL_BITS `FIRE_DLC_DEBUG_SEL_WDTH-1:0 | |
| 1022 | ||
| 1023 | ||
| 1024 | #endif | |
| 1025 |