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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ilu_peu.bind.vri | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #ifndef INC_ILU_PEU_BIND_VRI | |
36 | #define INC_ILU_PEU_BIND_VRI | |
37 | ||
38 | #include <vera_defines.vrh> | |
39 | #include "XactorClk.port.vri" | |
40 | #include "FNXPCIEXactorPorts.vri" | |
41 | #include "DMUXtrPorts.vri" | |
42 | #include "CCCXactor.port.vri" | |
43 | ||
44 | #include "denali_root_monitor_PCIEXactorPorts.vri" | |
45 | ||
46 | ////////////////// PCIE Bindings /////////////////////////////// | |
47 | bind XactorClk FNXPCIEClkPort { | |
48 | XClk if_ILU_PEU_PCIE.refclk; | |
49 | } | |
50 | ||
51 | bind FNXPCIEXactorDenaliClkPort FNXPCIEDenaliClkPortA { | |
52 | tx_clk if_ILU_PEU_PCIE_RX.refclk; | |
53 | rx_clk if_ILU_PEU_PCIE.DEN_CLK_RX; | |
54 | } | |
55 | ||
56 | bind FNXPCIEXactorMiscPort FNXPCIEXactorMiscPortA { | |
57 | clk if_ILU_PEU_PCIE_RX.refclk; | |
58 | denaliReset if_ILU_PEU_PCIE.DEN_RESET; | |
59 | rcvDetMode if_ILU_PEU_PCIE.RCV_DET_MODE; //Needed for FNX but not N2 | |
60 | rcvDetLanes if_ILU_PEU_PCIE.RCV_DET_LANES; //Needed for N2 | |
61 | elecIdleLanes if_ILU_PEU_PCIE.ELEC_IDLE_LANES; //Needed for N2 | |
62 | } | |
63 | ||
64 | ////////////////// denali Root monitor PCIE Bindings /////////////////////////////// | |
65 | ||
66 | bind XactorClk denali_root_monitor_PCIEClkPort { | |
67 | XClk if_denali_root_monitor_PCIE.refclk; | |
68 | } | |
69 | ||
70 | bind denali_root_monitor_PCIEXactorDenaliClkPort denali_root_monitor_PCIEDenaliClkPortA { | |
71 | tx_clk if_denali_root_monitor_PCIE.denali_root_monitor_CLK_TX; | |
72 | rx_clk if_denali_root_monitor_PCIE.denali_root_monitor_CLK_RX; | |
73 | } | |
74 | ||
75 | bind denali_root_monitor_PCIEXactorMiscPort denali_root_monitor_PCIEXactorMiscPortA { | |
76 | clk if_denali_root_monitor_PCIE.denali_root_monitor_CLK_TX; | |
77 | denaliReset if_denali_root_monitor_PCIE.denali_root_monitor_RESET; | |
78 | } | |
79 | ||
80 | ////////////////// DMUXtr Bindings /////////////////////////////// | |
81 | #ifndef PEU_GATE | |
82 | bind po_DMUegress bindDMUegress { | |
83 | deq if_ILU_PEU.y2k_rcd_deq; | |
84 | addr if_ILU_PEU.y2k_buf_addr; | |
85 | relrcd if_ILU_PEU.y2k_rel_rcd; | |
86 | relrcdenq if_ILU_PEU.y2k_rel_enq; | |
87 | #ifndef N2_FC | |
88 | recd if_ILU_PEU.k2y_rcd; | |
89 | enq if_ILU_PEU.k2y_rcd_enq; | |
90 | data if_ILU_PEU.k2y_buf_data; | |
91 | par if_ILU_PEU.k2y_buf_dpar; | |
92 | douvalid if_ILU_PEU.k2y_dou_vld; | |
93 | douaddr if_ILU_PEU.k2y_dou_dptr; | |
94 | douerr if_ILU_PEU.k2y_dou_err; | |
95 | #endif | |
96 | } | |
97 | #endif | |
98 | ||
99 | #ifndef PEU_GATE | |
100 | bind po_DMUingress bindDMUingress { | |
101 | recd if_ILU_PEU.y2k_rcd; | |
102 | enq if_ILU_PEU.y2k_rcd_enq; | |
103 | #ifndef N2_FC | |
104 | deq if_ILU_PEU.k2y_rcd_deq; | |
105 | data if_ILU_PEU.y2k_buf_data; | |
106 | par if_ILU_PEU.y2k_buf_dpar; | |
107 | addr if_ILU_PEU.k2y_buf_addr; | |
108 | relrcdenq if_ILU_PEU.k2y_rel_enq; | |
109 | relrcd if_ILU_PEU.k2y_rel_rcd; | |
110 | #endif | |
111 | } | |
112 | #endif | |
113 | ||
114 | #ifndef PEU_GATE | |
115 | bind po_DMUmisc bindDMUmisc { | |
116 | #ifndef N2_FC | |
117 | pwrOnRstN if_ILU_PEU.j2d_por_l; | |
118 | resetN if_ILU_PEU.j2d_rst_l; | |
119 | #endif | |
120 | int if_ILU_PEU.y2k_int_l; | |
121 | mps if_ILU_PEU.y2k_mps; | |
122 | drain if_ILU_PEU.p2d_drain; | |
123 | } | |
124 | #endif | |
125 | ||
126 | #ifndef PEU_GATE | |
127 | bind CCCXactorRingDataIn RingXactorDataInBind | |
128 | { | |
129 | clk if_ILU_PEU.iol2clk; | |
130 | ring_data_in if_ILU_PEU.k2y_csr_ring_out; | |
131 | } | |
132 | #endif | |
133 | ||
134 | #ifndef PEU_GATE | |
135 | bind CCCXactorRingDataOut RingXactorDataOutBind | |
136 | { | |
137 | clk if_ILU_PEU.iol2clk; | |
138 | ring_data_out if_ILU_PEU.y2k_csr_ring_in; | |
139 | } | |
140 | #endif | |
141 | ||
142 | #endif |