Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / niu_systemc.flist
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_systemc.flist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
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30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35+incdir+../../../verif/env/niu/verilog
36+incdir+../../../design/sys/iop/niu/rtl
37../../../design/sys/iop/niu/rtl/niu.v
38../../../design/sys/iop/niu/rtl/pcs.v
39../../../design/sys/iop/niu/rtl/pcs_decoder.v
40../../../design/sys/iop/niu/rtl/pcs_encoder.v
41../../../design/sys/iop/niu/rtl/pcs_lfsr.v
42../../../design/sys/iop/niu/rtl/pcs_link_config.v
43../../../design/sys/iop/niu/rtl/pcs_rx_ctrl.v
44../../../design/sys/iop/niu/rtl/pcs_rx_disparity.v
45../../../design/sys/iop/niu/rtl/pcs_rx_dpath.v
46../../../design/sys/iop/niu/rtl/pcs_sequence_detect.v
47../../../design/sys/iop/niu/rtl/pcs_slave.v
48../../../design/sys/iop/niu/rtl/pcs_tx_ctrl.v
49../../../design/sys/iop/niu/rtl/pcs_tx_disparity.v
50../../../design/sys/iop/niu/rtl/pcs_tx_dpath.v
51-v ../../../design/sys/iop/niu/rtl/lib.v
52-v ../../../libs/clk/rtl/clkgen_rdp_io2x.v
53-v ../../../libs/clk/n2_clk_pgrid_cust_l/n2_clk_rdp_io2x_cust/rtl/n2_clk_rdp_io2x_cust.v