projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: xmac_memory_map.vri | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | #include "neptune_memory_map.vri" | |
| 36 | ||
| 37 | #define XTxMAC_SW_RST ( 12'h000 <<1) // 2 bit w/self clear | |
| 38 | #define XRxMAC_SW_RST ( 12'h004 <<1) // 2 bit w/self clear | |
| 39 | #define XTxMAC_STATUS ( 12'h010 <<1) // 12 bit | |
| 40 | #define XRxMAC_STATUS ( 12'h014 <<1) // 16 bit | |
| 41 | #define XMAC_CTRL_STAT ( 12'h018 <<1) // 32 bit | |
| 42 | #define XTxMAC_STAT_MSK ( 12'h020 <<1) // 12 bit | |
| 43 | #define XRxMAC_STAT_MSK ( 12'h024 <<1) // 16 bit | |
| 44 | #define XMAC_C_S_MSK ( 12'h028 <<1) // 3 bit | |
| 45 | #define XMAC_CONFIG ( 12'h030 <<1) // 32 bit | |
| 46 | #define XMAC_IPG ( 12'h040 <<1) // 16 bit | |
| 47 | #define XMAC_MIN ( 12'h044 <<1) // 30 bit | |
| 48 | #define XMAC_MAX ( 12'h048 <<1) // 30 bit | |
| 49 | #define RxMAC_BT_CNT ( 12'h080 <<1) // 27 bit | |
| 50 | #define RxMAC_BC_FRM_CNT ( 12'h084 <<1) // 21 bit | |
| 51 | #define RxMAC_MC_FRM_CNT ( 12'h088 <<1) // 21 bit | |
| 52 | #define RxMAC_FRAG_CNT ( 12'h08c <<1) // 21 bit | |
| 53 | #define RxMAC_HIST_CNT1 ( 12'h090 <<1) // 21 bit | |
| 54 | #define RxMAC_HIST_CNT2 ( 12'h094 <<1) // 21 bit | |
| 55 | #define RxMAC_HIST_CNT3 ( 12'h098 <<1) // 20 bit | |
| 56 | #define RxMAC_HIST_CNT4 ( 12'h09c <<1) // 19 bit | |
| 57 | #define RxMAC_HIST_CNT5 ( 12'h0a0 <<1) // 18 bit | |
| 58 | #define RxMAC_HIST_CNT6 ( 12'h0a4 <<1) // 17 bit | |
| 59 | #define RxMAC_MPSZER_CNT ( 12'h0a8 <<1) // 8 bit | |
| 60 | #define MAC_CRC_ER_CNT ( 12'h0ac <<1) // 8 bit | |
| 61 | #define MAC_CD_VIO_CNT ( 12'h0b0 <<1) // 8 bit | |
| 62 | #define MAC_AL_ER_CNT ( 12'h0b4 <<1) // 8 bit | |
| 63 | #define TxMAC_FRM_CNT ( 12'h0b8 <<1) // 21 bit | |
| 64 | #define TxMAC_BYTE_CNT ( 12'h0bc <<1) // 27 bit | |
| 65 | #define LINK_FAULT_CNT ( 12'h0c0 <<1) // 27 bit | |
| 66 | #define RxMAC_HIST_CNT7 ( 12'h0c4 <<1) // 23 bit | |
| 67 | #define XMAC_SM_REG ( 12'h0d4 <<1) // 23 bit | |
| 68 | #define XMAC_ADDR0 ( 12'h050 <<1) // 16 bit | |
| 69 | #define XMAC_ADDR1 ( 12'h054 <<1) // 16 bit | |
| 70 | #define XMAC_ADDR2 ( 12'h058 <<1) // 16 bit | |
| 71 | #define XMAC_ADDR_CMPEN_LSB ( 12'h104 <<1) | |
| 72 | #define XMAC_ADDR_CMPEN_MSB ( 12'h108 <<1) | |
| 73 | #define XMAC_ADDR3 ( 12'h10C <<1) // 16 bit | |
| 74 | #define XMAC_ADDR4 ( 12'h110 <<1) // 16 bit | |
| 75 | #define XMAC_ADDR5 ( 12'h114 <<1) // 16 bit | |
| 76 | #define XMAC_ADDR6 ( 12'h118 <<1) // 16 bit | |
| 77 | #define XMAC_ADDR7 ( 12'h11C <<1) // 16 bit | |
| 78 | #define XMAC_ADDR8 ( 12'h120 <<1) // 16 bit | |
| 79 | #define XMAC_ADDR9 ( 12'h124 <<1) // 16 bit | |
| 80 | #define XMAC_ADDR10 ( 12'h128 <<1) // 16 bit | |
| 81 | #define XMAC_ADDR11 ( 12'h12C <<1) // 16 bit | |
| 82 | #define XMAC_ADDR12 ( 12'h130 <<1) // 16 bit | |
| 83 | #define XMAC_ADDR13 ( 12'h134 <<1) // 16 bit | |
| 84 | #define XMAC_ADDR14 ( 12'h138 <<1) // 16 bit | |
| 85 | #define XMAC_ADDR15 ( 12'h13C <<1) // 16 bit | |
| 86 | #define XMAC_ADDR16 ( 12'h140 <<1) // 16 bit | |
| 87 | #define XMAC_ADDR17 ( 12'h144 <<1) // 16 bit | |
| 88 | #define XMAC_ADDR18 ( 12'h148 <<1) // 16 bit | |
| 89 | #define XMAC_ADDR19 ( 12'h14C <<1) // 16 bit | |
| 90 | #define XMAC_ADDR20 ( 12'h150 <<1) // 16 bit | |
| 91 | #define XMAC_ADDR21 ( 12'h154 <<1) // 16 bit | |
| 92 | #define XMAC_ADDR22 ( 12'h158 <<1) // 16 bit | |
| 93 | #define XMAC_ADDR23 ( 12'h15C <<1) // 16 bit | |
| 94 | #define XMAC_ADDR24 ( 12'h160 <<1) // 16 bit | |
| 95 | #define XMAC_ADDR25 ( 12'h164 <<1) // 16 bit | |
| 96 | #define XMAC_ADDR26 ( 12'h168 <<1) // 16 bit | |
| 97 | #define XMAC_ADDR27 ( 12'h16C <<1) // 16 bit | |
| 98 | #define XMAC_ADDR28 ( 12'h170 <<1) // 16 bit | |
| 99 | #define XMAC_ADDR29 ( 12'h174 <<1) // 16 bit | |
| 100 | #define XMAC_ADDR30 ( 12'h178 <<1) // 16 bit | |
| 101 | #define XMAC_ADDR31 ( 12'h17C <<1) // 16 bit | |
| 102 | #define XMAC_ADDR32 ( 12'h180 <<1) // 16 bit | |
| 103 | #define XMAC_ADDR33 ( 12'h184 <<1) // 16 bit | |
| 104 | #define XMAC_ADDR34 ( 12'h188 <<1) // 16 bit | |
| 105 | #define XMAC_ADDR35 ( 12'h18C <<1) // 16 bit | |
| 106 | #define XMAC_ADDR36 ( 12'h190 <<1) // 16 bit | |
| 107 | #define XMAC_ADDR37 ( 12'h194 <<1) // 16 bit | |
| 108 | #define XMAC_ADDR38 ( 12'h198 <<1) // 16 bit | |
| 109 | #define XMAC_ADDR39 ( 12'h19C <<1) // 16 bit | |
| 110 | #define XMAC_ADDR40 ( 12'h1A0 <<1) // 16 bit | |
| 111 | #define XMAC_ADDR41 ( 12'h1A4 <<1) // 16 bit | |
| 112 | #define XMAC_ADDR42 ( 12'h1A8 <<1) // 16 bit | |
| 113 | #define XMAC_ADDR43 ( 12'h1AC <<1) // 16 bit | |
| 114 | #define XMAC_ADDR44 ( 12'h1B0 <<1) // 16 bit | |
| 115 | #define XMAC_ADDR45 ( 12'h1B4 <<1) // 16 bit | |
| 116 | #define XMAC_ADDR46 ( 12'h1B8 <<1) // 16 bit | |
| 117 | #define XMAC_ADDR47 ( 12'h1BC <<1) // 16 bit | |
| 118 | #define XMAC_ADDR48 ( 12'h1C0 <<1) // 16 bit | |
| 119 | #define XMAC_ADDR49 ( 12'h1C4 <<1) // 16 bit | |
| 120 | #define XMAC_ADDR50 ( 12'h1C8 <<1) // 16 bit | |
| 121 | #define XMAC_ADDR51 ( 12'h1CC <<1) // 16 bit | |
| 122 | #define XMAC_ADDR52 ( 12'h1D0 <<1) // 16 bit | |
| 123 | #define XMAC_ADDR53 ( 12'h1D4 <<1) // 16 bit | |
| 124 | #define XMAC_ADDR54 ( 12'h1D8 <<1) // 16 bit | |
| 125 | #define XMAC_ADDR55 ( 12'h1DC <<1) // 16 bit | |
| 126 | #define XMAC_ADDR56 ( 12'h1E0 <<1) // 16 bit | |
| 127 | #define XMAC_ADDR57 ( 12'h1E4 <<1) // 16 bit | |
| 128 | #define XMAC_ADDR58 ( 12'h1E8 <<1) // 16 bit | |
| 129 | #define XMAC_ADDR59 ( 12'h1EC <<1) // 16 bit | |
| 130 | #define XMAC_ADDR60 ( 12'h1F0 <<1) // 16 bit | |
| 131 | #define XMAC_ADDR61 ( 12'h1F4 <<1) // 16 bit | |
| 132 | #define XMAC_ADDR62 ( 12'h1F8 <<1) // 16 bit | |
| 133 | #define XMAC_ADDR63 ( 12'h1FC <<1) // 16 bit | |
| 134 | #define XMAC_ADDR64 ( 12'h200 <<1) // 16 bit | |
| 135 | #define XMAC_ADDR65 ( 12'h204 <<1) // 16 bit | |
| 136 | #define XMAC_ADDR66 ( 12'h208 <<1) // 16 bit | |
| 137 | #define XMAC_ADDR67 ( 12'h20C <<1) // 16 bit | |
| 138 | #define XMAC_ADDR68 ( 12'h210 <<1) // 16 bit | |
| 139 | #define XMAC_ADDR69 ( 12'h214 <<1) // 16 bit | |
| 140 | #define XMAC_ADDR70 ( 12'h218 <<1) // 16 bit | |
| 141 | #define XMAC_ADDR71 ( 12'h21C <<1) // 16 bit | |
| 142 | #define XMAC_ADDR72 ( 12'h220 <<1) // 16 bit | |
| 143 | #define XMAC_ADDR73 ( 12'h224 <<1) // 16 bit | |
| 144 | #define XMAC_ADDR74 ( 12'h228 <<1) // 16 bit | |
| 145 | #define XMAC_ADDR75 ( 12'h22C <<1) // 16 bit | |
| 146 | #define XMAC_ADDR76 ( 12'h230 <<1) // 16 bit | |
| 147 | #define XMAC_ADDR77 ( 12'h234 <<1) // 16 bit | |
| 148 | #define XMAC_ADDR78 ( 12'h238 <<1) // 16 bit | |
| 149 | #define XMAC_ADDR79 ( 12'h23C <<1) // 16 bit | |
| 150 | #define XMAC_ADDR80 ( 12'h240 <<1) // 16 bit | |
| 151 | #define XMAC_ADDR81 ( 12'h244 <<1) // 16 bit | |
| 152 | #define XMAC_ADDR82 ( 12'h248 <<1) // 16 bit | |
| 153 | #define XMAC_ADDR83 ( 12'h24C <<1) // 16 bit | |
| 154 | #define XMAC_ADDR84 ( 12'h250 <<1) // 16 bit | |
| 155 | #define XMAC_ADDR85 ( 12'h254 <<1) // 16 bit | |
| 156 | #define XMAC_ADDR86 ( 12'h258 <<1) // 16 bit | |
| 157 | #define XMAC_ADDR87 ( 12'h25C <<1) // 16 bit | |
| 158 | #define XMAC_ADDR88 ( 12'h260 <<1) // 16 bit | |
| 159 | #define XMAC_ADDR89 ( 12'h264 <<1) // 16 bit | |
| 160 | #define XMAC_ADDR90 ( 12'h268 <<1) // 16 bit | |
| 161 | #define XMAC_ADDR91 ( 12'h26C <<1) // 16 bit | |
| 162 | #define XMAC_ADDR92 ( 12'h270 <<1) // 16 bit | |
| 163 | #define XMAC_ADDR93 ( 12'h274 <<1) // 16 bit | |
| 164 | #define XMAC_ADDR94 ( 12'h278 <<1) // 16 bit | |
| 165 | #define XMAC_ADDR95 ( 12'h27C <<1) // 16 bit | |
| 166 | #define XMAC_ADDR96 ( 12'h280 <<1) // 16 bit | |
| 167 | #define XMAC_ADDR97 ( 12'h284 <<1) // 16 bit | |
| 168 | #define XMAC_ADDR98 ( 12'h288 <<1) // 16 bit | |
| 169 | #define XMAC_FC_ADDR0 ( 12'h134 <<1) // 16 bit | |
| 170 | #define XMAC_FC_ADDR1 ( 12'h138 <<1) // 16 bit | |
| 171 | #define XMAC_FC_ADDR2 ( 12'h13C <<1) // 16 bit | |
| 172 | #define XMAC_ADD_FILT0 ( 12'h40C <<1) // 16 bit | |
| 173 | #define XMAC_ADD_FILT1 ( 12'h410 <<1) // 16 bit | |
| 174 | #define XMAC_ADD_FILT2 ( 12'h414 <<1) // 16 bit | |
| 175 | #define XMAC_ADD_FILT12_MASK ( 12'h418 <<1) // 16 bit | |
| 176 | #define XMAC_ADD_FILT00_MASK ( 12'h41C <<1) // 16 bit | |
| 177 | #define XMAC_HASH_TBL0 ( 12'h420 <<1) // 16 bit | |
| 178 | #define XMAC_HASH_TBL1 ( 12'h424 <<1) // 16 bit | |
| 179 | #define XMAC_HASH_TBL2 ( 12'h428 <<1) // 16 bit | |
| 180 | #define XMAC_HASH_TBL3 ( 12'h42C <<1) // 16 bit | |
| 181 | #define XMAC_HASH_TBL4 ( 12'h430 <<1) // 16 bit | |
| 182 | #define XMAC_HASH_TBL5 ( 12'h434 <<1) // 16 bit | |
| 183 | #define XMAC_HASH_TBL6 ( 12'h438 <<1) // 16 bit | |
| 184 | #define XMAC_HASH_TBL7 ( 12'h43C <<1) // 16 bit | |
| 185 | #define XMAC_HASH_TBL8 ( 12'h440 <<1) // 16 bit | |
| 186 | #define XMAC_HASH_TBL9 ( 12'h444 <<1) // 16 bit | |
| 187 | #define XMAC_HASH_TBL10 ( 12'h448 <<1) // 16 bit | |
| 188 | #define XMAC_HASH_TBL11 ( 12'h44C <<1) // 16 bit | |
| 189 | #define XMAC_HASH_TBL12 ( 12'h450 <<1) // 16 bit | |
| 190 | #define XMAC_HASH_TBL13 ( 12'h454 <<1) // 16 bit | |
| 191 | #define XMAC_HASH_TBL14 ( 12'h458 <<1) // 16 bit | |
| 192 | #define XMAC_HASH_TBL15 ( 12'h45C <<1) // 16 bit | |
| 193 | #define XMAC_HOST_INFO0 ( 12'h480 <<1) // 16 bit | |
| 194 | #define XMAC_HOST_INFO1 ( 12'h484 <<1) // 16 bit | |
| 195 | #define XMAC_HOST_INFO2 ( 12'h488 <<1) // 16 bit | |
| 196 | #define XMAC_HOST_INFO3 ( 12'h48C <<1) // 16 bit | |
| 197 | #define XMAC_HOST_INFO4 ( 12'h490 <<1) // 16 bit | |
| 198 | #define XMAC_HOST_INFO5 ( 12'h494 <<1) // 16 bit | |
| 199 | #define XMAC_HOST_INFO6 ( 12'h498 <<1) // 16 bit | |
| 200 | #define XMAC_HOST_INFO7 ( 12'h49C <<1) // 16 bit | |
| 201 | #define XMAC_HOST_INFO8 ( 12'h4A0 <<1) // 16 bit | |
| 202 | #define XMAC_HOST_INFO9 ( 12'h4A4 <<1) // 16 bit | |
| 203 | #define XMAC_HOST_INFO10 ( 12'h4A8 <<1) // 16 bit | |
| 204 | #define XMAC_HOST_INFO11 ( 12'h4AC <<1) // 16 bit | |
| 205 | #define XMAC_HOST_INFO12 ( 12'h4B0 <<1) // 16 bit | |
| 206 | #define XMAC_HOST_INFO13 ( 12'h4B4 <<1) // 16 bit | |
| 207 | #define XMAC_HOST_INFO14 ( 12'h4B8 <<1) // 16 bit | |
| 208 | #define XMAC_HOST_INFO15 ( 12'h4BC <<1) // 16 bit | |
| 209 | #define XMAC_HOST_INFO16 ( 12'h4C0 <<1) // 16 bit | |
| 210 | #define XMAC_HOST_INFO17 ( 12'h4C4 <<1) // 16 bit | |
| 211 | #define XMAC_HOST_INFO18 ( 12'h4C8 <<1) // 16 bit | |
| 212 | #define XMAC_HOST_INFO19 ( 12'h4CC <<1) // 16 bit | |
| 213 | #define XMAC_HOST_INFO20 ( 12'h4D0 <<1) // 16 bit | |
| 214 | #define XMAC_HOST_INFO21 ( 12'h4D4 <<1) // 16 bit | |
| 215 | #define XMAC_HOST_INFO22 ( 12'h4D8 <<1) // 16 bit | |
| 216 | #define XMAC_HOST_INFO23 ( 12'h4DC <<1) // 16 bit | |
| 217 | #define XMAC_HOST_INFO24 ( 12'h4E0 <<1) // 16 bit | |
| 218 | #define XMAC_HOST_INFO25 ( 12'h4E4 <<1) // 16 bit | |
| 219 | #define XMAC_HOST_INFO26 ( 12'h4E8 <<1) // 16 bit | |
| 220 | #define XMAC_HOST_INFO27 ( 12'h4EC <<1) // 16 bit | |
| 221 | #define XMAC_HOST_INFO28 ( 12'h4F0 <<1) // 16 bit | |
| 222 | #define XMAC_HOST_INFO29 ( 12'h4F4 <<1) // 16 bit | |
| 223 | #define XMAC_HOST_INFO30 ( 12'h4F8 <<1) // 16 bit | |
| 224 | #define XMAC_HOST_INFO31 ( 12'h4FC <<1) // 16 bit | |
| 225 | #define XMAC_PA_DATA0 ( 12'h5C0 <<1) // 32 bit | |
| 226 | #define XMAC_PA_DATA1 ( 12'h5C4 <<1) // 32 bit | |
| 227 | #define XMAC_DEBUG_SEL ( 12'h5C8 <<1) // 32 bit | |
| 228 | #define XMAC_DEBUG_REG ( 12'h5CC <<1) // 32 bit | |
| 229 | ||
| 230 | ||
| 231 | ||
| 232 | ||
| 233 | #define XTxMAC_SW_RST_MASK ((1<<2)-1) | |
| 234 | #define XRxMAC_SW_RST_MASK ((1<<2)-1) | |
| 235 | ||
| 236 | #define XTxMAC_STATUS_MASK ((1<<12)-1) | |
| 237 | #define XRxMAC_STATUS_MASK ((1<<16)-1) | |
| 238 | #define XMAC_CTRL_STAT_MASK ((1<<16)-1) | |
| 239 | ||
| 240 | #define XTxMAC_STAT_MSK_MASK ((1<<12)-1) | |
| 241 | #define XRxMAC_STAT_MSK_MASK ((1<<16)-1) | |
| 242 | #define XMAC_C_S_MSK_MASK ((1<<3)-1) | |
| 243 | ||
| 244 | #define XMAC_CONFIG_MASK 32'h1f033fff | |
| 245 | #define XMAC_IPG_MASK ((1<<16)-1) | |
| 246 | ||
| 247 | #define XMAC_MIN_MASK ((1<<30)-1) | |
| 248 | #define XMAC_MAX_MASK 32'h3fff3fff | |
| 249 | ||
| 250 | ||
| 251 | #define RxMAC_BT_CNT_MASK ((1<<27)-1) | |
| 252 | #define RxMAC_BC_FRM_CNT_MASK ((1<<21)-1) | |
| 253 | #define RxMAC_MC_FRM_CNT_MASK ((1<<21)-1) | |
| 254 | #define RxMAC_FRAG_CNT_MASK ((1<<21)-1) | |
| 255 | #define RxMAC_HIST_CNT1_MASK ((1<<21)-1) | |
| 256 | #define RxMAC_HIST_CNT2_MASK ((1<<21)-1) | |
| 257 | #define RxMAC_HIST_CNT3_MASK ((1<<20)-1) | |
| 258 | #define RxMAC_HIST_CNT4_MASK ((1<<19)-1) | |
| 259 | #define RxMAC_HIST_CNT5_MASK ((1<<18)-1) | |
| 260 | #define RxMAC_HIST_CNT6_MASK ((1<<17)-1) | |
| 261 | #define RxMAC_MPSZER_CNT_MASK ((1<<8)-1) | |
| 262 | #define MAC_CRC_ER_CNT_MASK ((1<<8)-1) | |
| 263 | #define MAC_CD_VIO_CNT_MASK ((1<<8)-1) | |
| 264 | #define MAC_AL_ER_CNT_MASK ((1<<8)-1) | |
| 265 | #define TxMAC_FRM_CNT_MASK ((1<<21)-1) | |
| 266 | #define TxMAC_BYTE_CNT_MASK ((1<<27)-1) | |
| 267 | #define XMAC_SM_REG_MASK ((1<<23)-1) | |
| 268 | ||
| 269 | //#define XMAC_ADDR_CMPEN_LSB_MASK ((1<<32)-1) | |
| 270 | #define XMAC_ADDR_CMPEN_LSB_MASK ((1<<16)-1) | |
| 271 | #define XMAC_ADDR_CMPEN_MSB_MASK ((1<<32)-1) | |
| 272 | ||
| 273 | #define XMAC_ADDR0_MASK ((1<<16)-1) | |
| 274 | #define XMAC_ADDR1_MASK ((1<<16)-1) | |
| 275 | #define XMAC_ADDR2_MASK ((1<<16)-1) | |
| 276 | ||
| 277 | #define XMAC_ADDR3_MASK ((1<<16)-1) | |
| 278 | #define XMAC_ADDR4_MASK ((1<<16)-1) | |
| 279 | #define XMAC_ADDR5_MASK ((1<<16)-1) | |
| 280 | #define XMAC_ADDR6_MASK ((1<<16)-1) | |
| 281 | #define XMAC_ADDR7_MASK ((1<<16)-1) | |
| 282 | #define XMAC_ADDR8_MASK ((1<<16)-1) | |
| 283 | #define XMAC_ADDR9_MASK ((1<<16)-1) | |
| 284 | #define XMAC_ADDR10_MASK ((1<<16)-1) | |
| 285 | #define XMAC_ADDR11_MASK ((1<<16)-1) | |
| 286 | #define XMAC_ADDR12_MASK ((1<<16)-1) | |
| 287 | #define XMAC_ADDR13_MASK ((1<<16)-1) | |
| 288 | #define XMAC_ADDR14_MASK ((1<<16)-1) | |
| 289 | #define XMAC_ADDR15_MASK ((1<<16)-1) | |
| 290 | #define XMAC_ADDR16_MASK ((1<<16)-1) | |
| 291 | #define XMAC_ADDR17_MASK ((1<<16)-1) | |
| 292 | #define XMAC_ADDR18_MASK ((1<<16)-1) | |
| 293 | #define XMAC_ADDR19_MASK ((1<<16)-1) | |
| 294 | #define XMAC_ADDR20_MASK ((1<<16)-1) | |
| 295 | #define XMAC_ADDR21_MASK ((1<<16)-1) | |
| 296 | #define XMAC_ADDR22_MASK ((1<<16)-1) | |
| 297 | #define XMAC_ADDR23_MASK ((1<<16)-1) | |
| 298 | #define XMAC_ADDR24_MASK ((1<<16)-1) | |
| 299 | #define XMAC_ADDR25_MASK ((1<<16)-1) | |
| 300 | #define XMAC_ADDR26_MASK ((1<<16)-1) | |
| 301 | #define XMAC_ADDR27_MASK ((1<<16)-1) | |
| 302 | #define XMAC_ADDR28_MASK ((1<<16)-1) | |
| 303 | #define XMAC_ADDR29_MASK ((1<<16)-1) | |
| 304 | #define XMAC_ADDR30_MASK ((1<<16)-1) | |
| 305 | #define XMAC_ADDR31_MASK ((1<<16)-1) | |
| 306 | #define XMAC_ADDR32_MASK ((1<<16)-1) | |
| 307 | #define XMAC_ADDR33_MASK ((1<<16)-1) | |
| 308 | #define XMAC_ADDR34_MASK ((1<<16)-1) | |
| 309 | #define XMAC_ADDR35_MASK ((1<<16)-1) | |
| 310 | #define XMAC_ADDR36_MASK ((1<<16)-1) | |
| 311 | #define XMAC_ADDR37_MASK ((1<<16)-1) | |
| 312 | #define XMAC_ADDR38_MASK ((1<<16)-1) | |
| 313 | #define XMAC_ADDR39_MASK ((1<<16)-1) | |
| 314 | #define XMAC_ADDR40_MASK ((1<<16)-1) | |
| 315 | #define XMAC_ADDR41_MASK ((1<<16)-1) | |
| 316 | #define XMAC_ADDR42_MASK ((1<<16)-1) | |
| 317 | #define XMAC_ADDR43_MASK ((1<<16)-1) | |
| 318 | #define XMAC_ADDR44_MASK ((1<<16)-1) | |
| 319 | ||
| 320 | #define XMAC_ADDR45_MASK ((1<<16)-1) | |
| 321 | #define XMAC_ADDR46_MASK ((1<<16)-1) | |
| 322 | #define XMAC_ADDR47_MASK ((1<<16)-1) | |
| 323 | #define XMAC_ADDR48_MASK ((1<<16)-1) | |
| 324 | #define XMAC_ADDR49_MASK ((1<<16)-1) | |
| 325 | #define XMAC_ADDR50_MASK ((1<<16)-1) | |
| 326 | #define XMAC_ADDR51_MASK ((1<<16)-1) | |
| 327 | #define XMAC_ADDR52_MASK ((1<<16)-1) | |
| 328 | #define XMAC_ADDR53_MASK ((1<<16)-1) | |
| 329 | #define XMAC_ADDR54_MASK ((1<<16)-1) | |
| 330 | #define XMAC_ADDR55_MASK ((1<<16)-1) | |
| 331 | #define XMAC_ADDR56_MASK ((1<<16)-1) | |
| 332 | #define XMAC_ADDR57_MASK ((1<<16)-1) | |
| 333 | #define XMAC_ADDR58_MASK ((1<<16)-1) | |
| 334 | #define XMAC_ADDR59_MASK ((1<<16)-1) | |
| 335 | #define XMAC_ADDR60_MASK ((1<<16)-1) | |
| 336 | #define XMAC_ADDR61_MASK ((1<<16)-1) | |
| 337 | #define XMAC_ADDR62_MASK ((1<<16)-1) | |
| 338 | #define XMAC_ADDR63_MASK ((1<<16)-1) | |
| 339 | #define XMAC_ADDR64_MASK ((1<<16)-1) | |
| 340 | #define XMAC_ADDR65_MASK ((1<<16)-1) | |
| 341 | #define XMAC_ADDR66_MASK ((1<<16)-1) | |
| 342 | #define XMAC_ADDR67_MASK ((1<<16)-1) | |
| 343 | #define XMAC_ADDR68_MASK ((1<<16)-1) | |
| 344 | #define XMAC_ADDR69_MASK ((1<<16)-1) | |
| 345 | #define XMAC_ADDR70_MASK ((1<<16)-1) | |
| 346 | #define XMAC_ADDR71_MASK ((1<<16)-1) | |
| 347 | #define XMAC_ADDR72_MASK ((1<<16)-1) | |
| 348 | #define XMAC_ADDR73_MASK ((1<<16)-1) | |
| 349 | #define XMAC_ADDR74_MASK ((1<<16)-1) | |
| 350 | #define XMAC_ADDR75_MASK ((1<<16)-1) | |
| 351 | #define XMAC_ADDR76_MASK ((1<<16)-1) | |
| 352 | #define XMAC_ADDR77_MASK ((1<<16)-1) | |
| 353 | #define XMAC_ADDR78_MASK ((1<<16)-1) | |
| 354 | #define XMAC_ADDR79_MASK ((1<<16)-1) | |
| 355 | #define XMAC_ADDR80_MASK ((1<<16)-1) | |
| 356 | #define XMAC_ADDR81_MASK ((1<<16)-1) | |
| 357 | #define XMAC_ADDR82_MASK ((1<<16)-1) | |
| 358 | #define XMAC_ADDR83_MASK ((1<<16)-1) | |
| 359 | #define XMAC_ADDR84_MASK ((1<<16)-1) | |
| 360 | #define XMAC_ADDR85_MASK ((1<<16)-1) | |
| 361 | #define XMAC_ADDR86_MASK ((1<<16)-1) | |
| 362 | #define XMAC_ADDR87_MASK ((1<<16)-1) | |
| 363 | #define XMAC_ADDR88_MASK ((1<<16)-1) | |
| 364 | #define XMAC_ADDR89_MASK ((1<<16)-1) | |
| 365 | ||
| 366 | #define XMAC_ADDR90_MASK ((1<<16)-1) | |
| 367 | #define XMAC_ADDR91_MASK ((1<<16)-1) | |
| 368 | #define XMAC_ADDR92_MASK ((1<<16)-1) | |
| 369 | #define XMAC_ADDR93_MASK ((1<<16)-1) | |
| 370 | #define XMAC_ADDR94_MASK ((1<<16)-1) | |
| 371 | #define XMAC_ADDR95_MASK ((1<<16)-1) | |
| 372 | #define XMAC_ADDR96_MASK ((1<<16)-1) | |
| 373 | #define XMAC_ADDR97_MASK ((1<<16)-1) | |
| 374 | #define XMAC_ADDR98_MASK ((1<<16)-1) | |
| 375 | ||
| 376 | ||
| 377 | #define XMAC_FC_ADDR0_MASK ((1<<16)-1) | |
| 378 | #define XMAC_FC_ADDR1_MASK ((1<<16)-1) | |
| 379 | #define XMAC_FC_ADDR2_MASK ((1<<16)-1) | |
| 380 | ||
| 381 | #define XMAC_ADD_FILT0_MASK ((1<<16)-1) | |
| 382 | #define XMAC_ADD_FILT1_MASK ((1<<16)-1) | |
| 383 | #define XMAC_ADD_FILT2_MASK ((1<<16)-1) | |
| 384 | #define XMAC_ADD_FILT12_MASK_MASK ((1<<8)-1) | |
| 385 | #define XMAC_ADD_FILT00_MASK_MASK ((1<<16)-1) | |
| 386 | ||
| 387 | #define XMAC_HASH_TBL0_MASK ((1<<16)-1) | |
| 388 | #define XMAC_HASH_TBL1_MASK ((1<<16)-1) | |
| 389 | #define XMAC_HASH_TBL2_MASK ((1<<16)-1) | |
| 390 | #define XMAC_HASH_TBL3_MASK ((1<<16)-1) | |
| 391 | #define XMAC_HASH_TBL4_MASK ((1<<16)-1) | |
| 392 | #define XMAC_HASH_TBL5_MASK ((1<<16)-1) | |
| 393 | #define XMAC_HASH_TBL6_MASK ((1<<16)-1) | |
| 394 | #define XMAC_HASH_TBL7_MASK ((1<<16)-1) | |
| 395 | #define XMAC_HASH_TBL8_MASK ((1<<16)-1) | |
| 396 | #define XMAC_HASH_TBL9_MASK ((1<<16)-1) | |
| 397 | #define XMAC_HASH_TBL10_MASK ((1<<16)-1) | |
| 398 | #define XMAC_HASH_TBL11_MASK ((1<<16)-1) | |
| 399 | #define XMAC_HASH_TBL12_MASK ((1<<16)-1) | |
| 400 | #define XMAC_HASH_TBL13_MASK ((1<<16)-1) | |
| 401 | #define XMAC_HASH_TBL14_MASK ((1<<16)-1) | |
| 402 | #define XMAC_HASH_TBL15_MASK ((1<<16)-1) | |
| 403 | ||
| 404 | #define XMAC_HOST_INFO0_MASK ((1<<21)-1) | |
| 405 | #define XMAC_HOST_INFO1_MASK ((1<<21)-1) | |
| 406 | #define XMAC_HOST_INFO2_MASK ((1<<21)-1) | |
| 407 | #define XMAC_HOST_INFO3_MASK ((1<<21)-1) | |
| 408 | #define XMAC_HOST_INFO4_MASK ((1<<21)-1) | |
| 409 | #define XMAC_HOST_INFO5_MASK ((1<<21)-1) | |
| 410 | #define XMAC_HOST_INFO6_MASK ((1<<21)-1) | |
| 411 | #define XMAC_HOST_INFO7_MASK ((1<<21)-1) | |
| 412 | #define XMAC_HOST_INFO8_MASK ((1<<21)-1) | |
| 413 | #define XMAC_HOST_INFO9_MASK ((1<<21)-1) | |
| 414 | #define XMAC_HOST_INFO10_MASK ((1<<21)-1) | |
| 415 | #define XMAC_HOST_INFO11_MASK ((1<<21)-1) | |
| 416 | #define XMAC_HOST_INFO12_MASK ((1<<21)-1) | |
| 417 | #define XMAC_HOST_INFO13_MASK ((1<<21)-1) | |
| 418 | #define XMAC_HOST_INFO14_MASK ((1<<21)-1) | |
| 419 | #define XMAC_HOST_INFO15_MASK ((1<<21)-1) | |
| 420 | #define XMAC_HOST_INFO16_MASK ((1<<21)-1) | |
| 421 | #define XMAC_HOST_INFO17_MASK ((1<<21)-1) | |
| 422 | #define XMAC_HOST_INFO18_MASK ((1<<21)-1) | |
| 423 | #define XMAC_HOST_INFO19_MASK ((1<<21)-1) | |
| 424 | #define XMAC_HOST_INFO20_MASK ((1<<21)-1) | |
| 425 | #define XMAC_HOST_INFO21_MASK ((1<<21)-1) | |
| 426 | #define XMAC_HOST_INFO22_MASK ((1<<21)-1) | |
| 427 | #define XMAC_HOST_INFO23_MASK ((1<<21)-1) | |
| 428 | #define XMAC_HOST_INFO24_MASK ((1<<21)-1) | |
| 429 | #define XMAC_HOST_INFO25_MASK ((1<<21)-1) | |
| 430 | #define XMAC_HOST_INFO26_MASK ((1<<21)-1) | |
| 431 | #define XMAC_HOST_INFO27_MASK ((1<<21)-1) | |
| 432 | #define XMAC_HOST_INFO28_MASK ((1<<21)-1) | |
| 433 | #define XMAC_HOST_INFO29_MASK ((1<<21)-1) | |
| 434 | #define XMAC_HOST_INFO30_MASK ((1<<21)-1) | |
| 435 | #define XMAC_HOST_INFO31_MASK ((1<<21)-1) | |
| 436 | ||
| 437 | ||
| 438 | ||
| 439 | #define XTxMAC_SW_RST_DEFAULT 32'h00000001 | |
| 440 | #define XRxMAC_SW_RST_DEFAULT 32'h00000001 | |
| 441 | ||
| 442 | #define XTxMAC_STATUS_DEFAULT 32'h00000000 | |
| 443 | #define XRxMAC_STATUS_DEFAULT 32'h00000000 | |
| 444 | #define XMAC_CTRL_STAT_DEFAULT 32'h00000000 | |
| 445 | ||
| 446 | #define XTxMAC_STAT_MSK_DEFAULT 32'hxxxxx3ff | |
| 447 | #define XRxMAC_STAT_MSK_DEFAULT 32'hxxxxffff | |
| 448 | #define XMAC_C_S_MSK_DEFAULT 32'hxxxxxxx7 | |
| 449 | ||
| 450 | #define XMAC_CONFIG_DEFAULT 32'h00000000 | |
| 451 | #define XMAC_IPG_DEFAULT 32'hxxxxxxxx | |
| 452 | ||
| 453 | #define XMAC_MIN_DEFAULT 32'hxxxxxxxx | |
| 454 | #define XMAC_MAX_DEFAULT 32'hxxxxxxxx | |
| 455 | ||
| 456 | #define XMAC_ADDR_CMPEN_LSB_DEFAULT 32'hxxxxxxxx | |
| 457 | #define XMAC_ADDR_CMPEN_MSB_DEFAULT 32'hxxxxxxxx | |
| 458 | ||
| 459 | #define XMAC_ADDR0_DEFAULT 32'hxxxxxxxx | |
| 460 | #define XMAC_ADDR1_DEFAULT 32'hxxxxxxxx | |
| 461 | #define XMAC_ADDR2_DEFAULT 32'hxxxxxxxx | |
| 462 | ||
| 463 | #define XMAC_ADDR3_DEFAULT 32'hxxxx_xxxx | |
| 464 | #define XMAC_ADDR4_DEFAULT 32'hxxxx_xxxx | |
| 465 | #define XMAC_ADDR5_DEFAULT 32'hxxxx_xxxx | |
| 466 | #define XMAC_ADDR6_DEFAULT 32'hxxxx_xxxx | |
| 467 | #define XMAC_ADDR7_DEFAULT 32'hxxxx_xxxx | |
| 468 | #define XMAC_ADDR8_DEFAULT 32'hxxxx_xxxx | |
| 469 | #define XMAC_ADDR9_DEFAULT 32'hxxxx_xxxx | |
| 470 | #define XMAC_ADDR10_DEFAULT 32'hxxxx_xxxx | |
| 471 | #define XMAC_ADDR11_DEFAULT 32'hxxxx_xxxx | |
| 472 | #define XMAC_ADDR12_DEFAULT 32'hxxxx_xxxx | |
| 473 | #define XMAC_ADDR13_DEFAULT 32'hxxxx_xxxx | |
| 474 | #define XMAC_ADDR14_DEFAULT 32'hxxxx_xxxx | |
| 475 | #define XMAC_ADDR15_DEFAULT 32'hxxxx_xxxx | |
| 476 | #define XMAC_ADDR16_DEFAULT 32'hxxxx_xxxx | |
| 477 | #define XMAC_ADDR17_DEFAULT 32'hxxxx_xxxx | |
| 478 | #define XMAC_ADDR18_DEFAULT 32'hxxxx_xxxx | |
| 479 | #define XMAC_ADDR19_DEFAULT 32'hxxxx_xxxx | |
| 480 | #define XMAC_ADDR20_DEFAULT 32'hxxxx_xxxx | |
| 481 | #define XMAC_ADDR21_DEFAULT 32'hxxxx_xxxx | |
| 482 | #define XMAC_ADDR22_DEFAULT 32'hxxxx_xxxx | |
| 483 | #define XMAC_ADDR23_DEFAULT 32'hxxxx_xxxx | |
| 484 | #define XMAC_ADDR24_DEFAULT 32'hxxxx_xxxx | |
| 485 | #define XMAC_ADDR25_DEFAULT 32'hxxxx_xxxx | |
| 486 | #define XMAC_ADDR26_DEFAULT 32'hxxxx_xxxx | |
| 487 | #define XMAC_ADDR27_DEFAULT 32'hxxxx_xxxx | |
| 488 | #define XMAC_ADDR28_DEFAULT 32'hxxxx_xxxx | |
| 489 | #define XMAC_ADDR29_DEFAULT 32'hxxxx_xxxx | |
| 490 | #define XMAC_ADDR30_DEFAULT 32'hxxxx_xxxx | |
| 491 | #define XMAC_ADDR31_DEFAULT 32'hxxxx_xxxx | |
| 492 | #define XMAC_ADDR32_DEFAULT 32'hxxxx_xxxx | |
| 493 | #define XMAC_ADDR33_DEFAULT 32'hxxxx_xxxx | |
| 494 | #define XMAC_ADDR34_DEFAULT 32'hxxxx_xxxx | |
| 495 | #define XMAC_ADDR35_DEFAULT 32'hxxxx_xxxx | |
| 496 | #define XMAC_ADDR36_DEFAULT 32'hxxxx_xxxx | |
| 497 | #define XMAC_ADDR37_DEFAULT 32'hxxxx_xxxx | |
| 498 | #define XMAC_ADDR38_DEFAULT 32'hxxxx_xxxx | |
| 499 | #define XMAC_ADDR39_DEFAULT 32'hxxxx_xxxx | |
| 500 | #define XMAC_ADDR40_DEFAULT 32'hxxxx_xxxx | |
| 501 | #define XMAC_ADDR41_DEFAULT 32'hxxxx_xxxx | |
| 502 | #define XMAC_ADDR42_DEFAULT 32'hxxxx_xxxx | |
| 503 | #define XMAC_ADDR43_DEFAULT 32'hxxxx_xxxx | |
| 504 | #define XMAC_ADDR44_DEFAULT 32'hxxxx_xxxx | |
| 505 | ||
| 506 | #define XMAC_ADDR45_DEFAULT 32'hxxxx_xxxx | |
| 507 | #define XMAC_ADDR46_DEFAULT 32'hxxxx_xxxx | |
| 508 | #define XMAC_ADDR47_DEFAULT 32'hxxxx_xxxx | |
| 509 | #define XMAC_ADDR48_DEFAULT 32'hxxxx_xxxx | |
| 510 | #define XMAC_ADDR49_DEFAULT 32'hxxxx_xxxx | |
| 511 | #define XMAC_ADDR50_DEFAULT 32'hxxxx_xxxx | |
| 512 | #define XMAC_ADDR51_DEFAULT 32'hxxxx_xxxx | |
| 513 | #define XMAC_ADDR52_DEFAULT 32'hxxxx_xxxx | |
| 514 | #define XMAC_ADDR53_DEFAULT 32'hxxxx_xxxx | |
| 515 | #define XMAC_ADDR54_DEFAULT 32'hxxxx_xxxx | |
| 516 | #define XMAC_ADDR55_DEFAULT 32'hxxxx_xxxx | |
| 517 | #define XMAC_ADDR56_DEFAULT 32'hxxxx_xxxx | |
| 518 | #define XMAC_ADDR57_DEFAULT 32'hxxxx_xxxx | |
| 519 | #define XMAC_ADDR58_DEFAULT 32'hxxxx_xxxx | |
| 520 | #define XMAC_ADDR59_DEFAULT 32'hxxxx_xxxx | |
| 521 | #define XMAC_ADDR60_DEFAULT 32'hxxxx_xxxx | |
| 522 | #define XMAC_ADDR61_DEFAULT 32'hxxxx_xxxx | |
| 523 | #define XMAC_ADDR62_DEFAULT 32'hxxxx_xxxx | |
| 524 | #define XMAC_ADDR63_DEFAULT 32'hxxxx_xxxx | |
| 525 | #define XMAC_ADDR64_DEFAULT 32'hxxxx_xxxx | |
| 526 | #define XMAC_ADDR65_DEFAULT 32'hxxxx_xxxx | |
| 527 | #define XMAC_ADDR66_DEFAULT 32'hxxxx_xxxx | |
| 528 | #define XMAC_ADDR67_DEFAULT 32'hxxxx_xxxx | |
| 529 | #define XMAC_ADDR68_DEFAULT 32'hxxxx_xxxx | |
| 530 | #define XMAC_ADDR69_DEFAULT 32'hxxxx_xxxx | |
| 531 | #define XMAC_ADDR70_DEFAULT 32'hxxxx_xxxx | |
| 532 | #define XMAC_ADDR71_DEFAULT 32'hxxxx_xxxx | |
| 533 | #define XMAC_ADDR72_DEFAULT 32'hxxxx_xxxx | |
| 534 | #define XMAC_ADDR73_DEFAULT 32'hxxxx_xxxx | |
| 535 | #define XMAC_ADDR74_DEFAULT 32'hxxxx_xxxx | |
| 536 | #define XMAC_ADDR75_DEFAULT 32'hxxxx_xxxx | |
| 537 | #define XMAC_ADDR76_DEFAULT 32'hxxxx_xxxx | |
| 538 | #define XMAC_ADDR77_DEFAULT 32'hxxxx_xxxx | |
| 539 | #define XMAC_ADDR78_DEFAULT 32'hxxxx_xxxx | |
| 540 | #define XMAC_ADDR79_DEFAULT 32'hxxxx_xxxx | |
| 541 | #define XMAC_ADDR80_DEFAULT 32'hxxxx_xxxx | |
| 542 | #define XMAC_ADDR81_DEFAULT 32'hxxxx_xxxx | |
| 543 | #define XMAC_ADDR82_DEFAULT 32'hxxxx_xxxx | |
| 544 | #define XMAC_ADDR83_DEFAULT 32'hxxxx_xxxx | |
| 545 | #define XMAC_ADDR84_DEFAULT 32'hxxxx_xxxx | |
| 546 | #define XMAC_ADDR85_DEFAULT 32'hxxxx_xxxx | |
| 547 | #define XMAC_ADDR86_DEFAULT 32'hxxxx_xxxx | |
| 548 | #define XMAC_ADDR87_DEFAULT 32'hxxxx_xxxx | |
| 549 | #define XMAC_ADDR88_DEFAULT 32'hxxxx_xxxx | |
| 550 | #define XMAC_ADDR89_DEFAULT 32'hxxxx_xxxx | |
| 551 | ||
| 552 | #define XMAC_ADDR90_DEFAULT 32'hxxxx_xxxx | |
| 553 | #define XMAC_ADDR91_DEFAULT 32'hxxxx_xxxx | |
| 554 | #define XMAC_ADDR92_DEFAULT 32'hxxxx_xxxx | |
| 555 | #define XMAC_ADDR93_DEFAULT 32'hxxxx_xxxx | |
| 556 | #define XMAC_ADDR94_DEFAULT 32'hxxxx_xxxx | |
| 557 | #define XMAC_ADDR95_DEFAULT 32'hxxxx_xxxx | |
| 558 | #define XMAC_ADDR96_DEFAULT 32'hxxxx_xxxx | |
| 559 | #define XMAC_ADDR97_DEFAULT 32'hxxxx_xxxx | |
| 560 | #define XMAC_ADDR98_DEFAULT 32'hxxxx_xxxx | |
| 561 | ||
| 562 | ||
| 563 | #define XMAC_FC_ADDR0_DEFAULT 32'hxxxx_xxxx | |
| 564 | #define XMAC_FC_ADDR1_DEFAULT 32'hxxxx_xxxx | |
| 565 | #define XMAC_FC_ADDR2_DEFAULT 32'hxxxx_xxxx | |
| 566 | ||
| 567 | ||
| 568 | #define XMAC_ADD_FILT0_DEFAULT 32'hxxxx_xxxx | |
| 569 | #define XMAC_ADD_FILT1_DEFAULT 32'hxxxx_xxxx | |
| 570 | #define XMAC_ADD_FILT2_DEFAULT 32'hxxxx_xxxx | |
| 571 | #define XMAC_ADD_FILT12_MASK_DEFAULT 32'hxxxx_xxxx | |
| 572 | #define XMAC_ADD_FILT00_MASK_DEFAULT 32'hxxxx_xxxx | |
| 573 | ||
| 574 | ||
| 575 | #define XMAC_HASH_TBL0_DEFAULT 32'hxxxx_xxxx | |
| 576 | #define XMAC_HASH_TBL1_DEFAULT 32'hxxxx_xxxx | |
| 577 | #define XMAC_HASH_TBL2_DEFAULT 32'hxxxx_xxxx | |
| 578 | #define XMAC_HASH_TBL3_DEFAULT 32'hxxxx_xxxx | |
| 579 | #define XMAC_HASH_TBL4_DEFAULT 32'hxxxx_xxxx | |
| 580 | #define XMAC_HASH_TBL5_DEFAULT 32'hxxxx_xxxx | |
| 581 | #define XMAC_HASH_TBL6_DEFAULT 32'hxxxx_xxxx | |
| 582 | #define XMAC_HASH_TBL7_DEFAULT 32'hxxxx_xxxx | |
| 583 | #define XMAC_HASH_TBL8_DEFAULT 32'hxxxx_xxxx | |
| 584 | #define XMAC_HASH_TBL9_DEFAULT 32'hxxxx_xxxx | |
| 585 | #define XMAC_HASH_TBL10_DEFAULT 32'hxxxx_xxxx | |
| 586 | #define XMAC_HASH_TBL11_DEFAULT 32'hxxxx_xxxx | |
| 587 | #define XMAC_HASH_TBL12_DEFAULT 32'hxxxx_xxxx | |
| 588 | #define XMAC_HASH_TBL13_DEFAULT 32'hxxxx_xxxx | |
| 589 | #define XMAC_HASH_TBL14_DEFAULT 32'hxxxx_xxxx | |
| 590 | #define XMAC_HASH_TBL15_DEFAULT 32'hxxxx_xxxx | |
| 591 | ||
| 592 | #define XMAC_HOST_INFO0_DEFAULT 32'hxxxx_xxxx | |
| 593 | #define XMAC_HOST_INFO1_DEFAULT 32'hxxxx_xxxx | |
| 594 | #define XMAC_HOST_INFO2_DEFAULT 32'hxxxx_xxxx | |
| 595 | #define XMAC_HOST_INFO3_DEFAULT 32'hxxxx_xxxx | |
| 596 | #define XMAC_HOST_INFO4_DEFAULT 32'hxxxx_xxxx | |
| 597 | #define XMAC_HOST_INFO5_DEFAULT 32'hxxxx_xxxx | |
| 598 | #define XMAC_HOST_INFO6_DEFAULT 32'hxxxx_xxxx | |
| 599 | #define XMAC_HOST_INFO7_DEFAULT 32'hxxxx_xxxx | |
| 600 | #define XMAC_HOST_INFO8_DEFAULT 32'hxxxx_xxxx | |
| 601 | #define XMAC_HOST_INFO9_DEFAULT 32'hxxxx_xxxx | |
| 602 | #define XMAC_HOST_INFO10_DEFAULT 32'hxxxx_xxxx | |
| 603 | #define XMAC_HOST_INFO11_DEFAULT 32'hxxxx_xxxx | |
| 604 | #define XMAC_HOST_INFO12_DEFAULT 32'hxxxx_xxxx | |
| 605 | #define XMAC_HOST_INFO13_DEFAULT 32'hxxxx_xxxx | |
| 606 | #define XMAC_HOST_INFO14_DEFAULT 32'hxxxx_xxxx | |
| 607 | #define XMAC_HOST_INFO15_DEFAULT 32'hxxxx_xxxx | |
| 608 | #define XMAC_HOST_INFO16_DEFAULT 32'hxxxx_xxxx | |
| 609 | #define XMAC_HOST_INFO17_DEFAULT 32'hxxxx_xxxx | |
| 610 | #define XMAC_HOST_INFO18_DEFAULT 32'hxxxx_xxxx | |
| 611 | #define XMAC_HOST_INFO19_DEFAULT 32'hxxxx_xxxx | |
| 612 | #define XMAC_HOST_INFO20_DEFAULT 32'hxxxx_xxxx | |
| 613 | #define XMAC_HOST_INFO21_DEFAULT 32'hxxxx_xxxx | |
| 614 | #define XMAC_HOST_INFO22_DEFAULT 32'hxxxx_xxxx | |
| 615 | #define XMAC_HOST_INFO23_DEFAULT 32'hxxxx_xxxx | |
| 616 | #define XMAC_HOST_INFO24_DEFAULT 32'hxxxx_xxxx | |
| 617 | #define XMAC_HOST_INFO25_DEFAULT 32'hxxxx_xxxx | |
| 618 | #define XMAC_HOST_INFO26_DEFAULT 32'hxxxx_xxxx | |
| 619 | #define XMAC_HOST_INFO27_DEFAULT 32'hxxxx_xxxx | |
| 620 | #define XMAC_HOST_INFO28_DEFAULT 32'hxxxx_xxxx | |
| 621 | #define XMAC_HOST_INFO29_DEFAULT 32'hxxxx_xxxx | |
| 622 | #define XMAC_HOST_INFO30_DEFAULT 32'hxxxx_xxxx | |
| 623 | #define XMAC_HOST_INFO31_DEFAULT 32'hxxxx_xxxx | |
| 624 | ||
| 625 | ||
| 626 | #define RxMAC_BT_CNT_DEFAULT 32'hxxxxxxxx | |
| 627 | #define RxMAC_BC_FRM_CNT_DEFAULT 32'hxxxxxxxx | |
| 628 | #define RxMAC_MC_FRM_CNT_DEFAULT 32'hxxxxxxxx | |
| 629 | #define RxMAC_FRAG_CNT_DEFAULT 32'hxxxxxxxx | |
| 630 | #define RxMAC_HIST_CNT1_DEFAULT 32'hxxxxxxxx | |
| 631 | #define RxMAC_HIST_CNT2_DEFAULT 32'hxxxxxxxx | |
| 632 | #define RxMAC_HIST_CNT3_DEFAULT 32'hxxxxxxxx | |
| 633 | #define RxMAC_HIST_CNT4_DEFAULT 32'hxxxxxxxx | |
| 634 | #define RxMAC_HIST_CNT5_DEFAULT 32'hxxxxxxxx | |
| 635 | #define RxMAC_HIST_CNT6_DEFAULT 32'hxxxxxxxx | |
| 636 | #define RxMAC_MPSZER_CNT_DEFAULT 32'hxxxxxxxx | |
| 637 | #define MAC_CRC_ER_CNT_DEFAULT 32'hxxxxxxxx | |
| 638 | #define MAC_CD_VIO_CNT_DEFAULT 32'hxxxxxxxx | |
| 639 | #define MAC_AL_ER_CNT_DEFAULT 32'hxxxxxxxx | |
| 640 | #define TxMAC_FRM_CNT_DEFAULT 32'hxxxxxxxx | |
| 641 | #define TxMAC_BYTE_CNT_DEFAULT 32'hxxxxxxxx | |
| 642 | #define XMAC_SM_REG_DEFAULT 32'hxxxx0000 | |
| 643 | ||
| 644 | ||
| 645 | // | |
| 646 | // BASE Address | |
| 647 | // | |
| 648 | #define MAC0_BASE (MAC_ADDRESS_RANGE + PORT_0_RANGE) | |
| 649 | #define MAC1_BASE (MAC_ADDRESS_RANGE + PORT_1_RANGE) | |
| 650 | #define MAC2_BASE (MAC_ADDRESS_RANGE + PORT_2_RANGE) | |
| 651 | #define MAC3_BASE (MAC_ADDRESS_RANGE + PORT_3_RANGE) | |
| 652 |