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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / vera / niu_utils / get_mbox_id.vr
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: get_mbox_id.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include "mbox_defines.vri"
36#include "mbox_class.vrh"
37
38extern mbox_class mbox_id;
39
40extern integer mac_config1[4], mac_config0[4];
41extern integer ipp_config1[4], ipp_config0[4];
42// extern integer ntx_config1, ntx_config0;
43
44task get_mbox_id(
45 // driver/chkr that needs to know which mailbox to read from
46 // in order to execute the desired functionality
47 bit [ 7:0] who_ami,
48
49 // port_num of the driver/chkr. In case of multiple
50 // mailboxes to be read from multiple accesses must be
51 // made to this task.
52 integer port_num,
53
54 var integer use_mbox_id
55 ) {
56
57 integer n;
58 bit [1:0] mac_instan[4];
59 bit [1:0] ipp_instan[4];
60 bit [1:0] ntx_instan;
61
62 //
63 // The following determines if a driver module is required by the
64 // environment.
65 for(n=0;n<4;n++) {
66 ipp_instan[n] = {ipp_config1[n], ipp_config0[n]};
67 mac_instan[n] = {mac_config1[n], mac_config0[n]};
68 }
69
70 // ntx_instan = {ntx_config1, ntx_config0};
71 ntx_instan = 2'b01;
72
73 use_mbox_id = -1;
74
75 //
76 // The case statement will determine which mailbox a driver or
77 // checker should read from in order to execute the appropriate
78 // functionality.
79 case(who_ami) {
80
81 IAM_MAC_IPP_CHKR : use_mbox_id = mbox_id.pg_mb[port_num];
82 IAM_IPP_DMC_CHKR : use_mbox_id = mbox_id.mac_ipp[port_num];
83 IAM_RDMC_WR_CHKR : use_mbox_id = mbox_id.rx_dma_mb[port_num];
84
85 #ifdef VEGA_CHIP_LEVEL
86 IAM_NTX_MAC_CHKR : use_mbox_id = mbox_id.chk_ntx_mac[port_num];
87 #else
88 IAM_NTX_MAC_CHKR : use_mbox_id = mbox_id.chk_opp_mac[port_num];
89 #endif
90
91
92 // neptune and niu related tx path mailboxes
93 IAM_TXC_DMA0_MBOX : use_mbox_id = mbox_id.tx_dma_mb[0];
94 IAM_TXC_DMA1_MBOX : use_mbox_id = mbox_id.tx_dma_mb[1];
95 IAM_TXC_DMA2_MBOX : use_mbox_id = mbox_id.tx_dma_mb[2];
96 IAM_TXC_DMA3_MBOX : use_mbox_id = mbox_id.tx_dma_mb[3];
97 IAM_TXC_DMA4_MBOX : use_mbox_id = mbox_id.tx_dma_mb[4];
98 IAM_TXC_DMA5_MBOX : use_mbox_id = mbox_id.tx_dma_mb[5];
99 IAM_TXC_DMA6_MBOX : use_mbox_id = mbox_id.tx_dma_mb[6];
100 IAM_TXC_DMA7_MBOX : use_mbox_id = mbox_id.tx_dma_mb[7];
101 IAM_TXC_DMA8_MBOX : use_mbox_id = mbox_id.tx_dma_mb[8];
102 IAM_TXC_DMA9_MBOX : use_mbox_id = mbox_id.tx_dma_mb[9];
103 IAM_TXC_DMA10_MBOX : use_mbox_id = mbox_id.tx_dma_mb[10];
104 IAM_TXC_DMA11_MBOX : use_mbox_id = mbox_id.tx_dma_mb[11];
105 IAM_TXC_DMA12_MBOX : use_mbox_id = mbox_id.tx_dma_mb[12];
106 IAM_TXC_DMA13_MBOX : use_mbox_id = mbox_id.tx_dma_mb[13];
107 IAM_TXC_DMA14_MBOX : use_mbox_id = mbox_id.tx_dma_mb[14];
108 IAM_TXC_DMA15_MBOX : use_mbox_id = mbox_id.tx_dma_mb[15];
109 IAM_TXC_DMA16_MBOX : use_mbox_id = mbox_id.tx_dma_mb[16];
110 IAM_TXC_DMA17_MBOX : use_mbox_id = mbox_id.tx_dma_mb[17];
111 IAM_TXC_DMA18_MBOX : use_mbox_id = mbox_id.tx_dma_mb[18];
112 IAM_TXC_DMA19_MBOX : use_mbox_id = mbox_id.tx_dma_mb[19];
113 IAM_TXC_DMA20_MBOX : use_mbox_id = mbox_id.tx_dma_mb[20];
114 IAM_TXC_DMA21_MBOX : use_mbox_id = mbox_id.tx_dma_mb[21];
115 IAM_TXC_DMA22_MBOX : use_mbox_id = mbox_id.tx_dma_mb[22];
116 IAM_TXC_DMA23_MBOX : use_mbox_id = mbox_id.tx_dma_mb[23];
117 IAM_TXC_DMA24_MBOX : use_mbox_id = mbox_id.tx_dma_mb[24];
118 IAM_TXC_DMA25_MBOX : use_mbox_id = mbox_id.tx_dma_mb[25];
119 IAM_TXC_DMA26_MBOX : use_mbox_id = mbox_id.tx_dma_mb[26];
120 IAM_TXC_DMA27_MBOX : use_mbox_id = mbox_id.tx_dma_mb[27];
121 IAM_TXC_DMA28_MBOX : use_mbox_id = mbox_id.tx_dma_mb[28];
122 IAM_TXC_DMA29_MBOX : use_mbox_id = mbox_id.tx_dma_mb[29];
123 IAM_TXC_DMA30_MBOX : use_mbox_id = mbox_id.tx_dma_mb[30];
124 IAM_TXC_DMA31_MBOX : use_mbox_id = mbox_id.tx_dma_mb[31];
125
126
127
128 default : { use_mbox_id = -1; }
129
130
131 } // end of case
132} // end of task get_mbox_id
133
134
Full OpenSPARC design & verification tarball including full HDL.