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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / vera / smx_drv / niu_mem.vr
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_mem.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include <vera_defines.vrh>
36#include <ListMacros.vrh>
37
38#ifdef N2_IOS
39 #include "ios_l2_stub.vrh"
40 #include "top_defines.vrh"
41#else
42 #ifdef N2_FC
43 #else
44 #include "niu_mem_tasks.vri"
45 #endif
46#endif
47
48#define NEPT_EEPROM_BASE_START 64'hF5000000
49#define NEPT_EEPROM_BASE_END 64'hF8FFFFFF
50
51#ifdef N2_FC
52extern hdl_task write_sys_mem (
53 bit [63:0] addr,
54 bit [63:0] data,
55 bit [7:0] be
56 );
57
58extern hdl_task read_sys_mem (
59 bit [63:0] addr,
60 var bit [63:0] rd_data
61 );
62extern bit [63:0] FCMemoryAddress_A[4];
63extern bit [63:0] FCMemoryAddress_B[4];
64extern bit [63:0] FCMemoryAddress_C[4];
65extern event FCMemorySync_A[4];
66extern event FCMemorySync_B[4];
67extern event FCMemorySync_C[4];
68#endif
69
70#define TIME {get_time(HI), get_time(LO)}
71
72#ifdef IOS_ENV
73extern ios_l2_stub l2_stub[];
74extern StandardDisplay dbg;
75extern bit [63:0] IOSMemoryAddress[8];
76extern event IOSMemorySync[8];
77
78#endif
79
80
81#include "niu_cb_events.vri"
82
83#include "niu_cbclass.vrh"
84#include "niu_memcbmgr.vrh"
85
86extern "C" task SetExtMemBlockSize( integer block_size, integer mode_32b);
87extern "C" function bit[39:0] MallocBlock(integer no_of_blocks, integer page_id, integer alignment);
88extern "C" function bit[19:0] GetPageHandle();
89extern "C" function integer SetPageMask(integer no_of_4Kpages, integer type , integer id);
90extern "C" function bit [31:0] GetPageMask(integer id);
91extern "C" function bit [31:0] GetPageValue(integer id);
92extern "C" function bit [31:0] GetPageReloc(integer id);
93extern "C" task SetConfig( integer config, integer seed);
94extern "C" task MarkUsedLocations( bit[31:0] address_h, bit[31:0] address_l, integer no_of_blocks );
95extern "C" function bit[39:0] XlateAddr( bit[31:0] address_h, bit[31:0] address_l, integer page_id);
96extern "C" function integer FreeAddr (bit[31:0] addrh, bit[31:0] addrl, integer no_of_blocks, integer page_id);
97extern "C" function integer ForcePageContexts(integer page_id, bit[31:0] mask , bit[31:0] value, bit[31:0] reloc );
98extern "C" function integer DeletePageContext (integer id);
99extern "C" function integer CheckPageId( bit[31:0] address_h, bit[31:0] address_l);
100
101class AddressTrace {
102 bit [63:0] address;
103 bit [63:0] time;
104
105 task new( bit [63:0] t = 0) {
106 time = t;
107
108 }
109}
110
111MakeVeraList (AddressTrace);
112
113class MemWriteTrace {
114 local VeraList_AddressTrace WriteTrace;
115 local bit [63:0] last_query_address_time;
116
117 task new() {
118 WriteTrace = new();
119 last_query_address_time = 0;
120 }
121 task add( AddressTrace Trace) {
122 WriteTrace.push_back(Trace);
123 printf(" Adding Time - %d Address - %x \n",Trace.time, Trace.address);
124 }
125 function integer get_currsize() {
126 get_currsize = WriteTrace.size();
127 }
128 function bit [63:0] query_time () {
129 query_time = last_query_address_time;
130 }
131 function integer query(bit [63:0] address, (bit flush = 0) ) {
132 VeraListIterator_AddressTrace item,next_item;
133 AddressTrace Entry;
134 bit match;
135
136 match = 0;
137 if(WriteTrace.empty()) query = 0;
138 else {
139 printf( " Current Size - %d \n",WriteTrace.size());
140 item = WriteTrace.start();
141 while( !match & item.neq(WriteTrace.finish())) {
142 Entry = item.data();
143 if(Entry.address == address ) {
144 match = 1;
145
146 last_query_address_time = Entry.time;
147 if(flush) {
148 next_item = WriteTrace.erase(item);
149 }
150 } else {
151 match = 0;
152 last_query_address_time = 0;
153 }
154 if(!flush)
155 item.next();
156
157 }
158 }
159 if(flush) {
160 if(match==0) query = -1;
161 else query = 1;
162 } else
163 query = match;
164
165 }
166
167 task flushEntry( bit [63:0] address ) {
168 bit flush;
169 flush = 1;
170 if(WriteTrace.empty() ) {
171 printf(" TB ERROR Cannot delete address - %x \n",address);
172 } else {
173 if(query(address,flush)) {
174 printf(" DEBUG - Done with flushing address - %x \n",address);
175 } else {
176 printf(" TB ERROR Cannot delete address - %x \n",address);
177 }
178 }
179 }
180
181
182}
183
184class PageManager {
185
186// Class to manage pages per DMA channel
187// Function to generate unique page handle for all the DMAs ( 32 Tx, 32 Rx )
188// Function to generate page-relocation value based upon the no. of bytes required
189
190 function bit [19:0] get_page_handle() {
191 printf(" Inside PM - get_page_handle \n");
192 get_page_handle = GetPageHandle();
193 }
194 function bit[31:0] get_page_mask(integer no_of_4Kpages, integer type , integer id, var bit[31:0] mask, var bit[31:0] value, var bit [31:0] reloc ) {
195 get_page_mask = SetPageMask(no_of_4Kpages, type , id);
196 if(get_page_mask == 1) {
197 mask = GetPageMask(id);
198 value = GetPageValue(id);
199 reloc = GetPageReloc(id);
200 } else {
201 printf(" ERROR--- incorrect id %d specified for setting pagemasks \n",id);
202 mask = 32'hx;
203 }
204
205 }
206 function integer force_page_contexts(integer page_id, bit[31:0] mask , bit[31:0] value, bit[31:0] reloc ) {
207 integer status;
208 status =ForcePageContexts(page_id, mask , value, reloc );
209 }
210 function integer delete_page_contexts(integer page_id) {
211 delete_page_contexts = DeletePageContext(page_id);
212 }
213
214
215}
216class CSparseMem {
217
218 local MemWriteTrace WriteAddressTrace;
219 local PageManager PM;
220 local event write_sync;
221 local event read_sync;
222 local integer block_size;
223 local integer force_align;
224 local integer sem_id_get_addr = -1;
225 local integer sem_id_free_addr = -1;
226 local integer sem_id_xlate_addr = -1;
227
228 local bit [63:0] trace_address;
229 local event set_trace_collection;
230 local event trace_collect_done;
231
232 local CcbManager CbMgr;
233 local integer no_of_8bytes_written;
234
235
236#ifdef IOS_ENV
237 task IOSmarkMemoryLocation(bit [63:0] address, ( integer enable_tracking = 0 ));
238 task IOSMemory(integer bank);
239#endif
240
241#ifdef N2_FC
242 task FCmarkMemoryLocation_A(bit [63:0] address, ( integer enable_tracking = 0 ));
243 task FCmarkMemoryLocation_B(bit [63:0] address, ( integer enable_tracking = 0 ));
244 task FCmarkMemoryLocation_C(bit [63:0] address, ( integer enable_tracking = 0 ));
245 task FCMemory_A(integer mcu_port_no);
246 task FCMemory_B(integer mcu_port_no);
247 task FCMemory_C(integer mcu_port_no);
248#endif
249
250
251 task WriteVMem( bit [63:0] address, bit [63:0] data, bit [7:0] be, (integer xlate = 0), (integer page_id = 0) , (integer corrupt_xlate = 0), ( integer enable_tracking = 0 ) );
252 task WriteMem( bit [63:0] address, bit [63:0] data, bit [7:0] be, ( integer enable_tracking = 0 ));
253 task ReadMem( bit[63:0] address, var bit [63:0] data, bit[7:0] be);
254 task setused_address( bit[63:0] address, integer no_of_blocks);
255
256 function bit [39:0] get_address(integer no_of_blocks, (integer page_id = 0), (integer alignment = 1));
257 function bit [39:0] xlate_addr(bit[39:0] addr, integer page_id, (integer corrupt_xlation = 0) ) ;
258 function integer free_addr (bit[39:0] addr, integer no_of_blocks,(integer page_id = 0) );
259
260
261 task set_block_size(integer block_size, (integer mode_32b = 0));
262 function integer get_block_size() {
263 get_block_size = block_size;
264 }
265 function integer getNoOf8BytesWritten() {
266 getNoOf8BytesWritten = no_of_8bytes_written;
267 }
268
269 function bit[63:0] query_time() {
270 query_time = WriteAddressTrace.query_time();
271 }
272 function integer query(bit [63:0] address) {
273 query = WriteAddressTrace.query(address);
274 }
275 task flushEntry( bit [63:0] address ) {
276 WriteAddressTrace.flushEntry(address);
277 }
278 function bit [19:0] get_page_handle() {
279 get_page_handle = PM.get_page_handle();
280 }
281 function bit[31:0] get_page_mask(integer no_of_4Kpages, (integer type = 0), ( integer id = 0),var bit[31:0] mask, var bit[31:0] value, var bit [31:0] reloc ) {
282 get_page_mask = PM.get_page_mask(no_of_4Kpages, type , id, mask, value, reloc ) ;
283 }
284
285 function integer force_page_contexts(integer page_id, bit[31:0] mask , bit[31:0] value, bit[31:0] reloc ) {
286 integer status;
287 status = PM.force_page_contexts(page_id, mask , value, reloc );
288 }
289 function integer delete_page_contexts ( integer page_id) {
290 delete_page_contexts = PM.delete_page_contexts(page_id);
291 }
292 function integer check_page_id(bit[63:0] address) {
293 check_page_id = CheckPageId({24'h0,address[39:32]}, address[31:0]);
294 }
295
296 local task CollectMemWriteTrace();
297
298 task setCallBack ( CcbMem cb) {
299 CbMgr.setCallBack(cb);
300 }
301
302 task new((integer seed = 0) ) {
303 integer malloc_block_size;
304 integer no_of_blocks_for_eeprom;
305 no_of_8bytes_written = 0;
306 trigger(ON,write_sync);
307 trigger(ON,read_sync);
308 trigger(OFF, set_trace_collection);
309
310 sem_id_get_addr = alloc(SEMAPHORE, 0, 1, 1);
311 sem_id_free_addr = alloc(SEMAPHORE, 0, 1, 1);
312 sem_id_xlate_addr = alloc(SEMAPHORE, 0, 1, 1);
313
314 WriteAddressTrace = new();
315 CbMgr = new("NIU_GENERIC_MEMORY");
316 PM = new();
317 if (get_plus_arg (CHECK, "malloc_block_size"))
318 malloc_block_size = get_plus_arg (NUM, "malloc_block_size");
319 else
320 malloc_block_size = 4096;
321 if (get_plus_arg (CHECK, "NEPT_32bDMA_ADDR")) {
322 /*ignore the +arg if not neptune*/
323 set_block_size(malloc_block_size,0);
324 } else
325 set_block_size(malloc_block_size);
326
327 if (get_plus_arg (CHECK, "malloc_verbose")) {
328 SetConfig(1,seed);
329 } else {
330 SetConfig(0,seed);
331 }
332 if (get_plus_arg (CHECK,"FORCE_ADDR_ALIGNMENT")) {
333 force_align = get_plus_arg (NUM, "FORCE_ADDR_ALIGNMENT");
334 printf("WARNING: SparseMem::new - get_address byte alignment forced to %d \n",force_align);
335 }
336 #ifdef IOS_ENV
337 fork
338 IOSMemory(0);
339 IOSMemory(1);
340 IOSMemory(2);
341 IOSMemory(3);
342 IOSMemory(4);
343 IOSMemory(5);
344 IOSMemory(6);
345 IOSMemory(7);
346 join none
347 #endif
348
349 #ifdef N2_FC
350 fork
351 FCMemory_A(0);
352 FCMemory_A(1);
353 FCMemory_A(2);
354 FCMemory_A(3);
355
356 FCMemory_B(0);
357 FCMemory_B(1);
358 FCMemory_B(2);
359 FCMemory_B(3);
360
361 FCMemory_C(0);
362 FCMemory_C(1);
363 FCMemory_C(2);
364 FCMemory_C(3);
365 join none
366 #endif
367
368 }
369
370}
371
372task CSparseMem::setused_address(bit [63:0] address, integer no_of_blocks ) {
373 MarkUsedLocations( {24'h0,address[39:32]}, address[31:0], no_of_blocks );
374}
375
376#ifdef IOS_ENV
377task CSparseMem::IOSMemory(integer bank) {
378
379
380 while(1) {
381 //@(posedge CLOCK);
382 sync(ALL,IOSMemorySync[bank]);
383 trigger(OFF,IOSMemorySync[bank]);
384 printf ("%0d NIU_MEM: IOS mark memory location %x\n", get_time(LO), IOSMemoryAddress[bank]);
385 IOSmarkMemoryLocation(IOSMemoryAddress[bank],1);
386 trigger(IOSMemorySync[bank]);
387 }
388}
389
390task CSparseMem::IOSmarkMemoryLocation(bit [63:0] address, ( integer enable_tracking = 0 )) {
391
392 integer cb_status;
393// Fu: 4/27 take out the write sync for now, NIU does all back door write before
394
395// sync(ALL, write_sync);
396// trigger(OFF, write_sync);
397
398// if enable_tracking is set, the address for which the data has been written is stored into a class
399// and sent out as a mailbox
400
401
402 if(enable_tracking) {
403 cb_status = CbMgr.checkCallBack(address);
404 no_of_8bytes_written = no_of_8bytes_written +1;
405 }
406// trigger(ON,write_sync);
407}
408
409#endif
410
411#ifdef N2_FC
412task CSparseMem::FCMemory_A(integer mcu_port_no) {
413
414 while(1) {
415 sync(ALL,FCMemorySync_A[mcu_port_no]);
416 trigger(OFF,FCMemorySync_A[mcu_port_no]);
417 printf ("%0d NIU_MEM: FC mark memory location %x\n", get_time(LO), FCMemoryAddress_A[mcu_port_no]);
418 FCmarkMemoryLocation_A(FCMemoryAddress_A[mcu_port_no],1);
419 trigger(FCMemorySync_A[mcu_port_no]);
420 }
421}
422
423task CSparseMem::FCmarkMemoryLocation_A(bit [63:0] address, ( integer enable_tracking = 0 )) {
424
425 integer cb_status;
426
427 if(enable_tracking) {
428 cb_status = CbMgr.checkCallBack(address);
429 no_of_8bytes_written = no_of_8bytes_written +1;
430 }
431}
432
433task CSparseMem::FCMemory_B(integer mcu_port_no) {
434
435 while(1) {
436 sync(ALL,FCMemorySync_B[mcu_port_no]);
437 trigger(OFF,FCMemorySync_B[mcu_port_no]);
438 printf ("%0d NIU_MEM: FC mark memory location %x\n", get_time(LO), FCMemoryAddress_B[mcu_port_no]);
439 FCmarkMemoryLocation_B(FCMemoryAddress_B[mcu_port_no],1);
440 trigger(FCMemorySync_B[mcu_port_no]);
441 }
442}
443
444task CSparseMem::FCmarkMemoryLocation_B(bit [63:0] address, ( integer enable_tracking = 0 )) {
445
446 integer cb_status;
447
448 if(enable_tracking) {
449 cb_status = CbMgr.checkCallBack(address);
450 no_of_8bytes_written = no_of_8bytes_written +1;
451 }
452}
453
454task CSparseMem::FCMemory_C(integer mcu_port_no) {
455
456 while(1) {
457 sync(ALL,FCMemorySync_C[mcu_port_no]);
458 trigger(OFF,FCMemorySync_C[mcu_port_no]);
459 printf ("%0d NIU_MEM: FC mark memory location %x\n", get_time(LO), FCMemoryAddress_C[mcu_port_no]);
460 FCmarkMemoryLocation_C(FCMemoryAddress_C[mcu_port_no],1);
461 trigger(FCMemorySync_C[mcu_port_no]);
462 }
463}
464
465task CSparseMem::FCmarkMemoryLocation_C(bit [63:0] address, ( integer enable_tracking = 0 )) {
466
467 integer cb_status;
468
469 if(enable_tracking) {
470 cb_status = CbMgr.checkCallBack(address);
471 no_of_8bytes_written = no_of_8bytes_written +1;
472 }
473}
474
475#endif
476
477task CSparseMem::set_block_size(integer b, (integer mode_32b = 0 ) ) {
478 block_size = b;
479 SetExtMemBlockSize(b, mode_32b);
480}
481
482function integer CSparseMem::free_addr (bit[39:0] addr, integer no_of_blocks,(integer page_id = 0)) {
483 semaphore_get(WAIT, sem_id_free_addr, 1);
484 free_addr = FreeAddr({24'h0,addr[39:32]},addr[31:0],no_of_blocks,page_id);
485 semaphore_put(sem_id_free_addr, 1);
486}
487
488function bit [39:0] CSparseMem::get_address(integer no_of_blocks, (integer page_id = 0) , (integer alignment = 1) ) {
489 bit [39:0] address;
490 integer align;
491 // printf(" Page id - %d \n",page_id);
492
493 semaphore_get(WAIT, sem_id_get_addr, 1);
494
495 if (get_plus_arg (CHECK,"FORCE_ADDR_ALIGNMENT")) {
496 align = get_plus_arg (NUM, "FORCE_ADDR_ALIGNMENT");
497 }
498 else align = alignment;
499 address = MallocBlock(no_of_blocks,page_id,align);
500 // printf(" Address Allocated - %x \n",address);
501 get_address = address;
502 semaphore_put(sem_id_get_addr, 1);
503
504
505}
506
507function bit [39:0] CSparseMem::xlate_addr(bit[39:0] addr, integer page_id, (integer corrupt_xlation = 0) ) {
508 semaphore_get(WAIT, sem_id_xlate_addr, 1);
509
510 xlate_addr = XlateAddr({24'h0,addr[39:32]},addr[31:0], page_id);
511 if(xlate_addr === 40'hzzzzzzzzzz) {
512 error("CSparseMem::xlate_addr Testbench ERROR \n");
513 }
514 semaphore_put(sem_id_xlate_addr, 1);
515
516}
517
518task CSparseMem::WriteVMem( bit [63:0] address, bit [63:0] data, bit [7:0] be, (integer xlate = 0), (integer page_id = 0) , (integer corrupt_xlate = 0) ,( integer enable_tracking = 0 ) ) {
519
520bit[63:0] xlateaddr;
521// printf("CSparseMem::WriteVMem xlate - %d page_id - %d \n",xlate,page_id);
522if(xlate) {
523 xlateaddr = address;
524 xlateaddr[39:0] = xlate_addr(address[39:0] , page_id,corrupt_xlate);
525} else {
526 xlateaddr = address;
527}
528WriteMem( xlateaddr, data, be , enable_tracking );
529
530}
531task CSparseMem::CollectMemWriteTrace () {
532
533 integer address_collected ;
534 AddressTrace Trace;
535 address_collected = 0;
536 fork
537 {
538 while(1) {
539 sync(ALL,set_trace_collection);
540 trigger(OFF, set_trace_collection);
541 Trace = new();
542 Trace.time = TIME;
543 Trace.address = trace_address;
544 WriteAddressTrace.add(Trace);
545 address_collected++;
546 trigger (ON, trace_collect_done);
547 }
548 }
549 {
550 while(1) {
551 @(posedge CLOCK);
552 if(address_collected >0) {
553 printf(" Current Trace Size - %d time - %d\n",WriteAddressTrace.get_currsize(),TIME);
554 }
555 address_collected = 0;
556 }
557 } join none
558
559}
560
561task CSparseMem::WriteMem( bit [63:0] address, bit [63:0] data, bit [7:0] be , (integer enable_tracking = 0 ) ) {
562
563 integer cb_status;
564
565#ifdef IOS_ENV
566
567 bit [511:0] rd_data_tmp;
568 bit [511:0] wri_data;
569 bit [63:0] int_data;
570 string myname;
571 myname = {myname, ".WriteMem"};
572#endif
573
574
575 sync(ALL,write_sync);
576 trigger(OFF,write_sync);
577
578// if enable_tracking is set, the address for which the data has been written is stored into a class
579// and sent out as a mailbox
580
581/*
582 // - old code
583 if(enable_tracking) {
584 trigger (ON,set_trace_collection);
585 trace_address = address;
586 sync(ALL,trace_collect_done);
587 trigger (OFF, trace_collect_done);
588 }
589
590*/
591
592 if(enable_tracking) {
593 cb_status = CbMgr.checkCallBack(address);
594 no_of_8bytes_written = no_of_8bytes_written +1;
595 }
596
597 // $SysWrite_Data(Hostmode,addr_h,addr_l, data[31:0], be[3:0]);
598#ifdef IOS_ENV
599
600 if (address[39] === 1'b1)
601 {
602 dbg.dispmon(myname, MON_WARN, psprintf("L2-Write : Address = %0h PA bit39 is set!", address));
603 }
604
605 printf ("NIU_MEM write: address=%x, be=%x date=%x\n", address, be, data);
606
607
608 case (address[8:6]) {
609 3'd0: rd_data_tmp = l2_stub[0].l2_mem[address[39:9]];
610 3'd1: rd_data_tmp = l2_stub[1].l2_mem[address[39:9]];
611 3'd2: rd_data_tmp = l2_stub[2].l2_mem[address[39:9]];
612 3'd3: rd_data_tmp = l2_stub[3].l2_mem[address[39:9]];
613 3'd4: rd_data_tmp = l2_stub[4].l2_mem[address[39:9]];
614 3'd5: rd_data_tmp = l2_stub[5].l2_mem[address[39:9]];
615 3'd6: rd_data_tmp = l2_stub[6].l2_mem[address[39:9]];
616 3'd7: rd_data_tmp = l2_stub[7].l2_mem[address[39:9]];
617 }
618
619 int_data = (data & { {8{be[7]}}, {8{be[6]}}, {8{be[5]}}, {8{be[4]}}, {8{be[3]}}, {8{be[2]}}, {8{be[1]}}, {8{be[0]}} });
620 // Fu: handle 4 bytes aligned address, only write to upper 32 bits
621 if (address[2] === 1'b1)
622 {
623 case (address[5:3]) {
624 3'd6: wri_data = {rd_data_tmp[511:64], int_data[31:0], rd_data_tmp[31:0]};
625 3'd7: wri_data = {rd_data_tmp[511:128], int_data[31:0], rd_data_tmp[95:0]};
626 3'd4: wri_data = {rd_data_tmp[511:192], int_data[31:0], rd_data_tmp[159:0]};
627 3'd5: wri_data = {rd_data_tmp[511:256], int_data[31:0], rd_data_tmp[223:0]};
628 3'd2: wri_data = {rd_data_tmp[511:320], int_data[31:0], rd_data_tmp[287:0]};
629 3'd3: wri_data = {rd_data_tmp[511:384], int_data[31:0], rd_data_tmp[351:0]};
630 3'd0: wri_data = {rd_data_tmp[511:448], int_data[31:0], rd_data_tmp[415:0]};
631 3'd1: wri_data = {int_data[31:0], rd_data_tmp[479:0]};
632 }
633 }
634 else
635 case (address[5:3]) {
636 3'd6: wri_data = {rd_data_tmp[511:64], int_data};
637 3'd7: wri_data = {rd_data_tmp[511:128], int_data, rd_data_tmp[63:0]};
638 3'd4: wri_data = {rd_data_tmp[511:192], int_data, rd_data_tmp[127:0]};
639 3'd5: wri_data = {rd_data_tmp[511:256], int_data, rd_data_tmp[191:0]};
640 3'd2: wri_data = {rd_data_tmp[511:320], int_data, rd_data_tmp[255:0]};
641 3'd3: wri_data = {rd_data_tmp[511:384], int_data, rd_data_tmp[319:0]};
642 3'd0: wri_data = {rd_data_tmp[511:448], int_data, rd_data_tmp[383:0]};
643 3'd1: wri_data = {int_data, rd_data_tmp[447:0]};
644 }
645
646 case (address[8:6]) {
647 3'd0: l2_stub[0].l2_mem[address[39:9]] = wri_data[511:0];
648 3'd1: l2_stub[1].l2_mem[address[39:9]] = wri_data[511:0];
649 3'd2: l2_stub[2].l2_mem[address[39:9]] = wri_data[511:0];
650 3'd3: l2_stub[3].l2_mem[address[39:9]] = wri_data[511:0];
651 3'd4: l2_stub[4].l2_mem[address[39:9]] = wri_data[511:0];
652 3'd5: l2_stub[5].l2_mem[address[39:9]] = wri_data[511:0];
653 3'd6: l2_stub[6].l2_mem[address[39:9]] = wri_data[511:0];
654 3'd7: l2_stub[7].l2_mem[address[39:9]] = wri_data[511:0];
655 }
656
657 dbg.dispmon(myname, MON_NORMAL, psprintf("L2-Write : Address = %0h, Data[511:0] = %0h\n", address, wri_data));
658
659#else
660
661 #ifdef N2_FC
662 write_sys_mem(address[63:0], data[63:0], ~be ); // write DoubleWord
663 #else
664 write_sys_mem(1, address[63:0], data[63:0], ~be ); // write DoubleWord
665 #endif
666
667#endif
668 trigger(ON,write_sync);
669
670}
671
672task CSparseMem::ReadMem( bit [63:0] address, var bit [63:0] data, bit [7:0] be ) {
673
674 bit [63:0] rdata;
675
676
677#ifdef IOS_ENV
678 bit [511:0] rd_data_tmp;
679 bit [63:0] tdata;
680 string myname;
681 myname = {myname, ".ReadMem"};
682#endif
683
684 sync(ALL,read_sync);
685 trigger(OFF,read_sync);
686
687#ifdef IOS_ENV
688 case (address[8:6]) {
689 3'd0: rd_data_tmp = l2_stub[0].l2_mem[address[39:9]];
690 3'd1: rd_data_tmp = l2_stub[1].l2_mem[address[39:9]];
691 3'd2: rd_data_tmp = l2_stub[2].l2_mem[address[39:9]];
692 3'd3: rd_data_tmp = l2_stub[3].l2_mem[address[39:9]];
693 3'd4: rd_data_tmp = l2_stub[4].l2_mem[address[39:9]];
694 3'd5: rd_data_tmp = l2_stub[5].l2_mem[address[39:9]];
695 3'd6: rd_data_tmp = l2_stub[6].l2_mem[address[39:9]];
696 3'd7: rd_data_tmp = l2_stub[7].l2_mem[address[39:9]];
697 }
698
699 case (address[5:3]) {
700 3'd7: tdata[63:0] = rd_data_tmp[63:0];
701 3'd6: tdata[63:0] = rd_data_tmp[127:64];
702 3'd5: tdata[63:0] = rd_data_tmp[191:128];
703 3'd4: tdata[63:0] = rd_data_tmp[255:192];
704 3'd3: tdata[63:0] = rd_data_tmp[319:256];
705 3'd2: tdata[63:0] = rd_data_tmp[383:320];
706 3'd1: tdata[63:0] = rd_data_tmp[447:384];
707 3'd0: tdata[63:0] = rd_data_tmp[511:448];
708 }
709
710 // Fu: 5/6/05 swap for endian
711 rdata = {tdata[7:0], tdata[15:8],tdata[23:16],tdata[31:24],tdata[39:32],tdata[47:40],tdata[55:48],tdata[63:56]};
712
713 dbg.dispmon(myname, MON_NORMAL, psprintf("L2-Read : Address = %0h, Data[63:0] = %0h", address, rdata));
714
715#else
716
717 #ifdef N2_FC
718 read_sys_mem(address[63:0], rdata); // read DoubleWord
719 #else
720 read_sys_mem(1, address[63:0], rdata); // read DoubleWord
721 #endif
722
723
724#endif
725 data = rdata;
726 trigger(ON,read_sync);
727
728}
729
730
731
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739
Full OpenSPARC design & verification tarball including full HDL.