Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / tcu / vera / include / diag_ccu_clks_vars.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: diag_ccu_clks_vars.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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34// ========== Copyright Header End ============================================
35 CCU_clk_port ccu_clk_port = ccu_clk_bind;
36 CCU_mon_port ccu_mon_port = ccu_mon_bind;
37 UCB_port ccu_ucb_port = ccu_ucb_mon_bind;
38
39 //--- ports for cluster headers in ccu_mon.v -----
40
41//added to remove NIU related signals
42#ifndef FC_NO_NIU_T2
43 CLKGEN_port clkgen_ccumon_dr_port = clkgen_ccumon_dr_bind;
44 CLKGEN_port clkgen_ccumon_io2x_port = clkgen_ccumon_io2x_bind;
45#endif
46 //--- ports for cluster headers of blocks in TCU_SAT (listed in alphabetical order) -----
47
48 CLKGEN_port clkgen_ccu_cmp_port = clkgen_ccu_cmp_bind;
49 CLKGEN_port clkgen_ccu_io_port = clkgen_ccu_io_bind;
50 CLKGEN_port clkgen_db0_cmp_port = clkgen_db0_cmp_bind;
51 CLKGEN_port clkgen_db0_io_port = clkgen_db0_io_bind;
52 CLKGEN_port clkgen_db1_cmp_port = clkgen_db1_cmp_bind;
53 CLKGEN_port clkgen_db1_io_port = clkgen_db1_io_bind;
54 CLKGEN_port clkgen_efu_cmp_port = clkgen_efu_cmp_bind;
55 CLKGEN_port clkgen_efu_io_port = clkgen_efu_io_bind;
56 CLKGEN_port clkgen_mio_0_cmp_port = clkgen_mio_0_cmp_bind;
57 CLKGEN_port clkgen_mio_1_cmp_port = clkgen_mio_1_cmp_bind;
58 CLKGEN_port clkgen_mio_2_cmp_port = clkgen_mio_2_cmp_bind;
59 CLKGEN_port clkgen_mio_3_cmp_port = clkgen_mio_3_cmp_bind;
60 CLKGEN_port clkgen_mio_io_port = clkgen_mio_io_bind;
61 CLKGEN_port clkgen_ncu_cmp_port = clkgen_ncu_cmp_bind;
62 CLKGEN_port clkgen_ncu_io_port = clkgen_ncu_io_bind;
63 CLKGEN_port clkgen_rst_cmp_port = clkgen_rst_cmp_bind;
64 CLKGEN_port clkgen_rst_io_port = clkgen_rst_io_bind;
65 CLKGEN_port clkgen_tcu_cmp_port = clkgen_tcu_cmp_bind;
66 CLKGEN_port clkgen_tcu_io_port = clkgen_tcu_io_bind;
67
68 //--- ports for cluster headers of blocks not in TCU_SAT (listed in alphabetical order) ---
69 //--- WARNING: this file is intended for TCU SAT and fc_scan benches only (ie. fc bench)---
70
71#ifdef FC_SCAN_BENCH
72 CLKGEN_port clkgen_ccx_cmp_port = clkgen_ccx_cmp_bind;
73 CLKGEN_port clkgen_dmu_io_port = clkgen_dmu_io_bind;
74 CLKGEN_port clkgen_l2b0_cmp_port = clkgen_l2b0_cmp_bind;
75 CLKGEN_port clkgen_l2b1_cmp_port = clkgen_l2b1_cmp_bind;
76 CLKGEN_port clkgen_l2b2_cmp_port = clkgen_l2b2_cmp_bind;
77 CLKGEN_port clkgen_l2b3_cmp_port = clkgen_l2b3_cmp_bind;
78 CLKGEN_port clkgen_l2b4_cmp_port = clkgen_l2b4_cmp_bind;
79 CLKGEN_port clkgen_l2b5_cmp_port = clkgen_l2b5_cmp_bind;
80 CLKGEN_port clkgen_l2b6_cmp_port = clkgen_l2b6_cmp_bind;
81 CLKGEN_port clkgen_l2b7_cmp_port = clkgen_l2b7_cmp_bind;
82 CLKGEN_port clkgen_l2d0_cmp_port = clkgen_l2d0_cmp_bind;
83 CLKGEN_port clkgen_l2d1_cmp_port = clkgen_l2d1_cmp_bind;
84 CLKGEN_port clkgen_l2d2_cmp_port = clkgen_l2d2_cmp_bind;
85 CLKGEN_port clkgen_l2d3_cmp_port = clkgen_l2d3_cmp_bind;
86 CLKGEN_port clkgen_l2d4_cmp_port = clkgen_l2d4_cmp_bind;
87 CLKGEN_port clkgen_l2d5_cmp_port = clkgen_l2d5_cmp_bind;
88 CLKGEN_port clkgen_l2d6_cmp_port = clkgen_l2d6_cmp_bind;
89 CLKGEN_port clkgen_l2d7_cmp_port = clkgen_l2d7_cmp_bind;
90 CLKGEN_port clkgen_l2t0_cmp_port = clkgen_l2t0_cmp_bind;
91 CLKGEN_port clkgen_l2t1_cmp_port = clkgen_l2t1_cmp_bind;
92 CLKGEN_port clkgen_l2t2_cmp_port = clkgen_l2t2_cmp_bind;
93 CLKGEN_port clkgen_l2t3_cmp_port = clkgen_l2t3_cmp_bind;
94 CLKGEN_port clkgen_l2t4_cmp_port = clkgen_l2t4_cmp_bind;
95 CLKGEN_port clkgen_l2t5_cmp_port = clkgen_l2t5_cmp_bind;
96 CLKGEN_port clkgen_l2t6_cmp_port = clkgen_l2t6_cmp_bind;
97 CLKGEN_port clkgen_l2t7_cmp_port = clkgen_l2t7_cmp_bind;
98 CLKGEN_port clkgen_mac_io_port = clkgen_mac_io_bind;
99 CLKGEN_port clkgen_mcu0_cmp_port = clkgen_mcu0_cmp_bind;
100 CLKGEN_port clkgen_mcu0_dr_port = clkgen_mcu0_dr_bind;
101 CLKGEN_port clkgen_mcu0_io_port = clkgen_mcu0_io_bind;
102 CLKGEN_port clkgen_mcu1_cmp_port = clkgen_mcu1_cmp_bind;
103 CLKGEN_port clkgen_mcu1_dr_port = clkgen_mcu1_dr_bind;
104 CLKGEN_port clkgen_mcu1_io_port = clkgen_mcu1_io_bind;
105 CLKGEN_port clkgen_mcu2_cmp_port = clkgen_mcu2_cmp_bind;
106 CLKGEN_port clkgen_mcu2_dr_port = clkgen_mcu2_dr_bind;
107 CLKGEN_port clkgen_mcu2_io_port = clkgen_mcu2_io_bind;
108 CLKGEN_port clkgen_mcu3_cmp_port = clkgen_mcu3_cmp_bind;
109 CLKGEN_port clkgen_mcu3_dr_port = clkgen_mcu3_dr_bind;
110 CLKGEN_port clkgen_mcu3_io_port = clkgen_mcu3_io_bind;
111 CLKGEN_port clkgen_peu_io_port = clkgen_peu_io_bind;
112 CLKGEN_port clkgen_peu_pc_port = clkgen_peu_pc_bind;
113#ifndef FC_NO_NIU_T2
114 CLKGEN_port clkgen_rdp_io_port = clkgen_rdp_io_bind;
115 CLKGEN_port clkgen_rdp_io2x_port = clkgen_rdp_io2x_bind;
116 CLKGEN_port clkgen_rtx_io_port = clkgen_rtx_io_bind;
117 CLKGEN_port clkgen_rtx_io2x_port = clkgen_rtx_io2x_bind;
118#endif
119 CLKGEN_port clkgen_sii_cmp_port = clkgen_sii_cmp_bind;
120 CLKGEN_port clkgen_sii_io_port = clkgen_sii_io_bind;
121 CLKGEN_port clkgen_sio_cmp_port = clkgen_sio_cmp_bind;
122 CLKGEN_port clkgen_sio_io_port = clkgen_sio_io_bind;
123 CLKGEN_port clkgen_spc0_cmp_port = clkgen_spc0_cmp_bind;
124 CLKGEN_port clkgen_spc1_cmp_port = clkgen_spc1_cmp_bind;
125 CLKGEN_port clkgen_spc2_cmp_port = clkgen_spc2_cmp_bind;
126 CLKGEN_port clkgen_spc3_cmp_port = clkgen_spc3_cmp_bind;
127 CLKGEN_port clkgen_spc4_cmp_port = clkgen_spc4_cmp_bind;
128 CLKGEN_port clkgen_spc5_cmp_port = clkgen_spc5_cmp_bind;
129 CLKGEN_port clkgen_spc6_cmp_port = clkgen_spc6_cmp_bind;
130 CLKGEN_port clkgen_spc7_cmp_port = clkgen_spc7_cmp_bind;
131#ifndef FC_NO_NIU_T2
132 CLKGEN_port clkgen_tds_io_port = clkgen_tds_io_bind;
133 CLKGEN_port clkgen_tds_io2x_port = clkgen_tds_io2x_bind;
134#endif
135
136#endif // end of '#ifdef FC_SCAN_BENCH'
137
138 //---- vars for packets (ie. data structures) ------
139 CCU_clk_packet ccu_clk_pkt;
140 CCU_clks_states ccu_states;
141
142 //--- var for CCU checker ---
143 CCU_checker ccu_checker;
144
145 //--- vars for cluster header checkers of blks in TCU SAT (listed in alphabetical order)---
146 CLUSTER_hdr_chkr clkgen_ccu_cmp_chkr;
147 CLUSTER_hdr_chkr clkgen_ccu_io_chkr;
148 CLUSTER_hdr_chkr clkgen_db0_cmp_chkr;
149 CLUSTER_hdr_chkr clkgen_db0_io_chkr;
150 CLUSTER_hdr_chkr clkgen_db1_cmp_chkr;
151 CLUSTER_hdr_chkr clkgen_db1_io_chkr;
152 CLUSTER_hdr_chkr clkgen_efu_cmp_chkr;
153 CLUSTER_hdr_chkr clkgen_efu_io_chkr;
154 CLUSTER_hdr_chkr clkgen_mio_0_cmp_chkr;
155 CLUSTER_hdr_chkr clkgen_mio_1_cmp_chkr;
156 CLUSTER_hdr_chkr clkgen_mio_2_cmp_chkr;
157 CLUSTER_hdr_chkr clkgen_mio_3_cmp_chkr;
158 CLUSTER_hdr_chkr clkgen_mio_io_chkr;
159 CLUSTER_hdr_chkr clkgen_ncu_cmp_chkr;
160 CLUSTER_hdr_chkr clkgen_ncu_io_chkr;
161 CLUSTER_hdr_chkr clkgen_rst_cmp_chkr;
162 CLUSTER_hdr_chkr clkgen_rst_io_chkr;
163 CLUSTER_hdr_chkr clkgen_tcu_cmp_chkr;
164 CLUSTER_hdr_chkr clkgen_tcu_io_chkr;
165
166 //--- vars for cluster header checkers of blks not in TCU SAT (listed in alphabetical order)---
167 CLUSTER_hdr_chkr clkgen_ccx_cmp_chkr;
168 CLUSTER_hdr_chkr clkgen_dmu_io_chkr;
169 CLUSTER_hdr_chkr clkgen_l2b0_cmp_chkr;
170 CLUSTER_hdr_chkr clkgen_l2b1_cmp_chkr;
171 CLUSTER_hdr_chkr clkgen_l2b2_cmp_chkr;
172 CLUSTER_hdr_chkr clkgen_l2b3_cmp_chkr;
173 CLUSTER_hdr_chkr clkgen_l2b4_cmp_chkr;
174 CLUSTER_hdr_chkr clkgen_l2b5_cmp_chkr;
175 CLUSTER_hdr_chkr clkgen_l2b6_cmp_chkr;
176 CLUSTER_hdr_chkr clkgen_l2b7_cmp_chkr;
177 CLUSTER_hdr_chkr clkgen_l2d0_cmp_chkr;
178 CLUSTER_hdr_chkr clkgen_l2d1_cmp_chkr;
179 CLUSTER_hdr_chkr clkgen_l2d2_cmp_chkr;
180 CLUSTER_hdr_chkr clkgen_l2d3_cmp_chkr;
181 CLUSTER_hdr_chkr clkgen_l2d4_cmp_chkr;
182 CLUSTER_hdr_chkr clkgen_l2d5_cmp_chkr;
183 CLUSTER_hdr_chkr clkgen_l2d6_cmp_chkr;
184 CLUSTER_hdr_chkr clkgen_l2d7_cmp_chkr;
185 CLUSTER_hdr_chkr clkgen_l2t0_cmp_chkr;
186 CLUSTER_hdr_chkr clkgen_l2t1_cmp_chkr;
187 CLUSTER_hdr_chkr clkgen_l2t2_cmp_chkr;
188 CLUSTER_hdr_chkr clkgen_l2t3_cmp_chkr;
189 CLUSTER_hdr_chkr clkgen_l2t4_cmp_chkr;
190 CLUSTER_hdr_chkr clkgen_l2t5_cmp_chkr;
191 CLUSTER_hdr_chkr clkgen_l2t6_cmp_chkr;
192 CLUSTER_hdr_chkr clkgen_l2t7_cmp_chkr;
193 CLUSTER_hdr_chkr clkgen_mac_io_chkr;
194 CLUSTER_hdr_chkr clkgen_mcu0_cmp_chkr;
195 CLUSTER_hdr_chkr clkgen_mcu0_dr_chkr;
196 CLUSTER_hdr_chkr clkgen_mcu0_io_chkr;
197 CLUSTER_hdr_chkr clkgen_mcu1_cmp_chkr;
198 CLUSTER_hdr_chkr clkgen_mcu1_dr_chkr;
199 CLUSTER_hdr_chkr clkgen_mcu1_io_chkr;
200 CLUSTER_hdr_chkr clkgen_mcu2_cmp_chkr;
201 CLUSTER_hdr_chkr clkgen_mcu2_dr_chkr;
202 CLUSTER_hdr_chkr clkgen_mcu2_io_chkr;
203 CLUSTER_hdr_chkr clkgen_mcu3_cmp_chkr;
204 CLUSTER_hdr_chkr clkgen_mcu3_dr_chkr;
205 CLUSTER_hdr_chkr clkgen_mcu3_io_chkr;
206 CLUSTER_hdr_chkr clkgen_peu_io_chkr;
207 CLUSTER_hdr_chkr clkgen_peu_pc_chkr;
208#ifndef FC_NO_NIU_T2
209 CLUSTER_hdr_chkr clkgen_rdp_io_chkr;
210 CLUSTER_hdr_chkr clkgen_rdp_io2x_chkr;
211 CLUSTER_hdr_chkr clkgen_rtx_io_chkr;
212 CLUSTER_hdr_chkr clkgen_rtx_io2x_chkr;
213#endif
214 CLUSTER_hdr_chkr clkgen_sii_cmp_chkr;
215 CLUSTER_hdr_chkr clkgen_sii_io_chkr;
216 CLUSTER_hdr_chkr clkgen_sio_cmp_chkr;
217 CLUSTER_hdr_chkr clkgen_sio_io_chkr;
218 CLUSTER_hdr_chkr clkgen_spc0_cmp_chkr;
219 CLUSTER_hdr_chkr clkgen_spc1_cmp_chkr;
220 CLUSTER_hdr_chkr clkgen_spc2_cmp_chkr;
221 CLUSTER_hdr_chkr clkgen_spc3_cmp_chkr;
222 CLUSTER_hdr_chkr clkgen_spc4_cmp_chkr;
223 CLUSTER_hdr_chkr clkgen_spc5_cmp_chkr;
224 CLUSTER_hdr_chkr clkgen_spc6_cmp_chkr;
225 CLUSTER_hdr_chkr clkgen_spc7_cmp_chkr;
226#ifndef FC_NO_NIU_T2
227 CLUSTER_hdr_chkr clkgen_tds_io_chkr;
228 CLUSTER_hdr_chkr clkgen_tds_io2x_chkr;
229#endif
230