projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: tcu_top_defines.vri | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | #ifndef INC_TCU_TOP_DEFINES_VRI | |
| 36 | #define INC_TCU_TOP_DEFINES_VRI | |
| 37 | ||
| 38 | //---- common parts for all benches | |
| 39 | //---- will separate this part and put it in a common file at the top-level | |
| 40 | //---- (eg. :/verif/env/common/vera/include/top_defines.vri) | |
| 41 | ||
| 42 | #define TOP tb_top | |
| 43 | #define CPU `TOP.cpu // design top module | |
| 44 | #define TCU `TOP.cpu.tcu // Test control unit | |
| 45 | #define CCU `TOP.cpu.ccu // Clock control unit | |
| 46 | #define RST `TOP.cpu.rst // Reset logic unit | |
| 47 | #define EFU `TOP.cpu.efu // Electronic fuse unit | |
| 48 | #define NCU `TOP.cpu.ncu // Non-cacheable unit | |
| 49 | #define SII `TOP.cpu.sii // sii unit | |
| 50 | #define SIO `TOP.cpu.sio // sio unit | |
| 51 | ||
| 52 | //---- TCU SAT specific ---- | |
| 53 | ||
| 54 | #define MONTCU `TOP.tcu_mon // Verilog DUT monitors | |
| 55 | #define MONCCU `TOP.ccu_mon // Verilog DUT monitors | |
| 56 | #define MONRST `TOP.rst_mon // Verilog DUT monitors | |
| 57 | ||
| 58 | #define OUTPUT_EDGE_N NHOLD | |
| 59 | #define INPUT_EDGE PSAMPLE | |
| 60 | #define INPUT_SKEW #-3 | |
| 61 | ||
| 62 | #define NUM_MBIST_ENGINES 48 // Total number of MBIST engines | |
| 63 | #define NUM_LBIST_ENGINES 8 // Total number of LBIST engines | |
| 64 | #define NUM_THREADS 64 // Total number of threads | |
| 65 | ||
| 66 | ||
| 67 | #endif |