Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / tcu / vera / packets / tcu_mbist_packet.vr

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: tcu_mbist_packet.vr
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#include <vera_defines.vrh>
#include "tcu_top_defines.vri"

enum MBIST_TYPE { INIT, SER, PAR, NOSEND };
//////////////////////////////////////////////////
//
//////////////////////////////////////////////////

class tcu_mbist_packet {
     MBIST_TYPE type;
     reg [(`NUM_MBIST_ENGINES-1):0] bypass;
     reg [(`NUM_MBIST_ENGINES-1):0] fail;
     reg send_req;

     task new (
       MBIST_TYPE type,
       reg [(`NUM_MBIST_ENGINES-1):0] bypass,
       reg [(`NUM_MBIST_ENGINES-1):0] fail
     );
}

/////////////////////////////////////////////////
//		
/////////////////////////////////////////////////
task tcu_mbist_packet::new (
     MBIST_TYPE type = PAR,
     reg [(`NUM_MBIST_ENGINES-1):0] bypass = `NUM_MBIST_ENGINES'b0,
     reg [(`NUM_MBIST_ENGINES-1):0] fail = `NUM_MBIST_ENGINES'b0
)

{
    this.type = type;
    this.bypass = bypass;
    this.fail = fail;
    this.send_req = 0;
}