Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / model / pcie / pcie_common / ilupeu_defines.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: ilupeu_defines.h
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38// ========== Copyright Header Begin ==========================================
39//
40// OpenSPARC T2 Processor File: ilupeu_defines.h
41// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
42// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
43//
44// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
45//
46// This program is free software; you can redistribute it and/or modify
47// it under the terms of the GNU General Public License as published by
48// the Free Software Foundation; version 2 of the License.
49//
50// This program is distributed in the hope that it will be useful,
51// but WITHOUT ANY WARRANTY; without even the implied warranty of
52// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53// GNU General Public License for more details.
54//
55// You should have received a copy of the GNU General Public License
56// along with this program; if not, write to the Free Software
57// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
58//
59// For the avoidance of doubt, and except that if any non-GPL license
60// choice is available it will apply instead, Sun elects to use only
61// the General Public License version 2 (GPLv2) at this time for any
62// software where a choice of GPL license versions is made
63// available with the language indicating that GPLv2 or any later version
64// may be used, or where a choice of which version of the GPL is applied is
65// otherwise unspecified.
66//
67// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
68// CA 95054 USA or visit www.sun.com if you need additional information or
69// have any questions.
70//
71// ========== Copyright Header End ============================================
72#ifndef INC_ILUPEU_DEFINES_H
73#define INC_ILUPEU_DEFINES_H
74
75
76#define ILUPEU_DL_INACTIVE "0b001"
77#define ILUPEU_DL_INIT "0b010"
78#define ILUPEU_DL_ACTIVE "0b100"
79
80#define ILUPEU_LINK_DOWN "0b0"
81#define ILUPEU_LINK_UP "0b1"
82
83#define ILUPEU_FC_IDLE "0b00"
84#define ILUPEU_FC_INIT1 "0b01"
85#define ILUPEU_FC_INIT2 "0b11"
86#define ILUPEU_FC_INIT_DONE "0b10"
87
88#define ILUPEU_LANE_REVERSED "0b1"
89#define ILUPEU_LANE_NOT_REVERSED "0b0"
90
91
92#define ILUPEU_LINK_WIDTH_X1 "0b0000"
93#define ILUPEU_LINK_WIDTH_X2 "0b0001"
94#define ILUPEU_LINK_WIDTH_X4 "0b0011"
95#define ILUPEU_LINK_WIDTH_X8 "0b0111"
96
97//PEU definitions from xmlh_ltssm.v
98#define ILUPEU_LTSSM_DETECT_QUIET sc_uint<64>(0x00)
99#define ILUPEU_LTSSM_DETECT_ACT sc_uint<64>(0x01)
100#define ILUPEU_LTSSM_POLL_ACTIVE sc_uint<64>(0x02)
101#define ILUPEU_LTSSM_POLL_COMPLIANCE sc_uint<64>(0x03)
102#define ILUPEU_LTSSM_POLL_CONFIG sc_uint<64>(0x04)
103#define ILUPEU_LTSSM_PRE_DETECT_QUIET sc_uint<64>(0x05)
104#define ILUPEU_LTSSM_DETECT_WAIT sc_uint<64>(0x06)
105#define ILUPEU_LTSSM_CFG_LINKWD_START sc_uint<64>(0x07)
106#define ILUPEU_LTSSM_CFG_LINKWD_ACEPT sc_uint<64>(0x08)
107#define ILUPEU_LTSSM_CFG_LANENUM_WAIT sc_uint<64>(0x09)
108#define ILUPEU_LTSSM_CFG_LANENUM_ACEPT sc_uint<64>(0x0A)
109#define ILUPEU_LTSSM_CFG_COMPLETE sc_uint<64>(0x0B)
110#define ILUPEU_LTSSM_CFG_IDLE sc_uint<64>(0x0C)
111#define ILUPEU_LTSSM_RCVRY_RCVRLOCK sc_uint<64>(0x0D)
112#define ILUPEU_LTSSM_RCVRY_RCVRCFG sc_uint<64>(0x0E)
113#define ILUPEU_LTSSM_RCVRY_IDLE sc_uint<64>(0x0F)
114#define ILUPEU_LTSSM_L0 sc_uint<64>(0x10)
115#define ILUPEU_LTSSM_L0S sc_uint<64>(0x11)
116#define ILUPEU_LTSSM_L123_SEND_EIDLE sc_uint<64>(0x12)
117#define ILUPEU_LTSSM_L1_IDLE sc_uint<64>(0x13)
118#define ILUPEU_LTSSM_L2_IDLE sc_uint<64>(0x14)
119#define ILUPEU_LTSSM_L2_WAKE sc_uint<64>(0x15)
120#define ILUPEU_LTSSM_DISABLED_ENTRY sc_uint<64>(0x16)
121#define ILUPEU_LTSSM_DISABLED_IDLE sc_uint<64>(0x17)
122#define ILUPEU_LTSSM_DISABLED sc_uint<64>(0x18)
123#define ILUPEU_LTSSM_LPBK_ENTRY sc_uint<64>(0x19)
124#define ILUPEU_LTSSM_LPBK_ACTIVE sc_uint<64>(0x1A)
125#define ILUPEU_LTSSM_LPBK_EXIT sc_uint<64>(0x1B)
126#define ILUPEU_LTSSM_LPBK_EXIT_TIMEOUT sc_uint<64>(0x1C)
127#define ILUPEU_LTSSM_HOT_RESET_ENTRY sc_uint<64>(0x1D)
128#define ILUPEU_LTSSM_HOT_RESET sc_uint<64>(0x1F)
129
130
131//Standard CSR width
132#define ILUPEU_CSR_WIDTH 64
133#define ILUPEU_FAST_LINK_TRAIN_TO 15000
134#define ILUPEU_DEFAULT_LINK_TRAIN_TO 10000000
135
136//Default Retry Credits
137#define ILUPEU_DEFAULT_RETRY_CREDITS sc_uint<64>(0x1580)
138
139//Defines for Ingress/Egress
140#define ILUPEU_INGRESS_TRANS 1
141#define ILUPEU_EGRESS_TRANS 0
142
143//Defines for Strategy Encodings
144#define ILUPEU_TLP_STRAT_ENC 0
145#define ILUPEU_DLLP_FC_STRAT_ENC 1
146#define ILUPEU_DLLP_PM_STRAT_ENC 2
147
148
149#define ILUPEU_TRUE 1
150#define ILUPEU_FALSE 0
151
152// TLP Field Acquisition Defines
153#define ILUPEU_TLP_TYPE_QUAD_LOC 0
154#define ILUPEU_TLP_TYPE_BITS (30,24)
155
156#define ILUPEU_TLP_TC_QUAD_LOC 0
157#define ILUPEU_TLP_TC_BITS (22,20)
158
159#define ILUPEU_TLP_DATASIZE_QUAD_LOC 0
160#define ILUPEU_TLP_DATASIZE_BITS (9,0)
161
162
163
164// TLP Type Encodings
165#define ILUPEU_TLP_FMT_TYPE_MRD32 "0b0000000"
166#define ILUPEU_TLP_FMT_TYPE_MRD64 "0b0100000"
167#define ILUPEU_TLP_FMT_TYPE_MRDLK32 "0b0000001"
168#define ILUPEU_TLP_FMT_TYPE_MRDLK64 "0b0100001"
169#define ILUPEU_TLP_FMT_TYPE_MWR32 "0b1000000"
170#define ILUPEU_TLP_FMT_TYPE_MWR64 "0b1100000"
171#define ILUPEU_TLP_FMT_TYPE_IORD "0b0000010"
172#define ILUPEU_TLP_FMT_TYPE_IOWR "0b1000010"
173#define ILUPEU_TLP_FMT_TYPE_CFGRD0 "0b0000100"
174#define ILUPEU_TLP_FMT_TYPE_CFGWR0 "0b1000100"
175#define ILUPEU_TLP_FMT_TYPE_CFGRD1 "0b0000101"
176#define ILUPEU_TLP_FMT_TYPE_CFGWR1 "0b1000101"
177#define ILUPEU_TLP_FMT_TYPE_MSG0 "0b0110000"
178#define ILUPEU_TLP_FMT_TYPE_MSG1 "0b0110001"
179#define ILUPEU_TLP_FMT_TYPE_MSG2 "0b0110010"
180#define ILUPEU_TLP_FMT_TYPE_MSG3 "0b0110011"
181#define ILUPEU_TLP_FMT_TYPE_MSG4 "0b0110100"
182#define ILUPEU_TLP_FMT_TYPE_MSG5 "0b0110101"
183#define ILUPEU_TLP_FMT_TYPE_MSG6 "0b0110110"
184#define ILUPEU_TLP_FMT_TYPE_MSG7 "0b0110111"
185#define ILUPEU_TLP_FMT_TYPE_MSGD0 "0b1110000"
186#define ILUPEU_TLP_FMT_TYPE_MSGD1 "0b1110001"
187#define ILUPEU_TLP_FMT_TYPE_MSGD2 "0b1110010"
188#define ILUPEU_TLP_FMT_TYPE_MSGD3 "0b1110011"
189#define ILUPEU_TLP_FMT_TYPE_MSGD4 "0b1110100"
190#define ILUPEU_TLP_FMT_TYPE_MSGD5 "0b1110101"
191#define ILUPEU_TLP_FMT_TYPE_MSGD6 "0b1110110"
192#define ILUPEU_TLP_FMT_TYPE_MSGD7 "0b1110111"
193#define ILUPEU_TLP_FMT_TYPE_CPL "0b0001010"
194#define ILUPEU_TLP_FMT_TYPE_CPLD "0b1001010"
195#define ILUPEU_TLP_FMT_TYPE_CPLLK "0b0001011"
196#define ILUPEU_TLP_FMT_TYPE_CPLDLK "0b1001011"
197
198
199
200// TLP Commands
201#define ILUPEU_TLP_CMD_IDLE "0b000"
202#define ILUPEU_TLP_CMD_ABORT_EOP "0b001 "
203#define ILUPEU_TLP_CMD_DATA "0b010"
204#define ILUPEU_TLP_CMD_DATA_EOP "0b011"
205#define ILUPEU_TLP_CMD_RESERVED_A "0b100"
206#define ILUPEU_TLP_CMD_RESERVED_B "0b101"
207#define ILUPEU_TLP_CMD_SOP_DATA "0b110"
208#define ILUPEU_TLP_CMD_SOP_DATA_EOP "0b111"
209
210
211
212// TLP Status
213#define ILUPEU_TLP_STATUS_NO_ERROR "0b0000"
214#define ILUPEU_TLP_STATUS_RECEIVE_ERROR "0b0001"
215#define ILUPEU_TLP_STATUS_CRC_ERROR "0b0010"
216#define ILUPEU_TLP_STATUS_EDB_INDICATION "0b0011"
217#define ILUPEU_TLP_STATUS_MISSING_EOP_ERROR "0b0100"
218#define ILUPEU_TLP_STATUS_PACKET_LENGTH_ERROR "0b0101"
219#define ILUPEU_TLP_STATUS_DATA_PARITY_ERROR "0b0110"
220
221
222
223// FC Type
224#define ILUPEU_FC_TYPE_IDLE "0b000"
225#define ILUPEU_FC_TYPE_INIT_COMPLETION "0b001"
226#define ILUPEU_FC_TYPE_INIT_NON_POSTED "0b010"
227#define ILUPEU_FC_TYPE_INIT_POSTED "0b011"
228#define ILUPEU_FC_TYPE_RESERVED "0b100"
229#define ILUPEU_FC_TYPE_UPDATE_COMPLETION "0b101"
230#define ILUPEU_FC_TYPE_UPDATE_NON_POSTED "0b110"
231#define ILUPEU_FC_TYPE_UPDATE_POSTED "0b111"
232#define ILUPEU_FC_HEADER_CREDIT_WIDTH 8
233#define ILUPEU_FC_DATA_CREDIT_WIDTH 12
234
235
236//Defines for 4DW 128 bit header
237#define ILUPEU_TLP_HDR_WIDTH 128
238#define ILUPEU_TLP_HDR_DW0_BITS (127,96)
239#define ILUPEU_TLP_HDR_DW1_BITS (95,64)
240#define ILUPEU_TLP_HDR_DW2_BITS (63,32)
241#define ILUPEU_TLP_HDR_DW3_BITS (31,0)
242#define ILUPEU_TLP_HDR_BITS (127,0)
243#define ILUPEU_TLP_HDR_FMT_BITS (126,125)
244#define ILUPEU_TLP_HDR_FMT_DATA_BITS (126,126)
245#define ILUPEU_TLP_HDR_FMT_4DW_BITS (125,125)
246#define ILUPEU_TLP_HDR_TYPE_BITS (124,120)
247#define ILUPEU_TLP_HDR_FMT_TYPE_BITS (126,120)
248#define ILUPEU_TLP_HDR_TC_BITS (118,116)
249#define ILUPEU_TLP_HDR_TD_BITS (111,111)
250#define ILUPEU_TLP_HDR_EP_BITS (110,110)
251#define ILUPEU_TLP_HDR_ATTR_BITS (109,108)
252#define ILUPEU_TLP_HDR_RO_BITS (109,109)
253#define ILUPEU_TLP_HDR_SNOOP_BITS (108,108)
254#define ILUPEU_TLP_HDR_LEN_BITS (105,96)
255#define ILUPEU_TLP_HDR_REQ_ID_BITS (95,80)
256#define ILUPEU_TLP_HDR_REQ_BUS_NUM_BITS (95,88)
257#define ILUPEU_TLP_HDR_REQ_DEV_NUM_BITS (87,83)
258#define ILUPEU_TLP_HDR_REQ_FUNC_NUM_BITS (82,80)
259#define ILUPEU_TLP_HDR_TAG_BITS (79,72)
260#define ILUPEU_TLP_HDR_LAST_DWBE_BITS (71,68)
261#define ILUPEU_TLP_HDR_FIRST_DWBE_BITS (67,64)
262#define ILUPEU_TLP_HDR_MSG_CODE_BITS (71,64)
263#define ILUPEU_TLP_HDR_ADDR64_UPPER_BITS (63,32)
264#define ILUPEU_TLP_HDR_ADDR64_LOWER_BITS (31,2)
265#define ILUPEU_TLP_HDR_ADDR32_BITS (63,34)
266#define ILUPEU_TLP_HDR_CPL_ID_BITS (95,80)
267#define ILUPEU_TLP_HDR_CPL_CPL_BUS_NUM_BITS (95,88)
268#define ILUPEU_TLP_HDR_CPL_CPL_DEV_NUM_BITS (87,83)
269#define ILUPEU_TLP_HDR_CPL_CPL_FUNC_NUM_BITS (82,80)
270#define ILUPEU_TLP_HDR_CPL_STATUS_BITS (79,77)
271#define ILUPEU_TLP_HDR_CPL_BCM_BITS (76,76)
272#define ILUPEU_TLP_HDR_CPL_BYTECOUNT_BITS (75,64)
273#define ILUPEU_TLP_HDR_CPL_REQ_ID_BITS (63,48)
274#define ILUPEU_TLP_HDR_CPL_REQ_BUS_NUM_BITS (63,56)
275#define ILUPEU_TLP_HDR_CPL_REQ_DEV_NUM_BITS (55,51)
276#define ILUPEU_TLP_HDR_CPL_REQ_FUNC_NUM_BITS (50,48)
277#define ILUPEU_TLP_HDR_CPL_TAG_BITS (47,40)
278#define ILUPEU_TLP_HDR_CPL_LOWADDR_BITS (38,32)
279#define ILUPEU_TLP_HDR_CFG_BUS_NUM_BITS (63,56)
280#define ILUPEU_TLP_HDR_CFG_DEV_NUM_BITS (55,51)
281#define ILUPEU_TLP_HDR_CFG_FUNC_NUM_BITS (50,48)
282#define ILUPEU_TLP_HDR_CFG_EXT_REG_NUM_BITS (43,40)
283#define ILUPEU_TLP_HDR_CFG_REG_NUM_BITS (39,34)
284#define ILUPEU_TLP_HDR_MSG_DW3_BITS (63,32)
285#define ILUPEU_TLP_HDR_MSG_DW4_BITS (31,0)
286#define ILUPEU_TLP_HDR_MSG_VNDR_CPL_BUS_NUM_BITS (63,56)
287#define ILUPEU_TLP_HDR_MSG_VNDR_CPL_DEV_NUM_BITS (55,51)
288#define ILUPEU_TLP_HDR_MSG_VNDR_CPL_FUNC_NUM_BITS (50,48)
289#define ILUPEU_TLP_HDR_MSG_VNDR_VNDR_ID (47,32)
290
291
292
293
294
295#define ILUPEU_DW_WIDTH 32
296#define ILUPEU_DW_BITS (31,0)
297#define ILUPEU_DW_BYTE_0_BITS (31,24)
298#define ILUPEU_DW_BYTE_1_BITS (23,16)
299#define ILUPEU_DW_BYTE_2_BITS (15,8)
300#define ILUPEU_DW_BYTE_3_BITS (7,0)
301
302
303#define ILUPEU_TLP_HDR_FMT_DATA_3DW "0b10"
304#define ILUPEU_TLP_HDR_FMT_DATA_4DW "0b11"
305#define ILUPEU_TLP_HDR_FMT_NO_DATA_3DW "0b00"
306#define ILUPEU_TLP_HDR_FMT_NO_DATA_4DW "0b01"
307
308
309
310#define ILUPEU_TLP_TYPE_MEM "0b00000"
311#define ILUPEU_TLP_TYPE_MEM_LK "0b00001"
312#define ILUPEU_TLP_TYPE_CPL "0b01010"
313#define ILUPEU_TLP_TYPE_CPL_LK "0b01011"
314#define ILUPEU_TLP_TYPE_CFG0 "0b00100"
315#define ILUPEU_TLP_TYPE_CFG1 "0b00101"
316#define ILUPEU_TLP_TYPE_IO "0b00010"
317#define ILUPEU_TLP_TYPE_MSG "0b10000"
318#define ILUPEU_TLP_TYPE_MSG_RC_MASK "0b00111"
319#define ILUPEU_TLP_TYPE_VALID_00 sc_uint<64>(0x00000c37)
320#define ILUPEU_TLP_TYPE_VALID_01 sc_uint<64>(0x00ff0003)
321#define ILUPEU_TLP_TYPE_VALID_10 sc_uint<64>(0x00000c35)
322#define ILUPEU_TLP_TYPE_VALID_11 sc_uint<64>(0x00ff0001)
323
324
325#define ILUPEU_TLP_CPL_STATUS_SC "0b000"
326#define ILUPEU_TLP_CPL_STATUS_UR "0b001"
327#define ILUPEU_TLP_CPL_STATUS_CRS "0b010"
328#define ILUPEU_TLP_CPL_STATUS_CA "0b100"
329#define ILUPEU_TLP_CPL_STATUS_TIMEOUT "0b111"
330#define ILUPEU_TLP_CPL_STATUS_RSVD1 "0b011"
331#define ILUPEU_TLP_CPL_STATUS_RSVD2 "0b101"
332#define ILUPEU_TLP_CPL_STATUS_RSVD3 "0b110"
333#define ILUPEU_TLP_CPL_STATUS_RSVD4 "0b111"
334
335//L2T defines
336#define ILUPEU_L2T_ITP_CMD_WIDTH 3
337#define ILUPEU_L2T_ITP_CMD_BITS (2,0)
338#define ILUPEU_L2T_ITP_CMD_EOP_VLD_BITS (0,0)
339#define ILUPEU_L2T_ITP_CMD_DATA_VLD_BITS (1,1)
340#define ILUPEU_L2T_ITP_CMD_SOP_VLD_BITS (2,2)
341#define ILUPEU_L2T_ITP_POS_WIDTH 4
342#define ILUPEU_L2T_ITP_POS_SOP_WIDTH 2
343#define ILUPEU_L2T_ITP_POS_EOP_WIDTH 2
344#define ILUPEU_L2T_ITP_POS_BITS (3,0)
345#define ILUPEU_L2T_ITP_POS_SOP_BITS (3,2)
346#define ILUPEU_L2T_ITP_POS_EOP_BITS (1,0)
347#define ILUPEU_L2T_ITP_POS_SOP_POS0 "0b00"
348#define ILUPEU_L2T_ITP_POS_SOP_POS1 "0b01"
349#define ILUPEU_L2T_ITP_POS_SOP_POS2 "0b10"
350#define ILUPEU_L2T_ITP_POS_SOP_POS3 "0b11"
351#define ILUPEU_L2T_ITP_POS_EOP_POS0 "0b00"
352#define ILUPEU_L2T_ITP_POS_EOP_POS1 "0b01"
353#define ILUPEU_L2T_ITP_POS_EOP_POS2 "0b10"
354#define ILUPEU_L2T_ITP_POS_EOP_POS3 "0b11"
355
356//T2L defines
357#define ILUPEU_T2L_LNK_CAP_WIDTH 32
358#define ILUPEU_T2L_LNK_CAP_MAX_LNK_SPD_WIDTH 4
359#define ILUPEU_T2L_LNK_CAP_MAX_LNK_SPD_BITS (3,0)
360#define ILUPEU_T2L_LNK_CAP_MAX_LNK_WDTH_WIDTH 6
361#define ILUPEU_T2L_LNK_CAP_MAX_LNK_WDTH_BITS (9,4)
362
363#define ILUPEU_T2L_LNK_CAP_ASPM_WIDTH 2
364#define ILUPEU_T2L_LNK_CAP_ASPM_BITS (11,10)
365#define ILUPEU_T2L_LNK_CAP_LOS_EXIT_LAT_WIDTH 3
366#define ILUPEU_T2L_LNK_CAP_LOS_EXIT_LAT_BITS (14,12)
367#define ILUPEU_T2L_LNK_CAP_L1_EXIT_LAT_WIDTH 3
368#define ILUPEU_T2L_LNK_CAP_L1_EXIT_LAT_BITS (17,15)
369#define ILUPEU_T2L_LNK_CAP_PORT_NMBR_WIDTH 8
370#define ILUPEU_T2L_LNK_CAP_PORT_NMBR_BITS (31,24)
371
372#define ILUPEU_T2L_LNK_CTRL_WIDTH 16
373#define ILUPEU_T2L_LNK_CTRL_ASPM_WIDTH 2
374#define ILUPEU_T2L_LNK_CTRL_ASPM_BITS (1,0)
375#define ILUPEU_T2L_LNK_CTRL_RCB_WIDTH 1
376#define ILUPEU_T2L_LNK_CTRL_RCB_BITS (3,3)
377#define ILUPEU_T2L_LNK_CTRL_LNK_DISABL_WIDTH 1
378#define ILUPEU_T2L_LNK_CTRL_LNK_DISABL_BITS (4,4)
379#define ILUPEU_T2L_LNK_CTRL_RETRAIN_LNK_WIDTH 1
380#define ILUPEU_T2L_LNK_CTRL_RETRAIN_LNK_BITS (5,5)
381#define ILUPEU_T2L_LNK_CTRL_CMN_CLK_CFG_WIDTH 1
382#define ILUPEU_T2L_LNK_CTRL_CMN_CLK_CFG_BITS (6,6)
383#define ILUPEU_T2L_LNK_CTRL_EXTND_SYNC_WIDTH 1
384#define ILUPEU_T2L_LNK_CTRL_EXTND_SYNC_BITS (7,7)
385
386#define ILUPEU_T2L_LNK_CFG_WIDTH 8
387#define ILUPEU_T2L_LNK_CFG_PORT_CFG_WIDTH 1
388#define ILUPEU_T2L_LNK_CFG_PORT_CFG_BITS (0,0)
389#define ILUPEU_T2L_LNK_CFG_SLOT_CLK_CFG_WIDTH 1
390#define ILUPEU_T2L_LNK_CFG_SLOT_CLK_CFG_BITS (1,1)
391
392
393// PM DLLP Type
394#define ILUPEU_PM_DLLP_TYPE_WIDTH 3
395#define ILUPEU_PM_DLLP_TYPE_IDLE "0b000"
396#define ILUPEU_PM_DLLP_TYPE_ENTER_L1 "0b001"
397#define ILUPEU_PM_DLLP_TYPE_ENTER_L23 "0b010"
398#define ILUPEU_PM_DLLP_TYPE_ACTIVE_STATE_REQ_L1 "0b011"
399#define ILUPEU_PM_DLLP_TYPE_REQ_ACK "0b100"
400
401
402#endif
403
404