projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / model / pcie / peu / peu_top.cpp
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: peu_top.cpp
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include "peu_top.h"
36
37#ifndef __EDG__
38
39#include "pcie_common/config.hpp"
40#include "pcie_common/logger.hpp"
41
42
43class set_time_resolution
44{
45 public:
46 set_time_resolution()
47 {
48 sc_set_time_resolution(1, SC_PS);
49 sc_set_default_time_unit(1, SC_PS);
50 }
51};
52
53static int SetTimeResolution()
54{
55 new set_time_resolution();
56 return 1;
57}
58
59static int time_resolution_is_set = SetTimeResolution();
60
61
62USING_NAMESPACE(Logger);
63logger* logger::inst = 0;
64data_scrambler *data_scrambler::scrambler = 0;
65data_scrambler *data_scrambler::descrambler = 0;
66running_disparity *running_disparity::disparity = 0;
67running_disparity *running_disparity::rx_disparity = 0;
68int packetRef::ref_id_ctr = 0;
69
70peu_top::peu_top ( sc_module_name module_name ) :
71 sc_module (module_name)
72{
73 LOG_DEBUG << " > PEU_TOP ()::ctor()";
74
75
76 LOG_DEBUG << " > PEU_TOP ()::ctor()";
77
78 cout << "Number of arguments = " << sc_argc() << endl;
79 for (int i = 0; i < sc_argc(); i++) {
80 LOG_DEBUG << "Command Arg " << i << " " << sc_argv()[i];
81 if (strcmp(sc_argv()[i], "-SYSC_LOG_LEVEL=ALWAYS") == 0) {
82 logger::instance()->log_level = (Logger::LogLevel) Logger::ALWAYS;
83 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_ERROR") == 0) {
84 logger::instance()->log_level = (Logger::LogLevel) Logger::ERROR;
85 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_WARNING") == 0) {
86 logger::instance()->log_level = (Logger::LogLevel) Logger::WARNING;
87 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_NORMAL") == 0) {
88 logger::instance()->log_level = (Logger::LogLevel) Logger::NORMAL;
89 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_VERBOSE") == 0) {
90 logger::instance()->log_level = (Logger::LogLevel) Logger::VERBOSE;
91 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_INFO") == 0) {
92 logger::instance()->log_level = (Logger::LogLevel) Logger::INFO;
93 } else if (strcmp(sc_argv()[i], "-SYSC_LOG_DEBUG") == 0) {
94 logger::instance()->log_level = (Logger::LogLevel) Logger::DEBUG;
95 }
96 }
97
98
99 csr_i = new csr_top<NUM_CSR_PORTS> ("CSR_TOP",&global_event,&global_event_type);
100 peu_csr_i = new peu_csr ("PEU_CSR");
101 pcie_i = new pcie_top("PCIE_TOP", &global_event,&global_event_type);
102 ltssm_i = new ltssm("LTSSM");
103 peu_csr_omni_i = new peu_csr_omni("PEU_CSR_OMNI");
104 ilu_intf_i = new ilu_intf("ILU_INTF", &global_event,&global_event_type);
105 tl_in_data_chnl = new data_channel("TL_INGRESS_CHNL",&global_event,&global_event_type);
106 tl_req_data_chnl = new data_channel("TL_REQ_CHNL", &global_event,&global_event_type);
107 tl_cmpl_data_chnl = new data_channel("TL_CMPL_CHNL", &global_event,&global_event_type);
108 tl_cto_req_chnl = new tlm_fifo_channel <sc_uint<5> > ("TL_CTO_REQ_CHNL");
109
110
111 ilu_intf_i->in_pkt_port(*tl_in_data_chnl);
112 ilu_intf_i->req_pkt_port(*tl_req_data_chnl);
113 ilu_intf_i->cmpl_pkt_port(*tl_cmpl_data_chnl);
114
115 ilu_intf_i->cto_req_port(tl_cto_req_chnl->get_data_export);
116
117 pcie_i->tl->m_etl->req_port(*tl_req_data_chnl);
118 pcie_i->tl->m_etl->cmpl_port(*tl_cmpl_data_chnl);
119 pcie_i->tl->m_itl->d_out_port(*tl_in_data_chnl);
120 pcie_i->tl->m_rsb->cto_req_port(tl_cto_req_chnl->put_data_export);
121
122 // CSR connections to requesting modules
123 peu_csr_i->csr_port(csr_i->chnl[0].target_export);
124 ltssm_i->csr_port(csr_i->chnl[2].target_export);
125 pcie_i->dll->csr_port(csr_i->chnl[1].target_export);
126 peu_csr_omni_i->csr_port(csr_i->chnl[3].target_export);
127 pcie_i->tl->m_etl->csr_port(csr_i->chnl[4].target_export);
128 pcie_i->tl->m_itl->csr_port(csr_i->chnl[5].target_export);
129 pcie_i->tl->csr_port(csr_i->chnl[6].target_export);
130 ilu_intf_i->csr_port(csr_i->chnl[7].target_export);
131 pcie_i->tl->m_rsb->csr_port(csr_i->chnl[8].target_export);
132
133 peu_csr_i->csr_if_clk(l2t_clk);
134 peu_csr_i->rst_l(j2p_rst_l);
135 peu_csr_i->ring_data_in(dcd2csr_ring_data);
136 peu_csr_i->ring_data_out(csr2dcs_ring_data);
137
138 // peu_top connections to PL
139 pcie_i->deser_data0(lane_in0);
140 pcie_i->deser_data1(lane_in1);
141 pcie_i->deser_data2(lane_in2);
142 pcie_i->deser_data3(lane_in3);
143 pcie_i->deser_data4(lane_in4);
144 pcie_i->deser_data5(lane_in5);
145 pcie_i->deser_data6(lane_in6);
146 pcie_i->deser_data7(lane_in7);
147 pcie_i->deser_data8(lane_in8);
148 pcie_i->deser_data9(lane_in9);
149
150 pcie_i->deser_data0_b(lane_in0_b);
151 pcie_i->deser_data1_b(lane_in1_b);
152 pcie_i->deser_data2_b(lane_in2_b);
153 pcie_i->deser_data3_b(lane_in3_b);
154 pcie_i->deser_data4_b(lane_in4_b);
155 pcie_i->deser_data5_b(lane_in5_b);
156 pcie_i->deser_data6_b(lane_in6_b);
157 pcie_i->deser_data7_b(lane_in7_b);
158 pcie_i->deser_data8_b(lane_in8_b);
159 pcie_i->deser_data9_b(lane_in9_b);
160 pcie_i->frm_boundary_deser(frm_boundary_deser);
161 pcie_i->disable_scrambling(disable_scrambling);
162
163 pcie_i->link_clk(link_clk);
164 pcie_i->encoded_data0(encoded_data0);
165 pcie_i->encoded_data1(encoded_data1);
166 pcie_i->encoded_data2(encoded_data2);
167 pcie_i->encoded_data3(encoded_data3);
168 pcie_i->encoded_data4(encoded_data4);
169 pcie_i->encoded_data5(encoded_data5);
170 pcie_i->encoded_data6(encoded_data6);
171 pcie_i->encoded_data7(encoded_data7);
172 pcie_i->encoded_data8(encoded_data8);
173 pcie_i->encoded_data9(encoded_data9);
174 pcie_i->sym_boundary(sym_boundary);
175 pcie_i->init_done(init_done);
176 pcie_i->init_done_rx(init_done_rx);
177 pcie_i->pl->q_not_empty(q_not_empty);
178 pcie_i->pl->frame_boundary_ltssm_tx(frame_boundary_ltssm_tx);
179 pcie_i->pl->last_idle_frame(last_idle_frame);
180 pcie_i->pl->reset_l(j2p_rst_l);
181 pcie_i->pl->reset_por_l(j2p_por_l);
182 pcie_i->pl->start_reinit(start_reinit);
183 pcie_i->pl->stage_reinit(stage_reinit);
184 pcie_i->pl->ts1_pattern_received(ts1_pattern_received);
185
186 // LTSSM connections
187 ltssm_i->lane_in(lane_in);
188 ltssm_i->lane_in_bar(lane_in_bar);
189 ltssm_i->link_clk(link_clk);
190 ltssm_i->lane_out(lane_out);
191 ltssm_i->lane_out_bar(lane_out_bar);
192 ltssm_i->disable_scrambling(disable_scrambling);
193 ltssm_i->init_done(init_done);
194 ltssm_i->init_done_rx(init_done_rx);
195 ltssm_i->frame_boundary_rx(frame_boundary_ltssm_rx);
196 ltssm_i->frame_boundary_tx(frame_boundary_ltssm_tx);
197 ltssm_i->reset_l(j2p_rst_l);
198 ltssm_i->reset_por_l(j2p_por_l);
199 ltssm_i->q_not_empty(q_not_empty);
200 ltssm_i->last_idle_frame(last_idle_frame);
201 ltssm_i->last_idle_frame_retraining(last_idle_frame_retraining);
202 ltssm_i->start_reinit(start_reinit);
203 ltssm_i->ts1_pattern_received(ts1_pattern_received);
204
205 /// ILU Intf
206 ilu_intf_i->clk(l2t_clk);
207 ilu_intf_i->rst_l(j2p_rst_l);
208 ilu_intf_i->d2p_ihb_clk(d2p_ihb_clk);
209 ilu_intf_i->d2p_ihb_rd(d2p_ihb_rd);
210 ilu_intf_i->d2p_ihb_addr(d2p_ihb_addr);
211 ilu_intf_i->p2d_ihb_data(p2d_ihb_data);
212 ilu_intf_i->p2d_ihb_dpar(p2d_ihb_dpar);
213 ilu_intf_i->p2d_ihb_wptr(p2d_ihb_wptr);
214 ilu_intf_i->d2p_idb_clk(d2p_idb_clk);
215 ilu_intf_i->d2p_idb_rd(d2p_idb_rd);
216 ilu_intf_i->d2p_idb_addr(d2p_idb_addr);
217 ilu_intf_i->p2d_idb_data(p2d_idb_data);
218 ilu_intf_i->p2d_idb_dpar(p2d_idb_dpar);
219 ilu_intf_i->d2p_ibc_req(d2p_ibc_req);
220 ilu_intf_i->p2d_ibc_ack(p2d_ibc_ack);
221 ilu_intf_i->d2p_ibc_nhc(d2p_ibc_nhc);
222 ilu_intf_i->d2p_ibc_phc(d2p_ibc_phc);
223 ilu_intf_i->d2p_ibc_pdc(d2p_ibc_pdc);
224 ilu_intf_i->p2d_cto_req(p2d_cto_req);
225 ilu_intf_i->p2d_cto_tag(p2d_cto_tag);
226 ilu_intf_i->d2p_cto_ack(d2p_cto_ack);
227 ilu_intf_i->p2d_drain(p2d_drain);
228 ilu_intf_i->p2d_mps(p2d_mps);
229 ilu_intf_i->p2d_ue_int(p2d_ue_int);
230 ilu_intf_i->p2d_ce_int(p2d_ce_int);
231 ilu_intf_i->p2d_oe_int(p2d_oe_int);
232 ilu_intf_i->d2p_ech_wptr(d2p_ech_wptr);
233 ilu_intf_i->p2d_ech_rptr(p2d_ech_rptr);
234 ilu_intf_i->d2p_erh_wptr(d2p_erh_wptr);
235 ilu_intf_i->p2d_erh_rptr(p2d_erh_rptr);
236 ilu_intf_i->p2d_ecd_rptr(p2d_ecd_rptr);
237 ilu_intf_i->p2d_erd_rptr(p2d_erd_rptr);
238 ilu_intf_i->d2p_ehb_we(d2p_ehb_we);
239 ilu_intf_i->d2p_ehb_addr(d2p_ehb_addr);
240 ilu_intf_i->d2p_ehb_data(d2p_ehb_data);
241 ilu_intf_i->d2p_ehb_dpar(d2p_ehb_dpar);
242 ilu_intf_i->d2p_edb_we(d2p_edb_we);
243 ilu_intf_i->d2p_edb_addr(d2p_edb_addr);
244 ilu_intf_i->d2p_edb_data(d2p_edb_data);
245 ilu_intf_i->d2p_edb_dpar(d2p_edb_dpar);
246
247
248 /// PEU CSR OMNI Intf
249 peu_csr_omni_i->tlu_ctl_csrbus_read_data(tlu_ctl_csrbus_read_data);
250 peu_csr_omni_i->tlu_ctl_csrbus_omni_data(tlu_ctl_csrbus_omni_data);
251 peu_csr_omni_i->ilu_err_rw1s_alias_csrbus_read_data(ilu_err_rw1s_alias_csrbus_read_data);
252 peu_csr_omni_i->ilu_err_rw1s_alias_csrbus_omni_data(ilu_err_rw1s_alias_csrbus_omni_data);
253 peu_csr_omni_i->tlu_sts_csrbus_read_data(tlu_sts_csrbus_read_data);
254 peu_csr_omni_i->tlu_sts_csrbus_omni_data(tlu_sts_csrbus_omni_data);
255 peu_csr_omni_i->trn_off_csrbus_read_data(trn_off_csrbus_read_data);
256 peu_csr_omni_i->trn_off_csrbus_omni_data(trn_off_csrbus_omni_data);
257 peu_csr_omni_i->tlu_ici_csrbus_read_data(tlu_ici_csrbus_read_data);
258 peu_csr_omni_i->tlu_ici_csrbus_omni_data(tlu_ici_csrbus_omni_data);
259 peu_csr_omni_i->tlu_diag_csrbus_read_data(tlu_diag_csrbus_read_data);
260 peu_csr_omni_i->tlu_diag_csrbus_omni_data(tlu_diag_csrbus_omni_data);
261 peu_csr_omni_i->tlu_ecc_csrbus_read_data(tlu_ecc_csrbus_read_data);
262 peu_csr_omni_i->tlu_ecc_csrbus_omni_data(tlu_ecc_csrbus_omni_data);
263 peu_csr_omni_i->tlu_ecl_csrbus_read_data(tlu_ecl_csrbus_read_data);
264 peu_csr_omni_i->tlu_ecl_csrbus_omni_data(tlu_ecl_csrbus_omni_data);
265 peu_csr_omni_i->tlu_erb_csrbus_read_data(tlu_erb_csrbus_read_data);
266 peu_csr_omni_i->tlu_erb_csrbus_omni_data(tlu_erb_csrbus_omni_data);
267 peu_csr_omni_i->tlu_ica_csrbus_read_data(tlu_ica_csrbus_read_data);
268 peu_csr_omni_i->tlu_ica_csrbus_omni_data(tlu_ica_csrbus_omni_data);
269 peu_csr_omni_i->tlu_icr_csrbus_read_data(tlu_icr_csrbus_read_data);
270 peu_csr_omni_i->tlu_icr_csrbus_omni_data(tlu_icr_csrbus_omni_data);
271 peu_csr_omni_i->oe_log_csrbus_read_data(oe_log_csrbus_read_data);
272 peu_csr_omni_i->oe_log_csrbus_omni_data(oe_log_csrbus_omni_data);
273 peu_csr_omni_i->oe_int_en_csrbus_read_data(oe_int_en_csrbus_read_data);
274 peu_csr_omni_i->oe_int_en_csrbus_omni_data(oe_int_en_csrbus_omni_data);
275
276 peu_csr_omni_i->oe_en_err_csrbus_read_data(oe_en_err_csrbus_read_data);
277 peu_csr_omni_i->oe_en_err_csrbus_omni_data(oe_en_err_csrbus_omni_data);
278
279 peu_csr_omni_i->oe_err_rw1c_alias_csrbus_read_data(oe_err_rw1c_alias_csrbus_read_data);
280 peu_csr_omni_i->oe_err_rw1c_alias_csrbus_omni_data(oe_err_rw1c_alias_csrbus_omni_data);
281
282 peu_csr_omni_i->oe_err_rw1s_alias_csrbus_read_data(oe_err_rw1s_alias_csrbus_read_data);
283 peu_csr_omni_i->oe_err_rw1s_alias_csrbus_omni_data(oe_err_rw1s_alias_csrbus_omni_data);
284
285 peu_csr_omni_i->roe_hdr1_csrbus_read_data(roe_hdr1_csrbus_read_data);
286 peu_csr_omni_i->roe_hdr1_csrbus_omni_data(roe_hdr1_csrbus_omni_data);
287
288 peu_csr_omni_i->roe_hdr2_csrbus_read_data(roe_hdr2_csrbus_read_data);
289 peu_csr_omni_i->roe_hdr2_csrbus_omni_data(roe_hdr2_csrbus_omni_data);
290
291 peu_csr_omni_i->toe_hdr1_csrbus_read_data(toe_hdr1_csrbus_read_data);
292 peu_csr_omni_i->toe_hdr1_csrbus_omni_data(toe_hdr1_csrbus_omni_data);
293
294 peu_csr_omni_i->toe_hdr2_csrbus_read_data(toe_hdr2_csrbus_read_data);
295 peu_csr_omni_i->toe_hdr2_csrbus_omni_data(toe_hdr2_csrbus_omni_data);
296
297 peu_csr_omni_i->tlu_prfc_csrbus_read_data(tlu_prfc_csrbus_read_data);
298 peu_csr_omni_i->tlu_prfc_csrbus_omni_data(tlu_prfc_csrbus_omni_data);
299
300 peu_csr_omni_i->tlu_prf0_csrbus_read_data(tlu_prf0_csrbus_read_data);
301 peu_csr_omni_i->tlu_prf0_csrbus_omni_data(tlu_prf0_csrbus_omni_data);
302
303 peu_csr_omni_i->tlu_prf1_csrbus_read_data(tlu_prf1_csrbus_read_data);
304 peu_csr_omni_i->tlu_prf1_csrbus_omni_data(tlu_prf1_csrbus_omni_data);
305
306 peu_csr_omni_i->tlu_prf2_csrbus_read_data(tlu_prf2_csrbus_read_data);
307 peu_csr_omni_i->tlu_prf2_csrbus_omni_data(tlu_prf2_csrbus_omni_data);
308
309 peu_csr_omni_i->tlu_dbg_sel_a_csrbus_read_data(tlu_dbg_sel_a_csrbus_read_data);
310 peu_csr_omni_i->tlu_dbg_sel_a_csrbus_omni_data(tlu_dbg_sel_a_csrbus_omni_data);
311
312 peu_csr_omni_i->tlu_dbg_sel_b_csrbus_read_data(tlu_dbg_sel_b_csrbus_read_data);
313 peu_csr_omni_i->tlu_dbg_sel_b_csrbus_omni_data(tlu_dbg_sel_b_csrbus_omni_data);
314
315 peu_csr_omni_i->dev_cap_csrbus_read_data(dev_cap_csrbus_read_data);
316 peu_csr_omni_i->dev_cap_csrbus_omni_data(dev_cap_csrbus_omni_data);
317
318 peu_csr_omni_i->dev_ctl_csrbus_read_data(dev_ctl_csrbus_read_data);
319 peu_csr_omni_i->dev_ctl_csrbus_omni_data(dev_ctl_csrbus_omni_data);
320
321 peu_csr_omni_i->dev_sts_csrbus_read_data(dev_sts_csrbus_read_data);
322 peu_csr_omni_i->dev_sts_csrbus_omni_data(dev_sts_csrbus_omni_data);
323
324 peu_csr_omni_i->lnk_cap_csrbus_read_data(lnk_cap_csrbus_read_data);
325 peu_csr_omni_i->lnk_cap_csrbus_omni_data(lnk_cap_csrbus_omni_data);
326
327 peu_csr_omni_i->lnk_ctl_csrbus_read_data(lnk_ctl_csrbus_read_data);
328 peu_csr_omni_i->lnk_ctl_csrbus_omni_data(lnk_ctl_csrbus_omni_data);
329
330 peu_csr_omni_i->lnk_sts_csrbus_read_data(lnk_sts_csrbus_read_data);
331 peu_csr_omni_i->lnk_sts_csrbus_omni_data(lnk_sts_csrbus_omni_data);
332
333 peu_csr_omni_i->slt_cap_csrbus_read_data(slt_cap_csrbus_read_data);
334 peu_csr_omni_i->slt_cap_csrbus_omni_data(slt_cap_csrbus_omni_data);
335
336 peu_csr_omni_i->ue_log_csrbus_read_data(ue_log_csrbus_read_data);
337 peu_csr_omni_i->ue_log_csrbus_omni_data(ue_log_csrbus_omni_data);
338
339 peu_csr_omni_i->ue_int_en_csrbus_read_data(ue_int_en_csrbus_read_data);
340 peu_csr_omni_i->ue_int_en_csrbus_omni_data(ue_int_en_csrbus_omni_data);
341
342 peu_csr_omni_i->ue_en_err_csrbus_read_data(ue_en_err_csrbus_read_data);
343 peu_csr_omni_i->ue_en_err_csrbus_omni_data(ue_en_err_csrbus_omni_data);
344
345 peu_csr_omni_i->ue_err_rw1c_alias_csrbus_read_data(ue_err_rw1c_alias_csrbus_read_data);
346 peu_csr_omni_i->ue_err_rw1c_alias_csrbus_omni_data(ue_err_rw1c_alias_csrbus_omni_data);
347
348 peu_csr_omni_i->ue_err_rw1s_alias_csrbus_read_data(ue_err_rw1s_alias_csrbus_read_data);
349 peu_csr_omni_i->ue_err_rw1s_alias_csrbus_omni_data(ue_err_rw1s_alias_csrbus_omni_data);
350
351 peu_csr_omni_i->rue_hdr1_csrbus_read_data(rue_hdr1_csrbus_read_data);
352 peu_csr_omni_i->rue_hdr1_csrbus_omni_data(rue_hdr1_csrbus_omni_data);
353
354 peu_csr_omni_i->rue_hdr2_csrbus_read_data(rue_hdr2_csrbus_read_data);
355 peu_csr_omni_i->rue_hdr2_csrbus_omni_data(rue_hdr2_csrbus_omni_data);
356
357 peu_csr_omni_i->tue_hdr1_csrbus_read_data(tue_hdr1_csrbus_read_data);
358 peu_csr_omni_i->tue_hdr1_csrbus_omni_data(tue_hdr1_csrbus_omni_data);
359
360 peu_csr_omni_i->tue_hdr2_csrbus_read_data(tue_hdr2_csrbus_read_data);
361 peu_csr_omni_i->tue_hdr2_csrbus_omni_data(tue_hdr2_csrbus_omni_data);
362
363 peu_csr_omni_i->ce_log_csrbus_read_data(ce_log_csrbus_read_data);
364 peu_csr_omni_i->ce_log_csrbus_omni_data(ce_log_csrbus_omni_data);
365
366 peu_csr_omni_i->ce_int_en_csrbus_read_data(ce_int_en_csrbus_read_data);
367 peu_csr_omni_i->ce_int_en_csrbus_omni_data(ce_int_en_csrbus_omni_data);
368
369 peu_csr_omni_i->ce_en_err_csrbus_read_data(ce_en_err_csrbus_read_data);
370 peu_csr_omni_i->ce_en_err_csrbus_omni_data(ce_en_err_csrbus_omni_data);
371
372 peu_csr_omni_i->ce_err_rw1c_alias_csrbus_read_data(ce_err_rw1c_alias_csrbus_read_data);
373 peu_csr_omni_i->ce_err_rw1c_alias_csrbus_omni_data(ce_err_rw1c_alias_csrbus_omni_data);
374
375 peu_csr_omni_i->ce_err_rw1s_alias_csrbus_read_data(ce_err_rw1s_alias_csrbus_read_data);
376 peu_csr_omni_i->ce_err_rw1s_alias_csrbus_omni_data(ce_err_rw1s_alias_csrbus_omni_data);
377
378 peu_csr_omni_i->peu_dlpl_serdes_rev_csrbus_read_data(peu_dlpl_serdes_rev_csrbus_read_data);
379 peu_csr_omni_i->peu_dlpl_serdes_rev_csrbus_omni_data(peu_dlpl_serdes_rev_csrbus_omni_data);
380
381 peu_csr_omni_i->acknak_thresh_csrbus_read_data(acknak_thresh_csrbus_read_data);
382 peu_csr_omni_i->acknak_thresh_csrbus_omni_data(acknak_thresh_csrbus_omni_data);
383
384 peu_csr_omni_i->acknak_timer_csrbus_read_data(acknak_timer_csrbus_read_data);
385 peu_csr_omni_i->acknak_timer_csrbus_omni_data(acknak_timer_csrbus_omni_data);
386
387 peu_csr_omni_i->replay_tim_thresh_csrbus_read_data(replay_tim_thresh_csrbus_read_data);
388 peu_csr_omni_i->replay_tim_thresh_csrbus_omni_data(replay_tim_thresh_csrbus_omni_data);
389
390 peu_csr_omni_i->replay_timer_csrbus_read_data(replay_timer_csrbus_read_data);
391 peu_csr_omni_i->replay_timer_csrbus_omni_data(replay_timer_csrbus_omni_data);
392
393 peu_csr_omni_i->ven_dllp_msg_csrbus_read_data(ven_dllp_msg_csrbus_read_data);
394 peu_csr_omni_i->ven_dllp_msg_csrbus_omni_data(ven_dllp_msg_csrbus_omni_data);
395
396 peu_csr_omni_i->force_ltssm_csrbus_read_data(force_ltssm_csrbus_read_data);
397 peu_csr_omni_i->force_ltssm_csrbus_omni_data(force_ltssm_csrbus_omni_data);
398
399 peu_csr_omni_i->link_cfg_csrbus_read_data(link_cfg_csrbus_read_data);
400 peu_csr_omni_i->link_cfg_csrbus_omni_data(link_cfg_csrbus_omni_data);
401
402 peu_csr_omni_i->link_ctl_csrbus_read_data(link_ctl_csrbus_read_data);
403 peu_csr_omni_i->link_ctl_csrbus_omni_data(link_ctl_csrbus_omni_data);
404
405 peu_csr_omni_i->lane_skew_csrbus_read_data(lane_skew_csrbus_read_data);
406 peu_csr_omni_i->lane_skew_csrbus_omni_data(lane_skew_csrbus_omni_data);
407
408 peu_csr_omni_i->symbol_num_csrbus_read_data(symbol_num_csrbus_read_data);
409 peu_csr_omni_i->symbol_num_csrbus_omni_data(symbol_num_csrbus_omni_data);
410
411 peu_csr_omni_i->symbol_timer_csrbus_read_data(symbol_timer_csrbus_read_data);
412 peu_csr_omni_i->symbol_timer_csrbus_omni_data(symbol_timer_csrbus_omni_data);
413
414 peu_csr_omni_i->core_status_csrbus_read_data(core_status_csrbus_read_data);
415 peu_csr_omni_i->core_status_csrbus_omni_data(core_status_csrbus_omni_data);
416
417 peu_csr_omni_i->event_err_log_en_csrbus_read_data(event_err_log_en_csrbus_read_data);
418 peu_csr_omni_i->event_err_log_en_csrbus_omni_data(event_err_log_en_csrbus_omni_data);
419
420 peu_csr_omni_i->event_err_int_en_csrbus_read_data(event_err_int_en_csrbus_read_data);
421 peu_csr_omni_i->event_err_int_en_csrbus_omni_data(event_err_int_en_csrbus_omni_data);
422
423 peu_csr_omni_i->event_err_int_sts_csrbus_read_data(event_err_int_sts_csrbus_read_data);
424 peu_csr_omni_i->event_err_int_sts_csrbus_omni_data(event_err_int_sts_csrbus_omni_data);
425
426 peu_csr_omni_i->event_err_sts_clr_rw1c_alias_csrbus_read_data(event_err_sts_clr_rw1c_alias_csrbus_read_data);
427 peu_csr_omni_i->event_err_sts_clr_rw1c_alias_csrbus_omni_data(event_err_sts_clr_rw1c_alias_csrbus_omni_data);
428
429 peu_csr_omni_i->event_err_sts_clr_rw1s_alias_csrbus_read_data(event_err_sts_clr_rw1s_alias_csrbus_read_data);
430 peu_csr_omni_i->event_err_sts_clr_rw1s_alias_csrbus_omni_data(event_err_sts_clr_rw1s_alias_csrbus_omni_data);
431
432 peu_csr_omni_i->lnk_bit_err_cnt_1_csrbus_read_data(lnk_bit_err_cnt_1_csrbus_read_data);
433 peu_csr_omni_i->lnk_bit_err_cnt_1_csrbus_omni_data(lnk_bit_err_cnt_1_csrbus_omni_data);
434
435 peu_csr_omni_i->lnk_bit_err_cnt_2_csrbus_read_data(lnk_bit_err_cnt_2_csrbus_read_data);
436 peu_csr_omni_i->lnk_bit_err_cnt_2_csrbus_omni_data(lnk_bit_err_cnt_2_csrbus_omni_data);
437
438 peu_csr_omni_i->serdes_pll_csrbus_read_data(serdes_pll_csrbus_read_data);
439 peu_csr_omni_i->serdes_pll_csrbus_omni_data(serdes_pll_csrbus_omni_data);
440
441 peu_csr_omni_i->serdes_receiver_lane_ctl_csrbus_read_data(serdes_receiver_lane_ctl_csrbus_read_data);
442 peu_csr_omni_i->serdes_receiver_lane_ctl_csrbus_omni_data(serdes_receiver_lane_ctl_csrbus_omni_data);
443
444 peu_csr_omni_i->serdes_receiver_lane_status_csrbus_read_data(serdes_receiver_lane_status_csrbus_read_data);
445 peu_csr_omni_i->serdes_receiver_lane_status_csrbus_omni_data(serdes_receiver_lane_status_csrbus_omni_data);
446
447 peu_csr_omni_i->serdes_xmitter_lane_ctl_csrbus_read_data(serdes_xmitter_lane_ctl_csrbus_read_data);
448 peu_csr_omni_i->serdes_xmitter_lane_ctl_csrbus_omni_data(serdes_xmitter_lane_ctl_csrbus_omni_data);
449
450 peu_csr_omni_i->serdes_xmitter_lane_status_csrbus_read_data(serdes_xmitter_lane_status_csrbus_read_data);
451 peu_csr_omni_i->serdes_xmitter_lane_status_csrbus_omni_data(serdes_xmitter_lane_status_csrbus_omni_data);
452
453 peu_csr_omni_i->serdes_macro_test_cfg_csrbus_read_data(serdes_macro_test_cfg_csrbus_read_data);
454 peu_csr_omni_i->serdes_macro_test_cfg_csrbus_omni_data(serdes_macro_test_cfg_csrbus_omni_data);
455
456 LOG_DEBUG << " > PEU_TOP ()::ctor()";
457}
458
459#endif
Full OpenSPARC design & verification tarball including full HDL.