projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: peu_top.h | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #ifndef INC_peu_top_hpp__ | |
| 39 | #define INC_peu_top_hpp__ | |
| 40 | ||
| 41 | #include <systemc.h> | |
| 42 | ||
| 43 | #include "peu_defines.hpp" | |
| 44 | ||
| 45 | #ifdef LINK_1 | |
| 46 | #define LINK_WIDTH 1 | |
| 47 | #else | |
| 48 | #ifdef LINK_2 | |
| 49 | #define LINK_WIDTH 2 | |
| 50 | #else | |
| 51 | #ifdef LINK_4 | |
| 52 | #define LINK_WIDTH 4 | |
| 53 | #else | |
| 54 | #define LINK_WIDTH 8 | |
| 55 | #endif | |
| 56 | #endif | |
| 57 | #endif | |
| 58 | ||
| 59 | #define NUM_CSR_PORTS 9 | |
| 60 | ||
| 61 | #ifdef __EDG__ | |
| 62 | SC_MODULE (peu_top) | |
| 63 | { | |
| 64 | public: | |
| 65 | sc_in<bool> l2t_clk; | |
| 66 | sc_in<bool> j2p_rst_l; | |
| 67 | sc_in<bool> j2p_por_l; | |
| 68 | ||
| 69 | /** | |
| 70 | IHB Interface | |
| 71 | */ | |
| 72 | sc_in<bool> d2p_ihb_clk; // IHB clk | |
| 73 | sc_in<bool> d2p_ihb_rd; // Read En | |
| 74 | sc_in<sc_bv<D2P_IHB_ADDR_WDTH> > d2p_ihb_addr; // Addr | |
| 75 | sc_out<sc_bv<P2D_IHB_DATA_WDTH> > p2d_ihb_data; // Data | |
| 76 | sc_out<sc_bv<P2D_IHB_DPAR_WDTH> > p2d_ihb_dpar; // Data Parity | |
| 77 | sc_out<sc_bv<P2D_IHB_WPTR_WDTH> > p2d_ihb_wptr; // Wr Ptr (GC) | |
| 78 | ||
| 79 | /** | |
| 80 | IDB Interface | |
| 81 | */ | |
| 82 | sc_in<bool> d2p_idb_clk; // IDB clk | |
| 83 | sc_in<bool> d2p_idb_rd; // Read En | |
| 84 | sc_in<sc_bv<D2P_IDB_ADDR_WDTH> > d2p_idb_addr; // Addr | |
| 85 | sc_out<sc_bv<P2D_IDB_DATA_WDTH> > p2d_idb_data; // Data | |
| 86 | sc_out<sc_bv<P2D_IDB_DPAR_WDTH> > p2d_idb_dpar; // Data Parity | |
| 87 | ||
| 88 | /** | |
| 89 | Ingress Buffer Credit Interface | |
| 90 | */ | |
| 91 | sc_in<bool> d2p_ibc_req; // Ingr cr req | |
| 92 | sc_out<bool> p2d_ibc_ack; // Ack | |
| 93 | sc_in<sc_bv<D2P_IBC_NHC_WDTH> > d2p_ibc_nhc; // NPH credits | |
| 94 | sc_in<sc_bv<D2P_IBC_PHC_WDTH> > d2p_ibc_phc; // PH credits | |
| 95 | sc_in<sc_bv<D2P_IBC_PDC_WDTH> > d2p_ibc_pdc; // PD credits | |
| 96 | ||
| 97 | /** | |
| 98 | Completion Timeout Interface | |
| 99 | */ | |
| 100 | sc_out<bool> p2d_cto_req; | |
| 101 | sc_out<sc_bv<P2D_CTO_TAG_WDTH> > p2d_cto_tag; | |
| 102 | sc_in<bool> d2p_cto_ack; | |
| 103 | ||
| 104 | /** | |
| 105 | Status Interface | |
| 106 | */ | |
| 107 | sc_out<bool> p2d_drain; // Drain signal to ILU | |
| 108 | sc_out<sc_bv<P2D_MPS_WDTH> > p2d_mps; // Max Payld size | |
| 109 | sc_out<bool> p2d_ue_int; // uncorrectable error | |
| 110 | sc_out<bool> p2d_ce_int; // correctable error | |
| 111 | sc_out<bool> p2d_oe_int; // other error | |
| 112 | ||
| 113 | /** | |
| 114 | Buffer Management Interface (all pointer values are gray coded) | |
| 115 | */ | |
| 116 | sc_in<sc_bv<D2P_ECH_WPTR_WDTH> > d2p_ech_wptr; // Cpl buf EHB wr ptr | |
| 117 | sc_out<sc_bv<P2D_ECH_RPTR_WDTH> > p2d_ech_rptr; // Cpl buf EHB rd ptr | |
| 118 | sc_in<sc_bv<D2P_ERH_WPTR_WDTH> > d2p_erh_wptr; // Req buf EHB wr ptr | |
| 119 | sc_out<sc_bv<P2D_ERH_RPTR_WDTH> > p2d_erh_rptr; // Req buf EHB rd ptr | |
| 120 | sc_out<sc_bv<P2D_ECD_RPTR_WDTH> > p2d_ecd_rptr; // DMA cpl buf rd ptr | |
| 121 | sc_out<sc_bv<P2D_ERD_RPTR_WDTH> > p2d_erd_rptr; // PIO Wr buf rd ptr | |
| 122 | ||
| 123 | /** | |
| 124 | EHB Interfce | |
| 125 | */ | |
| 126 | sc_in<bool> d2p_ehb_we; // EHB Write | |
| 127 | sc_in<sc_bv<D2P_EHB_ADDR_WDTH> > d2p_ehb_addr; // EHB Wr ptr | |
| 128 | sc_in<sc_bv<D2P_EHB_DATA_WDTH> > d2p_ehb_data; // EHB record | |
| 129 | sc_in<sc_bv<D2P_EHB_DPAR_WDTH> > d2p_ehb_dpar; // EHB Wd Parity | |
| 130 | ||
| 131 | /** | |
| 132 | EDB Interfce | |
| 133 | */ | |
| 134 | sc_in<bool> d2p_edb_we; // EDB Write | |
| 135 | sc_in<sc_bv<D2P_EDB_ADDR_WDTH> > d2p_edb_addr; // EDB Wr ptr | |
| 136 | sc_in<sc_bv<D2P_EDB_DATA_WDTH> > d2p_edb_data; // EDB record | |
| 137 | sc_in<sc_bv<D2P_EDB_DPAR_WDTH> > d2p_edb_dpar; // EDB Wd Parity | |
| 138 | ||
| 139 | /** | |
| 140 | CSR Ring Interface | |
| 141 | */ | |
| 142 | sc_in<bool> d2p_csr_req; | |
| 143 | sc_in<sc_bv<D2P_CSR_RING_WDTH> > d2p_csr_rcd; | |
| 144 | ||
| 145 | sc_in<bool> d2p_csr_ack; | |
| 146 | ||
| 147 | sc_in<sc_bv<CSR_RING_WDTH> > dcd2csr_ring_data; | |
| 148 | sc_out<sc_bv<CSR_RING_WDTH> > csr2dcs_ring_data; | |
| 149 | ||
| 150 | // Inputs from the deserializer | |
| 151 | sc_in<sc_lv<LINK_WIDTH> > lane_in0; | |
| 152 | sc_in<sc_lv<LINK_WIDTH> > lane_in1; | |
| 153 | sc_in<sc_lv<LINK_WIDTH> > lane_in2; | |
| 154 | sc_in<sc_lv<LINK_WIDTH> > lane_in3; | |
| 155 | sc_in<sc_lv<LINK_WIDTH> > lane_in4; | |
| 156 | sc_in<sc_lv<LINK_WIDTH> > lane_in5; | |
| 157 | sc_in<sc_lv<LINK_WIDTH> > lane_in6; | |
| 158 | sc_in<sc_lv<LINK_WIDTH> > lane_in7; | |
| 159 | sc_in<sc_lv<LINK_WIDTH> > lane_in8; | |
| 160 | sc_in<sc_lv<LINK_WIDTH> > lane_in9; | |
| 161 | ||
| 162 | sc_in<sc_lv<LINK_WIDTH> > lane_in0_b; | |
| 163 | sc_in<sc_lv<LINK_WIDTH> > lane_in1_b; | |
| 164 | sc_in<sc_lv<LINK_WIDTH> > lane_in2_b; | |
| 165 | sc_in<sc_lv<LINK_WIDTH> > lane_in3_b; | |
| 166 | sc_in<sc_lv<LINK_WIDTH> > lane_in4_b; | |
| 167 | sc_in<sc_lv<LINK_WIDTH> > lane_in5_b; | |
| 168 | sc_in<sc_lv<LINK_WIDTH> > lane_in6_b; | |
| 169 | sc_in<sc_lv<LINK_WIDTH> > lane_in7_b; | |
| 170 | sc_in<sc_lv<LINK_WIDTH> > lane_in8_b; | |
| 171 | sc_in<sc_lv<LINK_WIDTH> > lane_in9_b; | |
| 172 | sc_out<bool > sym_boundary; | |
| 173 | ||
| 174 | // LTSSM input ports | |
| 175 | sc_in<sc_lv<LINK_WIDTH> > lane_in; // For input going into the ltssm | |
| 176 | sc_in<sc_lv<LINK_WIDTH> > lane_in_bar; // For input going into the ltssm | |
| 177 | sc_in<bool> link_clk; // Input clk to ltssm | |
| 178 | ||
| 179 | ||
| 180 | // Outputs to the serializer | |
| 181 | sc_out<sc_lv<LINK_WIDTH> > encoded_data0; | |
| 182 | sc_out<sc_lv<LINK_WIDTH> > encoded_data1; | |
| 183 | sc_out<sc_lv<LINK_WIDTH> > encoded_data2; | |
| 184 | sc_out<sc_lv<LINK_WIDTH> > encoded_data3; | |
| 185 | sc_out<sc_lv<LINK_WIDTH> > encoded_data4; | |
| 186 | sc_out<sc_lv<LINK_WIDTH> > encoded_data5; | |
| 187 | sc_out<sc_lv<LINK_WIDTH> > encoded_data6; | |
| 188 | sc_out<sc_lv<LINK_WIDTH> > encoded_data7; | |
| 189 | sc_out<sc_lv<LINK_WIDTH> > encoded_data8; | |
| 190 | sc_out<sc_lv<LINK_WIDTH> > encoded_data9; | |
| 191 | sc_out<bool> ts1_pattern_received; | |
| 192 | sc_in<bool> frm_boundary_deser; | |
| 193 | // LTSSM output ports | |
| 194 | sc_out<sc_lv<LINK_WIDTH> > lane_out; // For output going from the ltssm | |
| 195 | sc_out<sc_lv<LINK_WIDTH> > lane_out_bar; // For output going from the ltssm | |
| 196 | sc_out<bool> init_done; // For init done signal from ltssm | |
| 197 | sc_out<bool> init_done_rx; // For init done signal from ltssm | |
| 198 | sc_out<bool> frame_boundary_ltssm_rx; // Output frame boundary from LTSSM | |
| 199 | sc_out<bool> frame_boundary_ltssm_tx; // Output frame boundary from LTSSM | |
| 200 | sc_out<bool> last_idle_frame; | |
| 201 | sc_out <bool> last_idle_frame_retraining; | |
| 202 | sc_out<bool> start_reinit; | |
| 203 | sc_out<bool> stage_reinit; | |
| 204 | sc_signal<bool> q_not_empty; | |
| 205 | sc_signal<bool> disable_scrambling; | |
| 206 | ||
| 207 | /// CSR Omni Interface Signals | |
| 208 | sc_out <sc_bv<64> > tlu_ctl_csrbus_read_data; | |
| 209 | sc_in <sc_bv<64> > tlu_ctl_csrbus_omni_data; | |
| 210 | ||
| 211 | sc_out <sc_bv<64> > ilu_err_rw1s_alias_csrbus_read_data; | |
| 212 | sc_in <sc_bv<64> > ilu_err_rw1s_alias_csrbus_omni_data; | |
| 213 | ||
| 214 | sc_out <sc_bv<64> > tlu_sts_csrbus_read_data; | |
| 215 | sc_in <sc_bv<64> > tlu_sts_csrbus_omni_data; | |
| 216 | ||
| 217 | sc_out <sc_bv<64> > trn_off_csrbus_read_data; | |
| 218 | sc_in <sc_bv<64> > trn_off_csrbus_omni_data; | |
| 219 | ||
| 220 | sc_out <sc_bv<64> > tlu_ici_csrbus_read_data; | |
| 221 | sc_in <sc_bv<64> > tlu_ici_csrbus_omni_data; | |
| 222 | ||
| 223 | sc_out <sc_bv<64> > tlu_diag_csrbus_read_data; | |
| 224 | sc_in <sc_bv<64> > tlu_diag_csrbus_omni_data; | |
| 225 | ||
| 226 | sc_out <sc_bv<64> > tlu_ecc_csrbus_read_data; | |
| 227 | sc_in <sc_bv<64> > tlu_ecc_csrbus_omni_data; | |
| 228 | ||
| 229 | sc_out <sc_bv<64> > tlu_ecl_csrbus_read_data; | |
| 230 | sc_in <sc_bv<64> > tlu_ecl_csrbus_omni_data; | |
| 231 | ||
| 232 | sc_out <sc_bv<64> > tlu_erb_csrbus_read_data; | |
| 233 | sc_in <sc_bv<64> > tlu_erb_csrbus_omni_data; | |
| 234 | ||
| 235 | sc_out <sc_bv<64> > tlu_ica_csrbus_read_data; | |
| 236 | sc_in <sc_bv<64> > tlu_ica_csrbus_omni_data; | |
| 237 | ||
| 238 | sc_out <sc_bv<64> > tlu_icr_csrbus_read_data; | |
| 239 | sc_in <sc_bv<64> > tlu_icr_csrbus_omni_data; | |
| 240 | ||
| 241 | sc_out <sc_bv<64> > oe_log_csrbus_read_data; | |
| 242 | sc_in <sc_bv<64> > oe_log_csrbus_omni_data; | |
| 243 | ||
| 244 | sc_out <sc_bv<64> > oe_int_en_csrbus_read_data; | |
| 245 | sc_in <sc_bv<64> > oe_int_en_csrbus_omni_data; | |
| 246 | ||
| 247 | sc_out<sc_bv<64> > oe_en_err_csrbus_read_data; | |
| 248 | sc_in<sc_bv<64> > oe_en_err_csrbus_omni_data; | |
| 249 | ||
| 250 | sc_out<sc_bv<64> > oe_err_rw1c_alias_csrbus_read_data; | |
| 251 | sc_in<sc_bv<64> > oe_err_rw1c_alias_csrbus_omni_data; | |
| 252 | ||
| 253 | sc_out<sc_bv<64> > oe_err_rw1s_alias_csrbus_read_data; | |
| 254 | sc_in<sc_bv<64> > oe_err_rw1s_alias_csrbus_omni_data; | |
| 255 | ||
| 256 | sc_out<sc_bv<64> > roe_hdr1_csrbus_read_data; | |
| 257 | sc_in<sc_bv<64> > roe_hdr1_csrbus_omni_data; | |
| 258 | ||
| 259 | sc_out<sc_bv<64> > roe_hdr2_csrbus_read_data; | |
| 260 | sc_in<sc_bv<64> > roe_hdr2_csrbus_omni_data; | |
| 261 | ||
| 262 | sc_out<sc_bv<64> > toe_hdr1_csrbus_read_data; | |
| 263 | sc_in<sc_bv<64> > toe_hdr1_csrbus_omni_data; | |
| 264 | ||
| 265 | sc_out<sc_bv<64> > toe_hdr2_csrbus_read_data; | |
| 266 | sc_in<sc_bv<64> > toe_hdr2_csrbus_omni_data; | |
| 267 | ||
| 268 | sc_out<sc_bv<64> > tlu_prfc_csrbus_read_data; | |
| 269 | sc_in<sc_bv<64> > tlu_prfc_csrbus_omni_data; | |
| 270 | ||
| 271 | sc_out<sc_bv<64> > tlu_prf0_csrbus_read_data; | |
| 272 | sc_in<sc_bv<64> > tlu_prf0_csrbus_omni_data; | |
| 273 | ||
| 274 | sc_out<sc_bv<64> > tlu_prf1_csrbus_read_data; | |
| 275 | sc_in<sc_bv<64> > tlu_prf1_csrbus_omni_data; | |
| 276 | ||
| 277 | sc_out<sc_bv<64> > tlu_prf2_csrbus_read_data; | |
| 278 | sc_in<sc_bv<64> > tlu_prf2_csrbus_omni_data; | |
| 279 | ||
| 280 | sc_out<sc_bv<64> > tlu_dbg_sel_a_csrbus_read_data; | |
| 281 | sc_in<sc_bv<64> > tlu_dbg_sel_a_csrbus_omni_data; | |
| 282 | ||
| 283 | sc_out<sc_bv<64> > tlu_dbg_sel_b_csrbus_read_data; | |
| 284 | sc_in<sc_bv<64> > tlu_dbg_sel_b_csrbus_omni_data; | |
| 285 | ||
| 286 | sc_out<sc_bv<64> > dev_cap_csrbus_read_data; | |
| 287 | sc_in<sc_bv<64> > dev_cap_csrbus_omni_data; | |
| 288 | ||
| 289 | sc_out<sc_bv<64> > dev_ctl_csrbus_read_data; | |
| 290 | sc_in<sc_bv<64> > dev_ctl_csrbus_omni_data; | |
| 291 | ||
| 292 | sc_out<sc_bv<64> > dev_sts_csrbus_read_data; | |
| 293 | sc_in<sc_bv<64> > dev_sts_csrbus_omni_data; | |
| 294 | ||
| 295 | sc_out<sc_bv<64> > lnk_cap_csrbus_read_data; | |
| 296 | sc_in<sc_bv<64> > lnk_cap_csrbus_omni_data; | |
| 297 | ||
| 298 | sc_out<sc_bv<64> > lnk_ctl_csrbus_read_data; | |
| 299 | sc_in<sc_bv<64> > lnk_ctl_csrbus_omni_data; | |
| 300 | ||
| 301 | sc_out<sc_bv<64> > lnk_sts_csrbus_read_data; | |
| 302 | sc_in<sc_bv<64> > lnk_sts_csrbus_omni_data; | |
| 303 | ||
| 304 | sc_out<sc_bv<64> > slt_cap_csrbus_read_data; | |
| 305 | sc_in<sc_bv<64> > slt_cap_csrbus_omni_data; | |
| 306 | ||
| 307 | sc_out<sc_bv<64> > ue_log_csrbus_read_data; | |
| 308 | sc_in<sc_bv<64> > ue_log_csrbus_omni_data; | |
| 309 | ||
| 310 | sc_out<sc_bv<64> > ue_int_en_csrbus_read_data; | |
| 311 | sc_in<sc_bv<64> > ue_int_en_csrbus_omni_data; | |
| 312 | ||
| 313 | sc_out<sc_bv<64> > ue_en_err_csrbus_read_data; | |
| 314 | sc_in<sc_bv<64> > ue_en_err_csrbus_omni_data; | |
| 315 | ||
| 316 | sc_out<sc_bv<64> > ue_err_rw1c_alias_csrbus_read_data; | |
| 317 | sc_in<sc_bv<64> > ue_err_rw1c_alias_csrbus_omni_data; | |
| 318 | ||
| 319 | sc_out<sc_bv<64> > ue_err_rw1s_alias_csrbus_read_data; | |
| 320 | sc_in<sc_bv<64> > ue_err_rw1s_alias_csrbus_omni_data; | |
| 321 | ||
| 322 | sc_out<sc_bv<64> > rue_hdr1_csrbus_read_data; | |
| 323 | sc_in<sc_bv<64> > rue_hdr1_csrbus_omni_data; | |
| 324 | ||
| 325 | sc_out<sc_bv<64> > rue_hdr2_csrbus_read_data; | |
| 326 | sc_in<sc_bv<64> > rue_hdr2_csrbus_omni_data; | |
| 327 | ||
| 328 | sc_out<sc_bv<64> > tue_hdr1_csrbus_read_data; | |
| 329 | sc_in<sc_bv<64> > tue_hdr1_csrbus_omni_data; | |
| 330 | ||
| 331 | sc_out<sc_bv<64> > tue_hdr2_csrbus_read_data; | |
| 332 | sc_in<sc_bv<64> > tue_hdr2_csrbus_omni_data; | |
| 333 | ||
| 334 | sc_out<sc_bv<64> > ce_log_csrbus_read_data; | |
| 335 | sc_in<sc_bv<64> > ce_log_csrbus_omni_data; | |
| 336 | ||
| 337 | sc_out<sc_bv<64> > ce_int_en_csrbus_read_data; | |
| 338 | sc_in<sc_bv<64> > ce_int_en_csrbus_omni_data; | |
| 339 | ||
| 340 | sc_out<sc_bv<64> > ce_en_err_csrbus_read_data; | |
| 341 | sc_in<sc_bv<64> > ce_en_err_csrbus_omni_data; | |
| 342 | ||
| 343 | sc_out<sc_bv<64> > ce_err_rw1c_alias_csrbus_read_data; | |
| 344 | sc_in<sc_bv<64> > ce_err_rw1c_alias_csrbus_omni_data; | |
| 345 | ||
| 346 | sc_out<sc_bv<64> > ce_err_rw1s_alias_csrbus_read_data; | |
| 347 | sc_in<sc_bv<64> > ce_err_rw1s_alias_csrbus_omni_data; | |
| 348 | ||
| 349 | sc_out<sc_bv<64> > peu_dlpl_serdes_rev_csrbus_read_data; | |
| 350 | sc_in<sc_bv<64> > peu_dlpl_serdes_rev_csrbus_omni_data; | |
| 351 | ||
| 352 | sc_out<sc_bv<64> > acknak_thresh_csrbus_read_data; | |
| 353 | sc_in<sc_bv<64> > acknak_thresh_csrbus_omni_data; | |
| 354 | ||
| 355 | sc_out<sc_bv<64> > acknak_timer_csrbus_read_data; | |
| 356 | sc_in<sc_bv<64> > acknak_timer_csrbus_omni_data; | |
| 357 | ||
| 358 | sc_out<sc_bv<64> > replay_tim_thresh_csrbus_read_data; | |
| 359 | sc_in<sc_bv<64> > replay_tim_thresh_csrbus_omni_data; | |
| 360 | ||
| 361 | sc_out<sc_bv<64> > replay_timer_csrbus_read_data; | |
| 362 | sc_in<sc_bv<64> > replay_timer_csrbus_omni_data; | |
| 363 | ||
| 364 | sc_out<sc_bv<64> > ven_dllp_msg_csrbus_read_data; | |
| 365 | sc_in<sc_bv<64> > ven_dllp_msg_csrbus_omni_data; | |
| 366 | ||
| 367 | sc_out<sc_bv<64> > force_ltssm_csrbus_read_data; | |
| 368 | sc_in<sc_bv<64> > force_ltssm_csrbus_omni_data; | |
| 369 | ||
| 370 | sc_out<sc_bv<64> > link_cfg_csrbus_read_data; | |
| 371 | sc_in<sc_bv<64> > link_cfg_csrbus_omni_data; | |
| 372 | ||
| 373 | sc_out<sc_bv<64> > link_ctl_csrbus_read_data; | |
| 374 | sc_in<sc_bv<64> > link_ctl_csrbus_omni_data; | |
| 375 | ||
| 376 | sc_out<sc_bv<64> > lane_skew_csrbus_read_data; | |
| 377 | sc_in<sc_bv<64> > lane_skew_csrbus_omni_data; | |
| 378 | ||
| 379 | sc_out<sc_bv<64> > symbol_num_csrbus_read_data; | |
| 380 | sc_in<sc_bv<64> > symbol_num_csrbus_omni_data; | |
| 381 | ||
| 382 | sc_out<sc_bv<64> > symbol_timer_csrbus_read_data; | |
| 383 | sc_in<sc_bv<64> > symbol_timer_csrbus_omni_data; | |
| 384 | ||
| 385 | sc_out<sc_bv<64> > core_status_csrbus_read_data; | |
| 386 | sc_in<sc_bv<64> > core_status_csrbus_omni_data; | |
| 387 | ||
| 388 | sc_out<sc_bv<64> > event_err_log_en_csrbus_read_data; | |
| 389 | sc_in<sc_bv<64> > event_err_log_en_csrbus_omni_data; | |
| 390 | ||
| 391 | sc_out<sc_bv<64> > event_err_int_en_csrbus_read_data; | |
| 392 | sc_in<sc_bv<64> > event_err_int_en_csrbus_omni_data; | |
| 393 | ||
| 394 | sc_out<sc_bv<64> > event_err_int_sts_csrbus_read_data; | |
| 395 | sc_in<sc_bv<64> > event_err_int_sts_csrbus_omni_data; | |
| 396 | ||
| 397 | sc_out<sc_bv<64> > event_err_sts_clr_rw1c_alias_csrbus_read_data; | |
| 398 | sc_in<sc_bv<64> > event_err_sts_clr_rw1c_alias_csrbus_omni_data; | |
| 399 | ||
| 400 | sc_out<sc_bv<64> > event_err_sts_clr_rw1s_alias_csrbus_read_data; | |
| 401 | sc_in<sc_bv<64> > event_err_sts_clr_rw1s_alias_csrbus_omni_data; | |
| 402 | ||
| 403 | sc_out<sc_bv<64> > lnk_bit_err_cnt_1_csrbus_read_data; | |
| 404 | sc_in<sc_bv<64> > lnk_bit_err_cnt_1_csrbus_omni_data; | |
| 405 | ||
| 406 | sc_out<sc_bv<64> > lnk_bit_err_cnt_2_csrbus_read_data; | |
| 407 | sc_in<sc_bv<64> > lnk_bit_err_cnt_2_csrbus_omni_data; | |
| 408 | ||
| 409 | sc_out<sc_bv<64> > serdes_pll_csrbus_read_data; | |
| 410 | sc_in<sc_bv<64> > serdes_pll_csrbus_omni_data; | |
| 411 | ||
| 412 | sc_out<sc_bv<64> > serdes_receiver_lane_ctl_csrbus_read_data; | |
| 413 | sc_in<sc_bv<64> > serdes_receiver_lane_ctl_csrbus_omni_data; | |
| 414 | ||
| 415 | sc_out<sc_bv<64> > serdes_receiver_lane_status_csrbus_read_data; | |
| 416 | sc_in<sc_bv<64> > serdes_receiver_lane_status_csrbus_omni_data; | |
| 417 | ||
| 418 | sc_out<sc_bv<64> > serdes_xmitter_lane_ctl_csrbus_read_data; | |
| 419 | sc_in<sc_bv<64> > serdes_xmitter_lane_ctl_csrbus_omni_data; | |
| 420 | ||
| 421 | sc_out<sc_bv<64> > serdes_xmitter_lane_status_csrbus_read_data; | |
| 422 | sc_in<sc_bv<64> > serdes_xmitter_lane_status_csrbus_omni_data; | |
| 423 | ||
| 424 | sc_out<sc_bv<64> > serdes_macro_test_cfg_csrbus_read_data; | |
| 425 | sc_in<sc_bv<64> > serdes_macro_test_cfg_csrbus_omni_data; | |
| 426 | ||
| 427 | ||
| 428 | peu_top ( sc_module_name module_name ); | |
| 429 | ||
| 430 | }; | |
| 431 | ||
| 432 | #else // __EDG__ | |
| 433 | #include "pcie_common/config.hpp" | |
| 434 | ||
| 435 | #include "peu_csr.hpp" | |
| 436 | #include "csr_top.hpp" | |
| 437 | #include "pcie_top.hpp" | |
| 438 | #include "ltssm.h" | |
| 439 | #include "peu_csr_omni.h" | |
| 440 | #include "pcie_common/tlm/tlm_data_channel.hpp" | |
| 441 | #include "pcie_common/tlm/tlm_fifo_channel.hpp" | |
| 442 | #include "ilu_intf.hpp" | |
| 443 | ||
| 444 | USING_NAMESPACE(pcie); | |
| 445 | using tlm::tlm_fifo_channel; | |
| 446 | ||
| 447 | class peu_top : public sc_module | |
| 448 | { | |
| 449 | public: | |
| 450 | typedef tlm_data_channel< RefPciePacket > data_channel; | |
| 451 | peu_top ( sc_module_name module_name ); | |
| 452 | ||
| 453 | sc_in<bool> l2t_clk; | |
| 454 | sc_in<bool> j2p_rst_l; | |
| 455 | sc_in<bool> j2p_por_l; | |
| 456 | ||
| 457 | /** | |
| 458 | IHB Interface | |
| 459 | */ | |
| 460 | sc_in<bool> d2p_ihb_clk; // IHB clk | |
| 461 | sc_in<bool> d2p_ihb_rd; // Read En | |
| 462 | sc_in<sc_bv<D2P_IHB_ADDR_WDTH> > d2p_ihb_addr; // Addr | |
| 463 | sc_out<sc_bv<P2D_IHB_DATA_WDTH> > p2d_ihb_data; // Data | |
| 464 | sc_out<sc_bv<P2D_IHB_DPAR_WDTH> > p2d_ihb_dpar; // Data Parity | |
| 465 | sc_out<sc_bv<P2D_IHB_WPTR_WDTH> > p2d_ihb_wptr; // Wr Ptr (GC) | |
| 466 | ||
| 467 | /** | |
| 468 | IDB Interface | |
| 469 | */ | |
| 470 | sc_in<bool> d2p_idb_clk; // IDB clk | |
| 471 | sc_in<bool> d2p_idb_rd; // Read En | |
| 472 | sc_in<sc_bv<D2P_IDB_ADDR_WDTH> > d2p_idb_addr; // Addr | |
| 473 | sc_out<sc_bv<P2D_IDB_DATA_WDTH> > p2d_idb_data; // Data | |
| 474 | sc_out<sc_bv<P2D_IDB_DPAR_WDTH> > p2d_idb_dpar; // Data Parity | |
| 475 | ||
| 476 | /** | |
| 477 | Ingress Buffer Credit Interface | |
| 478 | */ | |
| 479 | sc_in<bool> d2p_ibc_req; // Ingr cr req | |
| 480 | sc_out<bool> p2d_ibc_ack; // Ack | |
| 481 | sc_in<sc_bv<D2P_IBC_NHC_WDTH> > d2p_ibc_nhc; // NPH credits | |
| 482 | sc_in<sc_bv<D2P_IBC_PHC_WDTH> > d2p_ibc_phc; // PH credits | |
| 483 | sc_in<sc_bv<D2P_IBC_PDC_WDTH> > d2p_ibc_pdc; // PD credits | |
| 484 | ||
| 485 | /** | |
| 486 | Completion Timeout Interface | |
| 487 | */ | |
| 488 | sc_out<bool> p2d_cto_req; | |
| 489 | sc_out<sc_bv<P2D_CTO_TAG_WDTH> > p2d_cto_tag; | |
| 490 | sc_in<bool> d2p_cto_ack; | |
| 491 | ||
| 492 | /** | |
| 493 | Status Interface | |
| 494 | */ | |
| 495 | sc_out<bool> p2d_drain; // Drain signal to ILU | |
| 496 | sc_out<sc_bv<P2D_MPS_WDTH> > p2d_mps; // Max Payld size | |
| 497 | sc_out<bool> p2d_ue_int; // uncorrectable error | |
| 498 | sc_out<bool> p2d_ce_int; // correctable error | |
| 499 | sc_out<bool> p2d_oe_int; // other error | |
| 500 | ||
| 501 | /** | |
| 502 | Buffer Management Interface (all pointer values are gray coded) | |
| 503 | */ | |
| 504 | sc_in<sc_bv<D2P_ECH_WPTR_WDTH> > d2p_ech_wptr; // Cpl buf EHB wr ptr | |
| 505 | sc_out<sc_bv<P2D_ECH_RPTR_WDTH> > p2d_ech_rptr; // Cpl buf EHB rd ptr | |
| 506 | sc_in<sc_bv<D2P_ERH_WPTR_WDTH> > d2p_erh_wptr; // Req buf EHB wr ptr | |
| 507 | sc_out<sc_bv<P2D_ERH_RPTR_WDTH> > p2d_erh_rptr; // Req buf EHB rd ptr | |
| 508 | sc_out<sc_bv<P2D_ECD_RPTR_WDTH> > p2d_ecd_rptr; // DMA cpl buf rd ptr | |
| 509 | sc_out<sc_bv<P2D_ERD_RPTR_WDTH> > p2d_erd_rptr; // PIO Wr buf rd ptr | |
| 510 | ||
| 511 | /** | |
| 512 | EHB Interfce | |
| 513 | */ | |
| 514 | sc_in<bool> d2p_ehb_we; // EHB Write | |
| 515 | sc_in<sc_bv<D2P_EHB_ADDR_WDTH> > d2p_ehb_addr; // EHB Wr ptr | |
| 516 | sc_in<sc_bv<D2P_EHB_DATA_WDTH> > d2p_ehb_data; // EHB record | |
| 517 | sc_in<sc_bv<D2P_EHB_DPAR_WDTH> > d2p_ehb_dpar; // EHB Wd Parity | |
| 518 | ||
| 519 | /** | |
| 520 | EDB Interfce | |
| 521 | */ | |
| 522 | sc_in<bool> d2p_edb_we; // EDB Write | |
| 523 | sc_in<sc_bv<D2P_EDB_ADDR_WDTH> > d2p_edb_addr; // EDB Wr ptr | |
| 524 | sc_in<sc_bv<D2P_EDB_DATA_WDTH> > d2p_edb_data; // EDB record | |
| 525 | sc_in<sc_bv<D2P_EDB_DPAR_WDTH> > d2p_edb_dpar; // EDB Wd Parity | |
| 526 | ||
| 527 | /** | |
| 528 | CSR Ring Interface | |
| 529 | */ | |
| 530 | sc_in<bool> d2p_csr_req; | |
| 531 | sc_in<sc_bv<D2P_CSR_RING_WDTH> > d2p_csr_rcd; | |
| 532 | ||
| 533 | sc_in<bool> d2p_csr_ack; | |
| 534 | ||
| 535 | sc_in<sc_bv<CSR_RING_WDTH> > dcd2csr_ring_data; | |
| 536 | sc_out<sc_bv<CSR_RING_WDTH> > csr2dcs_ring_data; | |
| 537 | ||
| 538 | // Inputs from the deserializer | |
| 539 | sc_in<sc_lv<LINK_WIDTH> > lane_in0; | |
| 540 | sc_in<sc_lv<LINK_WIDTH> > lane_in1; | |
| 541 | sc_in<sc_lv<LINK_WIDTH> > lane_in2; | |
| 542 | sc_in<sc_lv<LINK_WIDTH> > lane_in3; | |
| 543 | sc_in<sc_lv<LINK_WIDTH> > lane_in4; | |
| 544 | sc_in<sc_lv<LINK_WIDTH> > lane_in5; | |
| 545 | sc_in<sc_lv<LINK_WIDTH> > lane_in6; | |
| 546 | sc_in<sc_lv<LINK_WIDTH> > lane_in7; | |
| 547 | sc_in<sc_lv<LINK_WIDTH> > lane_in8; | |
| 548 | sc_in<sc_lv<LINK_WIDTH> > lane_in9; | |
| 549 | ||
| 550 | sc_in<sc_lv<LINK_WIDTH> > lane_in0_b; | |
| 551 | sc_in<sc_lv<LINK_WIDTH> > lane_in1_b; | |
| 552 | sc_in<sc_lv<LINK_WIDTH> > lane_in2_b; | |
| 553 | sc_in<sc_lv<LINK_WIDTH> > lane_in3_b; | |
| 554 | sc_in<sc_lv<LINK_WIDTH> > lane_in4_b; | |
| 555 | sc_in<sc_lv<LINK_WIDTH> > lane_in5_b; | |
| 556 | sc_in<sc_lv<LINK_WIDTH> > lane_in6_b; | |
| 557 | sc_in<sc_lv<LINK_WIDTH> > lane_in7_b; | |
| 558 | sc_in<sc_lv<LINK_WIDTH> > lane_in8_b; | |
| 559 | sc_in<sc_lv<LINK_WIDTH> > lane_in9_b; | |
| 560 | sc_in<bool> frm_boundary_deser; | |
| 561 | ||
| 562 | ||
| 563 | // LTSSM input ports | |
| 564 | sc_in<sc_lv<LINK_WIDTH> > lane_in; // For input going into the ltssm | |
| 565 | sc_in<sc_lv<LINK_WIDTH> > lane_in_bar; // For input going into the ltssm | |
| 566 | sc_in<bool> link_clk; // Input clk to ltssm | |
| 567 | ||
| 568 | ||
| 569 | //Outputs to the serializer | |
| 570 | sc_out<sc_lv<LINK_WIDTH> > encoded_data0; | |
| 571 | sc_out<sc_lv<LINK_WIDTH> > encoded_data1; | |
| 572 | sc_out<sc_lv<LINK_WIDTH> > encoded_data2; | |
| 573 | sc_out<sc_lv<LINK_WIDTH> > encoded_data3; | |
| 574 | sc_out<sc_lv<LINK_WIDTH> > encoded_data4; | |
| 575 | sc_out<sc_lv<LINK_WIDTH> > encoded_data5; | |
| 576 | sc_out<sc_lv<LINK_WIDTH> > encoded_data6; | |
| 577 | sc_out<sc_lv<LINK_WIDTH> > encoded_data7; | |
| 578 | sc_out<sc_lv<LINK_WIDTH> > encoded_data8; | |
| 579 | sc_out<sc_lv<LINK_WIDTH> > encoded_data9; | |
| 580 | sc_out<bool> ts1_pattern_received; | |
| 581 | sc_out<bool > sym_boundary; | |
| 582 | ||
| 583 | ||
| 584 | ||
| 585 | // LTSSM output ports | |
| 586 | sc_out<sc_lv<LINK_WIDTH> > lane_out; // For output going from the ltssm | |
| 587 | sc_out<sc_lv<LINK_WIDTH> > lane_out_bar; // For output going from the ltssm | |
| 588 | sc_out<bool> init_done; // For init done signal from ltssm | |
| 589 | sc_out<bool> init_done_rx; // For init done signal from ltssm | |
| 590 | sc_out<bool> frame_boundary_ltssm_rx; // Output frame boundary from LTSSM | |
| 591 | sc_out<bool> frame_boundary_ltssm_tx; // Output frame boundary from LTSSM | |
| 592 | sc_out <bool> last_idle_frame; | |
| 593 | sc_out <bool> last_idle_frame_retraining; | |
| 594 | sc_out<bool> start_reinit; | |
| 595 | sc_out<bool> stage_reinit; | |
| 596 | sc_signal<bool> disable_scrambling; | |
| 597 | sc_signal <bool> q_not_empty; | |
| 598 | ||
| 599 | /// CSR Omni Interface Signals | |
| 600 | sc_out <sc_bv<64> > tlu_ctl_csrbus_read_data; | |
| 601 | sc_in <sc_bv<64> > tlu_ctl_csrbus_omni_data; | |
| 602 | ||
| 603 | sc_out <sc_bv<64> > ilu_err_rw1s_alias_csrbus_read_data; | |
| 604 | sc_in <sc_bv<64> > ilu_err_rw1s_alias_csrbus_omni_data; | |
| 605 | ||
| 606 | sc_out <sc_bv<64> > tlu_sts_csrbus_read_data; | |
| 607 | sc_in <sc_bv<64> > tlu_sts_csrbus_omni_data; | |
| 608 | ||
| 609 | sc_out <sc_bv<64> > trn_off_csrbus_read_data; | |
| 610 | sc_in <sc_bv<64> > trn_off_csrbus_omni_data; | |
| 611 | ||
| 612 | sc_out <sc_bv<64> > tlu_ici_csrbus_read_data; | |
| 613 | sc_in <sc_bv<64> > tlu_ici_csrbus_omni_data; | |
| 614 | ||
| 615 | sc_out <sc_bv<64> > tlu_diag_csrbus_read_data; | |
| 616 | sc_in <sc_bv<64> > tlu_diag_csrbus_omni_data; | |
| 617 | ||
| 618 | sc_out <sc_bv<64> > tlu_ecc_csrbus_read_data; | |
| 619 | sc_in <sc_bv<64> > tlu_ecc_csrbus_omni_data; | |
| 620 | ||
| 621 | sc_out <sc_bv<64> > tlu_ecl_csrbus_read_data; | |
| 622 | sc_in <sc_bv<64> > tlu_ecl_csrbus_omni_data; | |
| 623 | ||
| 624 | sc_out <sc_bv<64> > tlu_erb_csrbus_read_data; | |
| 625 | sc_in <sc_bv<64> > tlu_erb_csrbus_omni_data; | |
| 626 | ||
| 627 | sc_out <sc_bv<64> > tlu_ica_csrbus_read_data; | |
| 628 | sc_in <sc_bv<64> > tlu_ica_csrbus_omni_data; | |
| 629 | ||
| 630 | sc_out <sc_bv<64> > tlu_icr_csrbus_read_data; | |
| 631 | sc_in <sc_bv<64> > tlu_icr_csrbus_omni_data; | |
| 632 | ||
| 633 | sc_out <sc_bv<64> > oe_log_csrbus_read_data; | |
| 634 | sc_in <sc_bv<64> > oe_log_csrbus_omni_data; | |
| 635 | ||
| 636 | sc_out <sc_bv<64> > oe_int_en_csrbus_read_data; | |
| 637 | sc_in <sc_bv<64> > oe_int_en_csrbus_omni_data; | |
| 638 | ||
| 639 | sc_out<sc_bv<64> > oe_en_err_csrbus_read_data; | |
| 640 | sc_in<sc_bv<64> > oe_en_err_csrbus_omni_data; | |
| 641 | ||
| 642 | sc_out<sc_bv<64> > oe_err_rw1c_alias_csrbus_read_data; | |
| 643 | sc_in<sc_bv<64> > oe_err_rw1c_alias_csrbus_omni_data; | |
| 644 | ||
| 645 | sc_out<sc_bv<64> > oe_err_rw1s_alias_csrbus_read_data; | |
| 646 | sc_in<sc_bv<64> > oe_err_rw1s_alias_csrbus_omni_data; | |
| 647 | ||
| 648 | sc_out<sc_bv<64> > roe_hdr1_csrbus_read_data; | |
| 649 | sc_in<sc_bv<64> > roe_hdr1_csrbus_omni_data; | |
| 650 | ||
| 651 | sc_out<sc_bv<64> > roe_hdr2_csrbus_read_data; | |
| 652 | sc_in<sc_bv<64> > roe_hdr2_csrbus_omni_data; | |
| 653 | ||
| 654 | sc_out<sc_bv<64> > toe_hdr1_csrbus_read_data; | |
| 655 | sc_in<sc_bv<64> > toe_hdr1_csrbus_omni_data; | |
| 656 | ||
| 657 | sc_out<sc_bv<64> > toe_hdr2_csrbus_read_data; | |
| 658 | sc_in<sc_bv<64> > toe_hdr2_csrbus_omni_data; | |
| 659 | ||
| 660 | sc_out<sc_bv<64> > tlu_prfc_csrbus_read_data; | |
| 661 | sc_in<sc_bv<64> > tlu_prfc_csrbus_omni_data; | |
| 662 | ||
| 663 | sc_out<sc_bv<64> > tlu_prf0_csrbus_read_data; | |
| 664 | sc_in<sc_bv<64> > tlu_prf0_csrbus_omni_data; | |
| 665 | ||
| 666 | sc_out<sc_bv<64> > tlu_prf1_csrbus_read_data; | |
| 667 | sc_in<sc_bv<64> > tlu_prf1_csrbus_omni_data; | |
| 668 | ||
| 669 | sc_out<sc_bv<64> > tlu_prf2_csrbus_read_data; | |
| 670 | sc_in<sc_bv<64> > tlu_prf2_csrbus_omni_data; | |
| 671 | ||
| 672 | sc_out<sc_bv<64> > tlu_dbg_sel_a_csrbus_read_data; | |
| 673 | sc_in<sc_bv<64> > tlu_dbg_sel_a_csrbus_omni_data; | |
| 674 | ||
| 675 | sc_out<sc_bv<64> > tlu_dbg_sel_b_csrbus_read_data; | |
| 676 | sc_in<sc_bv<64> > tlu_dbg_sel_b_csrbus_omni_data; | |
| 677 | ||
| 678 | sc_out<sc_bv<64> > dev_cap_csrbus_read_data; | |
| 679 | sc_in<sc_bv<64> > dev_cap_csrbus_omni_data; | |
| 680 | ||
| 681 | sc_out<sc_bv<64> > dev_ctl_csrbus_read_data; | |
| 682 | sc_in<sc_bv<64> > dev_ctl_csrbus_omni_data; | |
| 683 | ||
| 684 | sc_out<sc_bv<64> > dev_sts_csrbus_read_data; | |
| 685 | sc_in<sc_bv<64> > dev_sts_csrbus_omni_data; | |
| 686 | ||
| 687 | sc_out<sc_bv<64> > lnk_cap_csrbus_read_data; | |
| 688 | sc_in<sc_bv<64> > lnk_cap_csrbus_omni_data; | |
| 689 | ||
| 690 | sc_out<sc_bv<64> > lnk_ctl_csrbus_read_data; | |
| 691 | sc_in<sc_bv<64> > lnk_ctl_csrbus_omni_data; | |
| 692 | ||
| 693 | sc_out<sc_bv<64> > lnk_sts_csrbus_read_data; | |
| 694 | sc_in<sc_bv<64> > lnk_sts_csrbus_omni_data; | |
| 695 | ||
| 696 | sc_out<sc_bv<64> > slt_cap_csrbus_read_data; | |
| 697 | sc_in<sc_bv<64> > slt_cap_csrbus_omni_data; | |
| 698 | ||
| 699 | sc_out<sc_bv<64> > ue_log_csrbus_read_data; | |
| 700 | sc_in<sc_bv<64> > ue_log_csrbus_omni_data; | |
| 701 | ||
| 702 | sc_out<sc_bv<64> > ue_int_en_csrbus_read_data; | |
| 703 | sc_in<sc_bv<64> > ue_int_en_csrbus_omni_data; | |
| 704 | ||
| 705 | sc_out<sc_bv<64> > ue_en_err_csrbus_read_data; | |
| 706 | sc_in<sc_bv<64> > ue_en_err_csrbus_omni_data; | |
| 707 | ||
| 708 | sc_out<sc_bv<64> > ue_err_rw1c_alias_csrbus_read_data; | |
| 709 | sc_in<sc_bv<64> > ue_err_rw1c_alias_csrbus_omni_data; | |
| 710 | ||
| 711 | sc_out<sc_bv<64> > ue_err_rw1s_alias_csrbus_read_data; | |
| 712 | sc_in<sc_bv<64> > ue_err_rw1s_alias_csrbus_omni_data; | |
| 713 | ||
| 714 | sc_out<sc_bv<64> > rue_hdr1_csrbus_read_data; | |
| 715 | sc_in<sc_bv<64> > rue_hdr1_csrbus_omni_data; | |
| 716 | ||
| 717 | sc_out<sc_bv<64> > rue_hdr2_csrbus_read_data; | |
| 718 | sc_in<sc_bv<64> > rue_hdr2_csrbus_omni_data; | |
| 719 | ||
| 720 | sc_out<sc_bv<64> > tue_hdr1_csrbus_read_data; | |
| 721 | sc_in<sc_bv<64> > tue_hdr1_csrbus_omni_data; | |
| 722 | ||
| 723 | sc_out<sc_bv<64> > tue_hdr2_csrbus_read_data; | |
| 724 | sc_in<sc_bv<64> > tue_hdr2_csrbus_omni_data; | |
| 725 | ||
| 726 | sc_out<sc_bv<64> > ce_log_csrbus_read_data; | |
| 727 | sc_in<sc_bv<64> > ce_log_csrbus_omni_data; | |
| 728 | ||
| 729 | sc_out<sc_bv<64> > ce_int_en_csrbus_read_data; | |
| 730 | sc_in<sc_bv<64> > ce_int_en_csrbus_omni_data; | |
| 731 | ||
| 732 | sc_out<sc_bv<64> > ce_en_err_csrbus_read_data; | |
| 733 | sc_in<sc_bv<64> > ce_en_err_csrbus_omni_data; | |
| 734 | ||
| 735 | sc_out<sc_bv<64> > ce_err_rw1c_alias_csrbus_read_data; | |
| 736 | sc_in<sc_bv<64> > ce_err_rw1c_alias_csrbus_omni_data; | |
| 737 | ||
| 738 | sc_out<sc_bv<64> > ce_err_rw1s_alias_csrbus_read_data; | |
| 739 | sc_in<sc_bv<64> > ce_err_rw1s_alias_csrbus_omni_data; | |
| 740 | ||
| 741 | sc_out<sc_bv<64> > peu_dlpl_serdes_rev_csrbus_read_data; | |
| 742 | sc_in<sc_bv<64> > peu_dlpl_serdes_rev_csrbus_omni_data; | |
| 743 | ||
| 744 | sc_out<sc_bv<64> > acknak_thresh_csrbus_read_data; | |
| 745 | sc_in<sc_bv<64> > acknak_thresh_csrbus_omni_data; | |
| 746 | ||
| 747 | sc_out<sc_bv<64> > acknak_timer_csrbus_read_data; | |
| 748 | sc_in<sc_bv<64> > acknak_timer_csrbus_omni_data; | |
| 749 | ||
| 750 | sc_out<sc_bv<64> > replay_tim_thresh_csrbus_read_data; | |
| 751 | sc_in<sc_bv<64> > replay_tim_thresh_csrbus_omni_data; | |
| 752 | ||
| 753 | sc_out<sc_bv<64> > replay_timer_csrbus_read_data; | |
| 754 | sc_in<sc_bv<64> > replay_timer_csrbus_omni_data; | |
| 755 | ||
| 756 | sc_out<sc_bv<64> > ven_dllp_msg_csrbus_read_data; | |
| 757 | sc_in<sc_bv<64> > ven_dllp_msg_csrbus_omni_data; | |
| 758 | ||
| 759 | sc_out<sc_bv<64> > force_ltssm_csrbus_read_data; | |
| 760 | sc_in<sc_bv<64> > force_ltssm_csrbus_omni_data; | |
| 761 | ||
| 762 | sc_out<sc_bv<64> > link_cfg_csrbus_read_data; | |
| 763 | sc_in<sc_bv<64> > link_cfg_csrbus_omni_data; | |
| 764 | ||
| 765 | sc_out<sc_bv<64> > link_ctl_csrbus_read_data; | |
| 766 | sc_in<sc_bv<64> > link_ctl_csrbus_omni_data; | |
| 767 | ||
| 768 | sc_out<sc_bv<64> > lane_skew_csrbus_read_data; | |
| 769 | sc_in<sc_bv<64> > lane_skew_csrbus_omni_data; | |
| 770 | ||
| 771 | sc_out<sc_bv<64> > symbol_num_csrbus_read_data; | |
| 772 | sc_in<sc_bv<64> > symbol_num_csrbus_omni_data; | |
| 773 | ||
| 774 | sc_out<sc_bv<64> > symbol_timer_csrbus_read_data; | |
| 775 | sc_in<sc_bv<64> > symbol_timer_csrbus_omni_data; | |
| 776 | ||
| 777 | sc_out<sc_bv<64> > core_status_csrbus_read_data; | |
| 778 | sc_in<sc_bv<64> > core_status_csrbus_omni_data; | |
| 779 | ||
| 780 | sc_out<sc_bv<64> > event_err_log_en_csrbus_read_data; | |
| 781 | sc_in<sc_bv<64> > event_err_log_en_csrbus_omni_data; | |
| 782 | ||
| 783 | sc_out<sc_bv<64> > event_err_int_en_csrbus_read_data; | |
| 784 | sc_in<sc_bv<64> > event_err_int_en_csrbus_omni_data; | |
| 785 | ||
| 786 | sc_out<sc_bv<64> > event_err_int_sts_csrbus_read_data; | |
| 787 | sc_in<sc_bv<64> > event_err_int_sts_csrbus_omni_data; | |
| 788 | ||
| 789 | sc_out<sc_bv<64> > event_err_sts_clr_rw1c_alias_csrbus_read_data; | |
| 790 | sc_in<sc_bv<64> > event_err_sts_clr_rw1c_alias_csrbus_omni_data; | |
| 791 | ||
| 792 | sc_out<sc_bv<64> > event_err_sts_clr_rw1s_alias_csrbus_read_data; | |
| 793 | sc_in<sc_bv<64> > event_err_sts_clr_rw1s_alias_csrbus_omni_data; | |
| 794 | ||
| 795 | sc_out<sc_bv<64> > lnk_bit_err_cnt_1_csrbus_read_data; | |
| 796 | sc_in<sc_bv<64> > lnk_bit_err_cnt_1_csrbus_omni_data; | |
| 797 | ||
| 798 | sc_out<sc_bv<64> > lnk_bit_err_cnt_2_csrbus_read_data; | |
| 799 | sc_in<sc_bv<64> > lnk_bit_err_cnt_2_csrbus_omni_data; | |
| 800 | ||
| 801 | sc_out<sc_bv<64> > serdes_pll_csrbus_read_data; | |
| 802 | sc_in<sc_bv<64> > serdes_pll_csrbus_omni_data; | |
| 803 | ||
| 804 | sc_out<sc_bv<64> > serdes_receiver_lane_ctl_csrbus_read_data; | |
| 805 | sc_in<sc_bv<64> > serdes_receiver_lane_ctl_csrbus_omni_data; | |
| 806 | ||
| 807 | sc_out<sc_bv<64> > serdes_receiver_lane_status_csrbus_read_data; | |
| 808 | sc_in<sc_bv<64> > serdes_receiver_lane_status_csrbus_omni_data; | |
| 809 | ||
| 810 | sc_out<sc_bv<64> > serdes_xmitter_lane_ctl_csrbus_read_data; | |
| 811 | sc_in<sc_bv<64> > serdes_xmitter_lane_ctl_csrbus_omni_data; | |
| 812 | ||
| 813 | sc_out<sc_bv<64> > serdes_xmitter_lane_status_csrbus_read_data; | |
| 814 | sc_in<sc_bv<64> > serdes_xmitter_lane_status_csrbus_omni_data; | |
| 815 | ||
| 816 | sc_out<sc_bv<64> > serdes_macro_test_cfg_csrbus_read_data; | |
| 817 | sc_in<sc_bv<64> > serdes_macro_test_cfg_csrbus_omni_data; | |
| 818 | ||
| 819 | ||
| 820 | peu_csr *peu_csr_i; | |
| 821 | csr_top<NUM_CSR_PORTS> *csr_i; | |
| 822 | pcie_top *pcie_i; // pcie_top | |
| 823 | ltssm *ltssm_i; // ltssm | |
| 824 | peu_csr_omni *peu_csr_omni_i; | |
| 825 | ||
| 826 | ilu_intf *ilu_intf_i; | |
| 827 | data_channel *tl_in_data_chnl; | |
| 828 | data_channel *tl_out_data_chnl; | |
| 829 | data_channel *tl_req_data_chnl; | |
| 830 | data_channel *tl_preq_data_chnl; | |
| 831 | data_channel *tl_npreq_data_chnl; | |
| 832 | data_channel *tl_cmpl_data_chnl; | |
| 833 | data_channel *tl_tc0_data_chnl; | |
| 834 | data_channel *tl_tc1_data_chnl; | |
| 835 | data_channel *tl_tc2_data_chnl; | |
| 836 | data_channel *tl_tc3_data_chnl; | |
| 837 | data_channel *tl_tc4_data_chnl; | |
| 838 | data_channel *tl_tc5_data_chnl; | |
| 839 | data_channel *tl_tc6_data_chnl; | |
| 840 | data_channel *tl_tc7_data_chnl; | |
| 841 | tlm_fifo_channel<sc_uint<5> > *tl_cto_req_chnl; | |
| 842 | ||
| 843 | //Global Event | |
| 844 | sc_event global_event; | |
| 845 | uint8 global_event_type; | |
| 846 | }; | |
| 847 | ||
| 848 | #endif // __EDG__ | |
| 849 | ||
| 850 | #endif //INC_peu_top_hpp__ |