Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / model / verilog / niu / niu_enet_models / unh_checker.v
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2//
3// OpenSPARC T2 Processor File: unh_checker.v
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35`define SYNC_RULES 2
36`define ALIGN_RULES 1
37`define DATA_RULES 3
38`define RECEIVE_GOOD_DATA 1
39`define DONOT_RECEIVE_DATA 2
40`define RECEIVE_ERROR_DATA 3
41`define RECEIVE_GOOD_DATA_RND_LENGTH 4
42
43module unh_checks( ref_clk) ;
44 input ref_clk;
45
46 wire unh_vectors_valid;
47 wire [15:0] vector_index;
48
49 reg align_status;
50 reg [3:0] sync_status;
51 reg [22:0] rxc_stat0;
52 reg rxc_ctrl0;
53 reg [63:0] rxc_data0;
54 reg rxc_tag0;
55
56 // Encoding for these memory locations: [0] == valid?
57 // [4:1] == Value to check for
58 // [20:5] == min value of the vector index
59 // [36:21] == max value of the vector index
60 //
61
62 reg [36:0] AlignCheck [10:0];
63 reg [36:0] SyncCheck [10:0];
64 reg [36:0] DataCheck [10:0];
65
66 reg [3:0] AlignCheckIndex,SyncCheckIndex,DataCheckIndex;
67 reg [31:0] A_MatchCount,S_MatchCount,D_MatchCount;
68 wire [36:0] CurrentACheck,CurrentSCheck,CurrentDCheck;
69 wire [15:0] A_VectorMin,A_VectorMax,S_VectorMin,S_VectorMax,D_VectorMin,D_VectorMax;
70 wire A_Valid,A_RangeMatch,S_Valid,S_RangeMatch,D_Valid,D_RangeMatch;
71 wire [3:0] S_Value,D_Value;
72
73 reg A_CheckFreeze;
74
75 integer mac_port;
76 reg [8*60:1] arg;
77
78initial
79 begin
80
81 arg = "GET_MAC_PORTS=";
82 if ($test$plusargs("GET_MAC_PORTS="))
83 mac_port = $util_get_plus_args_num(arg);
84
85 end
86
87`ifdef TEST_UNH_VECTORS
88
89 `ifdef NEPTUNE
90 assign unh_vectors_valid = neptune_tb_top.enet_model.USE_UNH_VECTOR;
91 assign vector_index = neptune_tb_top.enet_model.vector_loc;
92 `else
93 assign unh_vectors_valid = tb_top.enet_model.USE_UNH_VECTOR;
94 assign vector_index = tb_top.enet_model.vector_loc;
95 `endif
96
97 `ifdef NEPTUNE
98 always @(posedge ref_clk)
99 begin
100 if(mac_port == 0)
101 begin
102
103 align_status <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.xmac_2pcs_core_port0.xpcs.xpcs_pio.csr_link_status;
104 sync_status <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.xmac_2pcs_core_port0.xpcs.xpcs_pio.csr_lane_sync_status[3:0];
105 rxc_stat0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_stat0[22:0];
106 rxc_ctrl0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_ctrl0;
107 rxc_data0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_data0;
108 rxc_tag0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_tag0;
109 end
110 else if(mac_port == 1)
111 begin
112 align_status <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.xmac_2pcs_core_port1.xpcs.xpcs_pio.csr_link_status;
113 sync_status <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.xmac_2pcs_core_port1.xpcs.xpcs_pio.csr_lane_sync_status[3:0] ;
114 rxc_stat0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_stat1[22:0];
115 rxc_ctrl0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_ctrl1;
116 rxc_data0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_data1;
117 rxc_tag0 <= neptune_tb_top.neptune_htm.u_neptune_hcm.neptune_core.niu.mac4.mac_4ports.mac_rxc_tag1;
118 end
119 end // always @ (posedge ref_clk)
120
121 `else
122 always @(posedge ref_clk)
123 begin
124 if(mac_port == 0)
125 begin
126 align_status <= tb_top.cpu.mac.mac_core.mac_2ports.xmac_2pcs_core_port0.xpcs.xpcs_pio.csr_link_status;
127 sync_status <= tb_top.cpu.mac.mac_core.mac_2ports.xmac_2pcs_core_port0.xpcs.xpcs_pio.csr_lane_sync_status[3:0] ;
128 rxc_stat0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_stat0[22:0];
129 rxc_ctrl0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_ctrl0;
130 rxc_data0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_data0;
131 rxc_tag0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_tag0;
132 end
133 else if(mac_port == 1)
134 begin
135 align_status <= tb_top.cpu.mac.mac_core.mac_2ports.xmac_2pcs_core_port1.xpcs.xpcs_pio.csr_link_status;
136 sync_status <= tb_top.cpu.mac.mac_core.mac_2ports.xmac_2pcs_core_port1.xpcs.xpcs_pio.csr_lane_sync_status[3:0] ;
137 rxc_stat0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_stat1[22:0];
138 rxc_ctrl0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_ctrl1;
139 rxc_data0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_data1;
140 rxc_tag0 <= tb_top.cpu.mac.mac_core.mac_2ports.mac_rxc_tag1;
141 end
142 end // always @ (posedge ref_clk)
143
144 `endif // !`ifdef NEPTUNE
145
146
147
148 integer fd0,nfd,i;
149 reg [15:0] max,min;
150 reg [3:0] value;
151 reg [1:0] type; // 4 types are defined. 1 -- Align Rules
152 // 2 -- Sync Rules
153 // 3 -- Data Rules
154 // 0 -- End of File indicator
155
156 reg done;
157
158 reg [180*8:0] unh_rules_filename;
159
160 integer plus_args_ok;
161
162 initial begin
163
164
165 // Add code to initialize all the CheckRAMS
166
167 for(i =0;i<=10;i=i+1) begin
168 AlignCheck[i] =0;
169 SyncCheck[i] = 0;
170 DataCheck[i] = 0;
171 end
172 SyncCheckIndex =0;
173 AlignCheckIndex =0;
174 DataCheckIndex =0;
175
176 $display("################################################");
177 $display("################################################");
178 unh_rules_filename = "UNH_Rules";
179 // plus_args_ok = $util_get_plus_args_str("UNH_RULE_FILE_",unh_rules_filename);
180 plus_args_ok = $value$plusargs("UNH_RULE_FILE=%s", unh_rules_filename);
181
182 if(plus_args_ok)
183 $display("UNH_DEBUG: UNH Rules Files -- %s",unh_rules_filename);
184 else begin
185 unh_rules_filename = "UNH_Rules";
186 $display("UNH_DEBUG: No Rules File Specified Using Default FileName-- %s",unh_rules_filename);
187 $display("UNH_DEBUG: UNH Rules Files -- %s",unh_rules_filename);
188 end
189
190 // Read the Rules file here and set up the CheckRAMs
191 $display("UNH_DEBUG: Reading UNH Rules File ");
192 fd0=$fopen(unh_rules_filename,"r");
193 done =0;
194 if(!fd0) begin
195 $display("WARNING: File %s Doesnt Exist Skipping Rule Checking",unh_rules_filename);
196 done =1;
197 end
198 while(!done) begin
199 nfd=$fscanf(fd0,"%d %d %d %h",type,max,min,value);
200 // $display("UNH_DEBUG: Rules Read -- %d %d %d %h",type,max,min,value);
201 display_rules( type,max,min,value );
202 if(max < min) begin
203 $display("UNH_DEBUG: ERROR in the Rules File!! -- FIX IT :--%d %d %d %h",type,max,min,value);
204 end
205
206 // $display("%d %d %d %h",type,max,min,value);
207 if(type ==0) done =1;
208 else begin
209 case(type)
210 `SYNC_RULES: begin
211 SyncCheck[ SyncCheckIndex] = { max,min,value,1'b1};
212 SyncCheckIndex = SyncCheckIndex + 1;
213 end
214 `ALIGN_RULES: begin
215 AlignCheck[ AlignCheckIndex] = { max,min,value,1'b1};
216 AlignCheckIndex = AlignCheckIndex + 1;
217 end
218 `DATA_RULES: begin
219 DataCheck[ DataCheckIndex] = { max,min,value,1'b1};
220 DataCheckIndex = DataCheckIndex + 1;
221 end
222
223 default: begin
224 $display("UNH_DEBUG: Data Rules Not yet Supported ");
225 end
226 endcase // case(type)
227 end // else: !if(type ==0)
228 end // while (!done)
229 SyncCheck[ SyncCheckIndex] = { max,min,value,1'b0};
230 AlignCheck[ AlignCheckIndex] = { max,min,value,1'b0};
231 DataCheck[ DataCheckIndex] = { max,min,value,1'b0};
232
233
234 $display("################################################");
235 $display("################################################");
236
237 AlignCheckIndex =0;
238 SyncCheckIndex =0;
239 DataCheckIndex =0;
240
241 end // initial begin
242
243 task display_rules;// ( type,max,min,value);
244 input [1:0] type;
245 input [15:0] max;
246 input [15:0] min;
247 input [3:0] value;
248 begin
249 case(type)
250 2'b0: begin
251 $display("UNH_DEBUG: End of Rule File");
252 end
253 `SYNC_RULES: begin
254 $display("UNH_DEBUG: Expected Value for SyncStatus = %h: Between Vector Range- Max = %d Min = %d",value,max,min);
255 end
256 `ALIGN_RULES: begin
257 $display("UNH_DEBUG: Expected Value for AlignStatus = %h: Between Vector Range- Max = %d Min = %d",value,max,min);
258 end
259 `DATA_RULES: begin
260
261 case(value)
262 `RECEIVE_GOOD_DATA: begin
263 //$display("UNH_DEBUG: MAC Expected to receive 'good_data' of length 0x230: Between Vector Range- Max = %d Min = %d",max,min);
264 $display("UNH_DEBUG: MAC Expected to receive 'good_data' (no abort bit and no crc bit set): Between Vector Range- Max = %d Min = %d",max,min);
265 end
266 `DONOT_RECEIVE_DATA: begin
267 $display("UNH_DEBUG: MAC Not Expected to any data: Between Vector Range- Max = %d Min = %d",max,min);
268 end
269 `RECEIVE_ERROR_DATA: begin
270 $display("UNH_DEBUG: MAC Expected to receive data with ErrorBit Set: Between Vector Range- Max = %d Min = %d",max,min);
271 end
272 `RECEIVE_GOOD_DATA_RND_LENGTH: begin
273 $display("UNH_DEBUG: MAC Expected to receive 'good_data' of any length : Between Vector Range- Max = %d Min = %d",max,min);
274 end
275
276 default: begin
277 $display("UNH_DEBUG:ERROR Data Rule not defined!! Fix It-");
278 end
279 endcase // case(value)
280 end // case: `DATA_RULES
281 default: begin
282 $display("UNH_DEBUG: ERROR Illegal Type Specified in RuleFile - FIX IT--");
283 end
284 endcase // case(type)
285 end
286 endtask // display_rules
287
288
289
290// Check Align Rules
291
292 assign CurrentACheck = AlignCheck[AlignCheckIndex];
293 assign A_VectorMin = CurrentACheck[20:5];
294 assign A_VectorMax = CurrentACheck[36:21];
295 assign A_Value = CurrentACheck[4:1];
296 assign A_Valid = CurrentACheck[0];
297 assign A_RangeMatch = A_Valid & unh_vectors_valid & ( vector_index >= A_VectorMin) & ( vector_index < A_VectorMax);
298
299
300
301 always@(posedge ref_clk) begin
302 if(A_Valid & unh_vectors_valid & ( vector_index >= A_VectorMax)) begin
303 AlignCheckIndex <= AlignCheckIndex +1;
304 if(A_MatchCount==0) begin
305 $display("UNH_DEBUG: ERROR align_status Did Not Match as expected!! AlignCheckIndex = %d Time = %t",AlignCheckIndex,$time);
306 end else begin
307 $display("UNH_DEBUG: align_status Matched as expected!! AlignCheckIndex = %d Time = %t",AlignCheckIndex,$time);
308 end
309 end // if (A_Valid & unh_vectors_valid & ( vector_index == A_VectorMax))
310
311 end
312
313 always@(posedge ref_clk) begin
314 if(A_RangeMatch) begin
315 if(!A_CheckFreeze & (A_Value == align_status)) begin
316 A_MatchCount <= A_MatchCount + 1;
317 end else if(A_Value != align_status) begin // if (!A_CheckFreeze & (A_Value == align_status))
318 A_MatchCount <=0;
319 A_CheckFreeze <=1;
320 end
321
322 end else begin
323 A_MatchCount <=0;
324 A_CheckFreeze <=0;
325 end // else: !if(A_RangeMatch)
326 end
327
328
329
330// Check Sync Rules
331 assign CurrentSCheck = SyncCheck[SyncCheckIndex];
332 assign S_VectorMin = CurrentSCheck[20:5];
333 assign S_VectorMax = CurrentSCheck[36:21];
334 assign S_Value = CurrentSCheck[4:1];
335 assign S_Valid = CurrentSCheck[0];
336 assign S_RangeMatch = S_Valid & unh_vectors_valid & ( vector_index >= S_VectorMin) & ( vector_index < S_VectorMax);
337
338
339 always@(posedge ref_clk) begin
340 if(S_Valid & unh_vectors_valid & ( vector_index >= S_VectorMax)) begin
341 SyncCheckIndex <= SyncCheckIndex +1;
342 if(S_MatchCount==0) begin
343 $display("UNH_DEBUG: ERROR sync_status Did Not Match as expected!! SyncCheckIndex = %d Time = %t",SyncCheckIndex,$time);
344 end else begin
345 $display("UNH_DEBUG: sync_status Matched as expected!! SyncCheckIndex = %d Time = %t",SyncCheckIndex,$time);
346 end
347 end // if (A_Valid & unh_vectors_valid & ( vector_index == A_VectorMax))
348
349 end
350
351 always@(posedge ref_clk) begin
352 if(S_RangeMatch) begin
353 if(S_Value == sync_status) begin
354 S_MatchCount <= S_MatchCount + 1;
355 end
356 end else begin
357 S_MatchCount <=0;
358 end // else: !if(S_RangeMatch)
359 end
360
361// Check Data Rules
362
363 assign CurrentDCheck = DataCheck[DataCheckIndex];
364 assign D_VectorMin = CurrentDCheck[20:5];
365 assign D_VectorMax = CurrentDCheck[36:21];
366 assign D_Value = CurrentDCheck[4:1];
367 assign D_Valid = CurrentDCheck[0];
368 assign D_RangeMatch = D_Valid & unh_vectors_valid & ( vector_index >= D_VectorMin) & ( vector_index < D_VectorMax);
369
370
371 always@(posedge ref_clk) begin
372 if(D_Valid & unh_vectors_valid & ( vector_index >= D_VectorMax)) begin
373 DataCheckIndex <= DataCheckIndex +1;
374 if(D_MatchCount==0) begin
375 $display("UNH_DEBUG: ERROR data_status Did Not Match as expected!! DataCheckIndex = %d Time = %t",DataCheckIndex,$time);
376 end else begin
377 $display("UNH_DEBUG: data_status Matched as expected!! DataCheckIndex = %d Time = %t",DataCheckIndex,$time);
378 end
379 end // if (A_Valid & unh_vectors_valid & ( vector_index == A_VectorMax))
380
381 end
382
383 always@(posedge ref_clk) begin
384 if(D_RangeMatch) begin
385 if(D_Value == `RECEIVE_GOOD_DATA) begin
386 //if(rxc_tag0 & (rxc_stat0 == 23'hc0230)) begin
387 if(rxc_tag0 & (rxc_stat0[15:14] == 2'b0)) begin // bit 15: abort bit; bit 14: bad crc
388 D_MatchCount <=1;
389 $display("RAK_DEBUG rxc_tag0 is %d rxc_stat0 is %h at time %t", rxc_tag0, rxc_stat0, $time);
390
391 end // if (rxc_tag0 & (rxc_stat0 == 23'hc0230) begin...
392 end // if (D_Value == `RECEICE_GOOD_DATA)
393
394 if(D_Value == `DONOT_RECEIVE_DATA) begin
395 // This needs to be recoded
396 if(!(rxc_tag0 & (rxc_stat0 == 23'hc0230))) begin
397 D_MatchCount <= 1 ;
398 end // if (!(rxc_tag0 & (rxc_stat0 == 23'hc0230)))
399 else D_MatchCount <=0;
400 end // if (D_Value == `DONOT_RECEIVE_DATA)
401
402 if(D_Value == `RECEIVE_ERROR_DATA) begin
403 if(rxc_tag0 &(rxc_stat0[14]==1))
404 D_MatchCount <=1;
405 end // if (D_VALUE == `RECEIVE_ERROR_DATA)
406
407 if(D_Value == `RECEIVE_GOOD_DATA_RND_LENGTH) begin
408 if(rxc_tag0 &(rxc_stat0[14]!=1))
409 D_MatchCount <=1;
410 end // if (D_VALUE == `RECEIVE_GOOD_DATA_RND_LENGTH)
411
412 end else begin
413 D_MatchCount <=0;
414 end // else: !if(D_RangeMatch)
415 end
416
417`endif // `ifdef TEST_UNH_VECTORS
418
419
420endmodule // unh_checks
421
422