[OpenSPARC-T2-DV] / verif / model / verilog / niu / sparse_mem_model / loadpli / compile.0

cd ../pli/src ; /bin/mkdir ./obj ; cd ./obj
g++ -m32 -fpic -I${DV_ROOT}/verif/model/verilog/niu/sparse_mem_model/pli/src -c ../mempli.cc ../ext_sys_mem.cc ../mal.cpp -I${VCS_HOME}/include -I/${VERA_HOME}/lib
cd ../../../loadpli ; /bin/rm -f libniu_sparse_mem_model.a
ar cr libniu_sparse_mem_model.a ../pli/src/obj/*.o ; /bin/rm -rf ../pli/src/obj
Commit	Line	Data
86530b38 AT	1	cd ../pli/src ; /bin/mkdir ./obj ; cd ./obj
	2	g++ -m32 -fpic -I${DV_ROOT}/verif/model/verilog/niu/sparse_mem_model/pli/src -c ../mempli.cc ../ext_sys_mem.cc ../mal.cpp -I${VCS_HOME}/include -I/${VERA_HOME}/lib
	3	cd ../../../loadpli ; /bin/rm -f libniu_sparse_mem_model.a
	4	ar cr libniu_sparse_mem_model.a ../pli/src/obj/*.o ; /bin/rm -rf ../pli/src/obj