Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / model / verilog / niu / sparse_mem_model / pli / src / mempli.cc

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// OpenSPARC T2 Processor File: mempli.cc
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////////////////////////////////////////////////////////////////////////////////

#include <iostream>
#include <fstream>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <stdio.h>
#include "ext_sys_mem.h"
#include "vcsuser.h"

// global variables
SYS_MEM SystemMem;
SYS_MEM SlaveMem;

/*==========================================================================*/
extern "C" int SysMem_SetRandom() {
/*==========================================================================*/
  SystemMem.SetDefaultMemRandom();
  SlaveMem.SetDefaultMemRandom();
return 0;
}

/*==========================================================================*/
extern "C" int SysRead_Data() {
/*==========================================================================*/

  unsigned int addrh;
  unsigned int addrl;
  unsigned int tempData;
  int iMemType;

  iMemType = tf_getp(1);
  addrh = tf_getp(2);
  addrl = tf_getp(3);
  addrl = addrl & (~0x3);

  if (iMemType == 1) {
    SystemMem.read(addrh,addrl,&tempData);  // host
    //io_printf(" System MEM read   addr %08x  data %08x\n",addrl,tempData); 
  } else {
    SlaveMem.read(addrh,addrl,&tempData);  // host
    //io_printf(" Slave MEM read   addr %08x  data %08x\n",addrl,tempData); 
  }

  tf_putp(4,tempData);
  return 0;
}

/*==========================================================================*/
extern "C" int SysWrite_Data() {
/*==========================================================================*/

  unsigned int addrh;
  unsigned int addrl;
  unsigned int be;
  unsigned int data;
  int iMemType;

  iMemType = tf_getp(1);
  addrh = tf_getp(2);
  addrl = tf_getp(3);
  data = tf_getp(4);
  be = tf_getp(5);

  addrl = addrl & (~0x3);
  be = (~(be & 0x0f)) & 0x0f;

  if (iMemType == 1) {
    SystemMem.write(addrh,addrl,be,data);
    //io_printf(" System MEM write  addr %08x  data %08x  be %08x\n",addrl,data,be); 
  } else {
    SlaveMem.write(addrh,addrl,be,data);
    //io_printf(" Slave MEM write  addr %08x  data %08x  be %08x\n",addrl,data,be); 
  }
  return 0;
}