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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_err_l2_LTC_2bnk_cecc_trap.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | ||
40 | ||
41 | #define L2_ENTRY_PA 0xa400000000 | |
42 | #define TEST_DATA1 0x5555555555555555 | |
43 | #define L2_ENTRY_PA0 0x2020000008 | |
44 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
45 | ||
46 | #include "hboot.s" | |
47 | #include "asi_s.h" | |
48 | #include "err_defines.h" | |
49 | ||
50 | .text | |
51 | .global main | |
52 | ||
53 | ||
54 | main: | |
55 | ||
56 | ! Boot code does not provide TLB translation for IO address space | |
57 | ta T_CHANGE_HPRIV | |
58 | ||
59 | disable_l1_DCache: | |
60 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
61 | ! Remove bit 2 | |
62 | andn %l0, 0x2, %l0 | |
63 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
64 | ||
65 | enable_err_reporting: | |
66 | setx L2EE_PA0, %l0, %l1 | |
67 | ldx [%l1], %l2 | |
68 | mov 0x3, %l0 | |
69 | or %l2, %l0, %l2 | |
70 | stx %l2, [%l1] | |
71 | ||
72 | ||
73 | clear_l2_ESR: | |
74 | setx L2_ES_W1C_VALUE, %l0, %l1 | |
75 | setx L2ES_PA0, %l6, %g1 | |
76 | stx %l1, [%g1] | |
77 | ||
78 | ||
79 | set_L2_Directly_Mapped_Mode: | |
80 | setx L2CS_PA0, %l6, %g1 ! Bit 1 in L2 Control Status Register | |
81 | mov 0x2, %l0 | |
82 | stx %l0, [%g1] | |
83 | ||
84 | store_to_L2: | |
85 | setx TEST_DATA1, %l0, %g5 | |
86 | ||
87 | store_to_L2_way0: | |
88 | set 0xaa80f100, %g2 ! bits [16:8] select index in 4 bank mode | |
89 | stx %g5, [%g2] | |
90 | stx %g5, [%g2+8] | |
91 | membar #Sync | |
92 | clr %g1 | |
93 | mov 0x9,%l0 | |
94 | loop: | |
95 | inc %g1 | |
96 | cmp %g1,%l0 | |
97 | bne loop | |
98 | nop | |
99 | ||
100 | ||
101 | ||
102 | L2_diag_load: | |
103 | setx 0xa40003c400,%l0,%g5 ! bits [17:9] select index in 4 bank mode | |
104 | ldx [%g5], %g6 | |
105 | membar #Sync | |
106 | ||
107 | ! Flip one bits to inject error | |
108 | xor %g6, 0x200, %g6 | |
109 | stx %g6, [%g5] | |
110 | membar #Sync | |
111 | clr %g1 | |
112 | mov 0x9,%l0 | |
113 | loop1: | |
114 | inc %g1 | |
115 | cmp %g1,%l0 | |
116 | bne loop1 | |
117 | nop | |
118 | ||
119 | ||
120 | ||
121 | !This should cause LTC | |
122 | reading_back_0: !Load to L2 again to get the LTC logged in ESR | |
123 | ldx [%g2], %l6 | |
124 | membar #Sync | |
125 | ||
126 | clr %g1 | |
127 | mov 0x9,%l0 | |
128 | loop2: | |
129 | inc %g1 | |
130 | cmp %g1,%l0 | |
131 | bne loop2 | |
132 | nop | |
133 | ||
134 | ||
135 | ||
136 | end_of_first_LTC_inject: | |
137 | nop | |
138 | ||
139 | fill_to_same_index: | |
140 | set 0xaaa0f100, %g2 ! bits [16:8] selects index in 4 bank mode | |
141 | stx %g5, [%g2] | |
142 | stx %g5, [%g2+8] | |
143 | membar #Sync | |
144 | ||
145 | clr %g1 | |
146 | mov 0x9,%l0 | |
147 | loop3: | |
148 | inc %g1 | |
149 | cmp %g1,%l0 | |
150 | bne loop3 | |
151 | nop | |
152 | ||
153 | ||
154 | load_toprev_index_no_LTC: | |
155 | set 0xaa80f100, %g2 ! bits [16:8] select index in 4 bank mode | |
156 | ldx [%g2],%g5 | |
157 | membar #Sync | |
158 | ||
159 | compute_error: | |
160 | mov 0x1, %l1 | |
161 | sllx %l1, L2ES_LTC, %l7 | |
162 | sllx %l1, L2ES_VEC, %l3 | |
163 | or %l7, %l3, %l7 | |
164 | sllx %l1, L2ES_MEC, %l3 | |
165 | or %l7, %l3, %l7 | |
166 | ||
167 | ||
168 | ||
169 | check_l2_ESR: | |
170 | setx L2ES_PA0, %l6, %g1 | |
171 | ldx [%g1], %l4 | |
172 | membar #Sync | |
173 | ||
174 | cmp %l7, %l4 | |
175 | bne test_fail | |
176 | nop | |
177 | ||
178 | ||
179 | check_l2_EAR: | |
180 | setx L2EA_PA0, %l6, %l3 | |
181 | ldx [%l3], %l4 | |
182 | membar #Sync | |
183 | ||
184 | set 0xaa80f100, %g2 ! bits [16:8] select index in 4 bank mode | |
185 | cmp %g2, %l4 | |
186 | bne test_fail | |
187 | nop | |
188 | ||
189 | ! Check if a Corrected ECC Trap happened | |
190 | check_error_trap: | |
191 | setx EXECUTED, %l1, %l0 | |
192 | cmp %o0, %l0 | |
193 | bne test_fail | |
194 | nop | |
195 | mov TT_Corrected_ECC, %l0 | |
196 | cmp %o1, %l0 | |
197 | bne test_fail | |
198 | nop | |
199 | ||
200 | ba test_pass | |
201 | nop | |
202 | ||
203 | ||
204 | /******************************************************* | |
205 | * Exit code | |
206 | *******************************************************/ | |
207 | ||
208 | test_pass: | |
209 | ta T_GOOD_TRAP | |
210 | ||
211 | test_fail: | |
212 | ta T_BAD_TRAP |