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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_err_l2_Stuck0.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | ||
40 | #define L2_ENTRY_PA 0x517590000 | |
41 | #define TEST_DATA 0x555555555555555 | |
42 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
43 | #define MCUES_PA0 0x8400000280 | |
44 | ||
45 | ||
46 | #include "hboot.s" | |
47 | #include "asi_s.h" | |
48 | #include "err_defines.h" | |
49 | ||
50 | .text | |
51 | .global main | |
52 | ||
53 | ||
54 | main: | |
55 | ||
56 | ||
57 | ! Boot code does not provide TLB translation for IO address space | |
58 | ta T_CHANGE_HPRIV | |
59 | ||
60 | setx L2_ES_W1C_VALUE, %l0, %g4 | |
61 | ||
62 | ! Now access L2 control and status registers | |
63 | disable_l1: | |
64 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
65 | ! Remove the lower 2 bits (I-Cache and D-Cache enables) | |
66 | andn %l0, 0x3, %l0 | |
67 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
68 | ||
69 | ||
70 | ! Write 1 to clear L2 Error status registers | |
71 | ||
72 | clear_MCU_ESR: | |
73 | ! setx MCUES_PA0, %l3, %l4 | |
74 | setx L2ES_PA0,%l3, %l4 | |
75 | stx %g4, [%l4] | |
76 | nop | |
77 | ||
78 | ||
79 | set_L2_Directly_Mapped_Mode: | |
80 | setx L2CS_PA0, %l6, %g1 | |
81 | mov 0x2, %l0 | |
82 | stx %l0, [%g1] | |
83 | ||
84 | ||
85 | store_l2_way: | |
86 | setx TEST_DATA, %l0, %g5 | |
87 | setx 0x2020000000, %l0, %g1 | |
88 | stx %g5, [%g1] | |
89 | stx %g5, [%g1+8] | |
90 | membar #Sync | |
91 | first_load: | |
92 | ldx [%g1], %l1 | |
93 | membar #Sync | |
94 | ||
95 | second_load: | |
96 | setx 0x2021000000, %l0, %g2 | |
97 | ldx [%g2], %i4 | |
98 | membar #Sync | |
99 | ||
100 | load_to_mem: | |
101 | ldx [%g1], %l1 | |
102 | membar #Sync | |
103 | ||
104 | another_first_load: | |
105 | setx 0x2020000100, %l0, %g1 | |
106 | stx %g5, [%g1] | |
107 | stx %g5, [%g1+8] | |
108 | membar #Sync | |
109 | ldx [%g1], %l1 | |
110 | membar #Sync | |
111 | ||
112 | another_second_load: | |
113 | setx 0x2021000100, %l0, %g2 | |
114 | ldx [%g2], %i4 | |
115 | membar #Sync | |
116 | ||
117 | another_load_to_mem: | |
118 | ldx [%g1], %l1 | |
119 | membar #Sync | |
120 | ||
121 | ||
122 | ESR: | |
123 | setx L2ES_PA0,%l3, %l4 | |
124 | ldx [%l4], %l5 | |
125 | ||
126 | ||
127 | ||
128 | setx 0x2020000020, %l0, %g3 | |
129 | setx 0x2020000030, %l0, %g4 | |
130 | ! setx 0x2020000000, %l0, %g5 | |
131 | stx %g5, [%g2] | |
132 | membar #Sync | |
133 | stx %g5, [%g3] | |
134 | membar #Sync | |
135 | stx %g5, [%g4] | |
136 | membar #Sync | |
137 | ! stx %g5, [%g5] | |
138 | ||
139 | ||
140 | ldsw: | |
141 | membar #Sync | |
142 | ldx [%g1], %i2 | |
143 | membar #Sync | |
144 | ldx [%g2], %i4 | |
145 | membar #Sync | |
146 | ldx [%g3], %i5 | |
147 | membar #Sync | |
148 | ldx [%g4], %i6 | |
149 | membar #Sync | |
150 | ldx [%g1], %l1 | |
151 | membar #Sync | |
152 | ldx [%g1], %i2 | |
153 | membar #Sync | |
154 | ldx [%g2], %i4 | |
155 | membar #Sync | |
156 | ldx [%g3], %i5 | |
157 | membar #Sync | |
158 | ldx [%g4], %i6 | |
159 | membar #Sync | |
160 | ldx [%g1], %l1 | |
161 | membar #Sync | |
162 | ldx [%g1], %i2 | |
163 | membar #Sync | |
164 | ldx [%g2], %i4 | |
165 | membar #Sync | |
166 | ldx [%g3], %i5 | |
167 | membar #Sync | |
168 | ldx [%g4], %i6 | |
169 | membar #Sync | |
170 | ||
171 | another_ESR: | |
172 | setx L2ES_PA0,%l3, %l4 | |
173 | ldx [%l4], %l5 | |
174 | ||
175 | ||
176 | ||
177 | ||
178 | ba test_pass | |
179 | ||
180 | ||
181 | ||
182 | /******************************************************* | |
183 | * Exit code | |
184 | *******************************************************/ | |
185 | ||
186 | test_pass: | |
187 | ta T_GOOD_TRAP | |
188 | ||
189 | test_fail: | |
190 | ta T_BAD_TRAP | |
191 |