| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: l2_buffer_hits_sample.vrhpal |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
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| 24 | // the General Public License version 2 (GPLv2) at this time for any |
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| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | wildcard state LOAD_mb ( {4'b1000, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 36 | wildcard state LOAD_fb ( {4'b0100, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 37 | wildcard state LOAD_wb ( {4'b0010, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 38 | wildcard state LOAD_rb ( {4'b0001, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 39 | wildcard state LOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 40 | wildcard state LOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 41 | wildcard state LOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 42 | wildcard bad_state LOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 43 | wildcard bad_state LOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 44 | wildcard bad_state LOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 45 | wildcard bad_state LOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 46 | wildcard bad_state LOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 47 | wildcard bad_state LOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 48 | wildcard bad_state LOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 49 | wildcard bad_state LOAD_mb_fb_wb_rb ( {4'b1111, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 50 | |
| 51 | // PREFETCH vld diag reqtype nc jbi cputh inv pf bis |
| 52 | wildcard state PREFETCH_mb ( {4'b1000, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 53 | wildcard state PREFETCH_fb ( {4'b0100, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 54 | wildcard state PREFETCH_wb ( {4'b0010, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 55 | wildcard state PREFETCH_rb ( {4'b0001, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 56 | wildcard state PREFETCH_mb_fb ( {4'b1100, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 57 | wildcard state PREFETCH_mb_wb ( {4'b1010, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 58 | wildcard state PREFETCH_mb_rb ( {4'b1001, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 59 | wildcard bad_state PREFETCH_fb_wb ( {4'b0110, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 60 | wildcard bad_state PREFETCH_fb_rb ( {4'b0101, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 61 | wildcard bad_state PREFETCH_wb_rb ( {4'b0011, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 62 | wildcard bad_state PREFETCH_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 63 | wildcard bad_state PREFETCH_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 64 | wildcard bad_state PREFETCH_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 65 | wildcard bad_state PREFETCH_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 66 | wildcard bad_state PREFETCH_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} ); |
| 67 | |
| 68 | // IMISS vld diag reqtype nc jbi cputh inv pf bis |
| 69 | wildcard state IMISS_mb ( {4'b1000, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 70 | wildcard state IMISS_fb ( {4'b0100, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 71 | wildcard state IMISS_wb ( {4'b0010, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 72 | wildcard state IMISS_rb ( {4'b0001, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 73 | wildcard state IMISS_mb_fb ( {4'b1100, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 74 | wildcard state IMISS_mb_wb ( {4'b1010, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 75 | wildcard state IMISS_mb_rb ( {4'b1001, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 76 | wildcard bad_state IMISS_fb_wb ( {4'b0110, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 77 | wildcard bad_state IMISS_fb_rb ( {4'b0101, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 78 | wildcard bad_state IMISS_wb_rb ( {4'b0011, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 79 | wildcard bad_state IMISS_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 80 | wildcard bad_state IMISS_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 81 | wildcard bad_state IMISS_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 82 | wildcard bad_state IMISS_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 83 | wildcard bad_state IMISS_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 84 | |
| 85 | // STORE vld diag reqtype nc jbi cputh inv pf bis |
| 86 | wildcard state STORE_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 87 | wildcard state STORE_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 88 | wildcard state STORE_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 89 | wildcard state STORE_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 90 | wildcard state STORE_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 91 | wildcard state STORE_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 92 | wildcard state STORE_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 93 | wildcard bad_state STORE_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 94 | wildcard bad_state STORE_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 95 | wildcard bad_state STORE_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 96 | wildcard bad_state STORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 97 | wildcard bad_state STORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 98 | wildcard bad_state STORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 99 | wildcard bad_state STORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 100 | wildcard bad_state STORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 101 | |
| 102 | // BLKSTORE vld diag reqtype nc jbi cputh inv pf bis |
| 103 | wildcard state BLKSTORE_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 104 | wildcard state BLKSTORE_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 105 | wildcard state BLKSTORE_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 106 | wildcard state BLKSTORE_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 107 | wildcard state BLKSTORE_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 108 | wildcard state BLKSTORE_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 109 | wildcard state BLKSTORE_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 110 | wildcard bad_state BLKSTORE_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 111 | wildcard bad_state BLKSTORE_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 112 | wildcard bad_state BLKSTORE_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 113 | wildcard bad_state BLKSTORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 114 | wildcard bad_state BLKSTORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 115 | wildcard bad_state BLKSTORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 116 | wildcard bad_state BLKSTORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 117 | wildcard bad_state BLKSTORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} ); |
| 118 | |
| 119 | // BLKINITST vld diag reqtype nc jbi cputh inv pf bis |
| 120 | wildcard state BLKINITST_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 121 | wildcard state BLKINITST_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 122 | wildcard state BLKINITST_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 123 | wildcard state BLKINITST_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 124 | wildcard state BLKINITST_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 125 | wildcard state BLKINITST_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 126 | wildcard state BLKINITST_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 127 | wildcard bad_state BLKINITST_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 128 | wildcard bad_state BLKINITST_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 129 | wildcard bad_state BLKINITST_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 130 | wildcard bad_state BLKINITST_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 131 | wildcard bad_state BLKINITST_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 132 | wildcard bad_state BLKINITST_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 133 | wildcard bad_state BLKINITST_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 134 | wildcard bad_state BLKINITST_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} ); |
| 135 | |
| 136 | // CAS1 vld diag reqtype nc jbi cputh inv pf bis |
| 137 | wildcard state CAS1_mb ( {4'b1000, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 138 | wildcard state CAS1_fb ( {4'b0100, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 139 | wildcard state CAS1_wb ( {4'b0010, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 140 | wildcard state CAS1_rb ( {4'b0001, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 141 | wildcard state CAS1_mb_fb ( {4'b1100, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 142 | wildcard state CAS1_mb_wb ( {4'b1010, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 143 | wildcard state CAS1_mb_rb ( {4'b1001, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 144 | wildcard bad_state CAS1_fb_wb ( {4'b0110, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 145 | wildcard bad_state CAS1_fb_rb ( {4'b0101, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 146 | wildcard bad_state CAS1_wb_rb ( {4'b0011, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 147 | wildcard bad_state CAS1_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 148 | wildcard bad_state CAS1_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 149 | wildcard bad_state CAS1_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 150 | wildcard bad_state CAS1_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 151 | wildcard bad_state CAS1_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 152 | |
| 153 | // CAS2 vld diag reqtype nc jbi cputh inv pf bis |
| 154 | wildcard state CAS2_mb ( {4'b1000, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 155 | wildcard state CAS2_fb ( {4'b0100, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 156 | wildcard state CAS2_wb ( {4'b0010, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 157 | wildcard state CAS2_rb ( {4'b0001, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 158 | wildcard state CAS2_mb_fb ( {4'b1100, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 159 | wildcard state CAS2_mb_wb ( {4'b1010, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 160 | wildcard state CAS2_mb_rb ( {4'b1001, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 161 | wildcard bad_state CAS2_fb_wb ( {4'b0110, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 162 | wildcard bad_state CAS2_fb_rb ( {4'b0101, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 163 | wildcard bad_state CAS2_wb_rb ( {4'b0011, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 164 | wildcard bad_state CAS2_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 165 | wildcard bad_state CAS2_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 166 | wildcard bad_state CAS2_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 167 | wildcard bad_state CAS2_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 168 | wildcard bad_state CAS2_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 169 | |
| 170 | // SWAP vld diag reqtype nc jbi cputh inv pf bis |
| 171 | wildcard state SWAP_mb ( {4'b1000, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 172 | wildcard state SWAP_fb ( {4'b0100, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 173 | wildcard state SWAP_wb ( {4'b0010, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 174 | wildcard state SWAP_rb ( {4'b0001, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 175 | wildcard state SWAP_mb_fb ( {4'b1100, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 176 | wildcard state SWAP_mb_wb ( {4'b1010, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 177 | wildcard state SWAP_mb_rb ( {4'b1001, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 178 | wildcard bad_state SWAP_fb_wb ( {4'b0110, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 179 | wildcard bad_state SWAP_fb_rb ( {4'b0101, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 180 | wildcard bad_state SWAP_wb_rb ( {4'b0011, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 181 | wildcard bad_state SWAP_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 182 | wildcard bad_state SWAP_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 183 | wildcard bad_state SWAP_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 184 | wildcard bad_state SWAP_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 185 | wildcard bad_state SWAP_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 186 | |
| 187 | // STRLOAD vld diag reqtype nc jbi cputh inv pf bis |
| 188 | wildcard state STRLOAD_mb ( {4'b1000, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 189 | wildcard state STRLOAD_fb ( {4'b0100, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 190 | wildcard state STRLOAD_wb ( {4'b0010, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 191 | wildcard state STRLOAD_rb ( {4'b0001, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 192 | wildcard state STRLOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 193 | wildcard state STRLOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 194 | wildcard state STRLOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 195 | wildcard bad_state STRLOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 196 | wildcard bad_state STRLOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 197 | wildcard bad_state STRLOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 198 | wildcard bad_state STRLOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 199 | wildcard bad_state STRLOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 200 | wildcard bad_state STRLOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 201 | wildcard bad_state STRLOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 202 | wildcard bad_state STRLOAD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 203 | |
| 204 | // STRST vld diag reqtype nc jbi cputh inv pf bis |
| 205 | wildcard state STRST_mb ( {4'b1000, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 206 | wildcard state STRST_fb ( {4'b0100, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 207 | wildcard state STRST_wb ( {4'b0010, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 208 | wildcard state STRST_rb ( {4'b0001, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 209 | wildcard state STRST_mb_fb ( {4'b1100, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 210 | wildcard state STRST_mb_wb ( {4'b1010, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 211 | wildcard state STRST_mb_rb ( {4'b1001, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 212 | wildcard bad_state STRST_fb_wb ( {4'b0110, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 213 | wildcard bad_state STRST_fb_rb ( {4'b0101, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 214 | wildcard bad_state STRST_wb_rb ( {4'b0011, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 215 | wildcard bad_state STRST_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 216 | wildcard bad_state STRST_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 217 | wildcard bad_state STRST_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 218 | wildcard bad_state STRST_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 219 | wildcard bad_state STRST_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 220 | |
| 221 | /* |
| 222 | // FWDRQ_LOAD vld diag reqtype nc jbi cputh inv pf bis |
| 223 | wildcard state FWDRQ_LOAD_mb ( {4'b1000, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 224 | wildcard state FWDRQ_LOAD_fb ( {4'b0100, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 225 | wildcard state FWDRQ_LOAD_wb ( {4'b0010, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 226 | wildcard state FWDRQ_LOAD_rb ( {4'b0001, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 227 | wildcard state FWDRQ_LOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 228 | wildcard state FWDRQ_LOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 229 | wildcard state FWDRQ_LOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 230 | wildcard bad_state FWDRQ_LOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 231 | wildcard bad_state FWDRQ_LOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 232 | wildcard bad_state FWDRQ_LOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 233 | wildcard bad_state FWDRQ_LOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 234 | wildcard bad_state FWDRQ_LOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 235 | wildcard bad_state FWDRQ_LOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 236 | wildcard bad_state FWDRQ_LOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 237 | wildcard bad_state FWDRQ_LOAD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 238 | |
| 239 | // FWDRQ_STORE vld diag reqtype nc jbi cputh inv pf bis |
| 240 | wildcard state FWDRQ_STORE_mb ( {4'b1000, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 241 | wildcard state FWDRQ_STORE_fb ( {4'b0100, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 242 | wildcard state FWDRQ_STORE_wb ( {4'b0010, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 243 | wildcard state FWDRQ_STORE_rb ( {4'b0001, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 244 | wildcard state FWDRQ_STORE_mb_fb ( {4'b1100, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 245 | wildcard state FWDRQ_STORE_mb_wb ( {4'b1010, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 246 | wildcard state FWDRQ_STORE_mb_rb ( {4'b1001, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 247 | wildcard bad_state FWDRQ_STORE_fb_wb ( {4'b0110, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 248 | wildcard bad_state FWDRQ_STORE_fb_rb ( {4'b0101, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 249 | wildcard bad_state FWDRQ_STORE_wb_rb ( {4'b0011, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 250 | wildcard bad_state FWDRQ_STORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 251 | wildcard bad_state FWDRQ_STORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 252 | wildcard bad_state FWDRQ_STORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 253 | wildcard bad_state FWDRQ_STORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 254 | wildcard bad_state FWDRQ_STORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} ); |
| 255 | */ |
| 256 | |
| 257 | // RDD vld diag reqtype nc jbi |
| 258 | wildcard state RDD_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 259 | wildcard state RDD_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 260 | wildcard state RDD_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 261 | wildcard state RDD_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 262 | wildcard state RDD_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 263 | wildcard state RDD_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 264 | wildcard state RDD_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 265 | wildcard bad_state RDD_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 266 | wildcard bad_state RDD_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 267 | wildcard bad_state RDD_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 268 | wildcard bad_state RDD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 269 | wildcard bad_state RDD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 270 | wildcard bad_state RDD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 271 | wildcard bad_state RDD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 272 | wildcard bad_state RDD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} ); |
| 273 | |
| 274 | // WR8 vld diag reqtype nc jbi |
| 275 | wildcard state WR8_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 276 | wildcard state WR8_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 277 | wildcard state WR8_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 278 | wildcard state WR8_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 279 | wildcard state WR8_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 280 | wildcard state WR8_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 281 | wildcard state WR8_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 282 | wildcard bad_state WR8_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 283 | wildcard bad_state WR8_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 284 | wildcard bad_state WR8_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 285 | wildcard bad_state WR8_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 286 | wildcard bad_state WR8_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 287 | wildcard bad_state WR8_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 288 | wildcard bad_state WR8_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 289 | wildcard bad_state WR8_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} ); |
| 290 | |
| 291 | // WRI vld diag reqtype nc jbi |
| 292 | wildcard state WRI_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 293 | wildcard state WRI_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 294 | wildcard state WRI_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 295 | wildcard state WRI_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 296 | wildcard state WRI_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 297 | wildcard state WRI_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 298 | wildcard state WRI_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 299 | wildcard bad_state WRI_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 300 | wildcard bad_state WRI_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 301 | wildcard bad_state WRI_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 302 | wildcard bad_state WRI_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 303 | wildcard bad_state WRI_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 304 | wildcard bad_state WRI_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 305 | wildcard bad_state WRI_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |
| 306 | wildcard bad_state WRI_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} ); |