Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / l2sat / l2_buffer_hits_sample.vrhpal
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// OpenSPARC T2 Processor File: l2_buffer_hits_sample.vrhpal
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wildcard state LOAD_mb ( {4'b1000, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_fb ( {4'b0100, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_wb ( {4'b0010, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_rb ( {4'b0001, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state LOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state LOAD_mb_fb_wb_rb ( {4'b1111, 1'b1, 1'b0, LOAD_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// PREFETCH vld diag reqtype nc jbi cputh inv pf bis
wildcard state PREFETCH_mb ( {4'b1000, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_fb ( {4'b0100, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_wb ( {4'b0010, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_rb ( {4'b0001, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_mb_fb ( {4'b1100, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_mb_wb ( {4'b1010, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard state PREFETCH_mb_rb ( {4'b1001, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_fb_wb ( {4'b0110, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_fb_rb ( {4'b0101, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_wb_rb ( {4'b0011, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
wildcard bad_state PREFETCH_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, LOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b1, 1'b0} );
// IMISS vld diag reqtype nc jbi cputh inv pf bis
wildcard state IMISS_mb ( {4'b1000, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_fb ( {4'b0100, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_wb ( {4'b0010, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_rb ( {4'b0001, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_mb_fb ( {4'b1100, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_mb_wb ( {4'b1010, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state IMISS_mb_rb ( {4'b1001, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_fb_wb ( {4'b0110, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_fb_rb ( {4'b0101, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_wb_rb ( {4'b0011, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state IMISS_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, IMISS_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// STORE vld diag reqtype nc jbi cputh inv pf bis
wildcard state STORE_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STORE_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// BLKSTORE vld diag reqtype nc jbi cputh inv pf bis
wildcard state BLKSTORE_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard state BLKSTORE_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
wildcard bad_state BLKSTORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b1, 1'b1} );
// BLKINITST vld diag reqtype nc jbi cputh inv pf bis
wildcard state BLKINITST_mb ( {4'b1000, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_fb ( {4'b0100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_wb ( {4'b0010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_rb ( {4'b0001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_mb_fb ( {4'b1100, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_mb_wb ( {4'b1010, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard state BLKINITST_mb_rb ( {4'b1001, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_fb_wb ( {4'b0110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_fb_rb ( {4'b0101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_wb_rb ( {4'b0011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
wildcard bad_state BLKINITST_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STORE_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b1} );
// CAS1 vld diag reqtype nc jbi cputh inv pf bis
wildcard state CAS1_mb ( {4'b1000, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_fb ( {4'b0100, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_wb ( {4'b0010, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_rb ( {4'b0001, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_mb_fb ( {4'b1100, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_mb_wb ( {4'b1010, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS1_mb_rb ( {4'b1001, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_fb_wb ( {4'b0110, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_fb_rb ( {4'b0101, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_wb_rb ( {4'b0011, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS1_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, CAS1_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// CAS2 vld diag reqtype nc jbi cputh inv pf bis
wildcard state CAS2_mb ( {4'b1000, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_fb ( {4'b0100, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_wb ( {4'b0010, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_rb ( {4'b0001, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_mb_fb ( {4'b1100, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_mb_wb ( {4'b1010, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state CAS2_mb_rb ( {4'b1001, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_fb_wb ( {4'b0110, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_fb_rb ( {4'b0101, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_wb_rb ( {4'b0011, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state CAS2_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, CAS2_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// SWAP vld diag reqtype nc jbi cputh inv pf bis
wildcard state SWAP_mb ( {4'b1000, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_fb ( {4'b0100, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_wb ( {4'b0010, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_rb ( {4'b0001, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_mb_fb ( {4'b1100, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_mb_wb ( {4'b1010, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state SWAP_mb_rb ( {4'b1001, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_fb_wb ( {4'b0110, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_fb_rb ( {4'b0101, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_wb_rb ( {4'b0011, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state SWAP_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, SWAP_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// STRLOAD vld diag reqtype nc jbi cputh inv pf bis
wildcard state STRLOAD_mb ( {4'b1000, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_fb ( {4'b0100, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_wb ( {4'b0010, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_rb ( {4'b0001, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRLOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRLOAD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STRLOAD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// STRST vld diag reqtype nc jbi cputh inv pf bis
wildcard state STRST_mb ( {4'b1000, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_fb ( {4'b0100, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_wb ( {4'b0010, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_rb ( {4'b0001, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_mb_fb ( {4'b1100, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_mb_wb ( {4'b1010, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state STRST_mb_rb ( {4'b1001, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_fb_wb ( {4'b0110, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_fb_rb ( {4'b0101, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_wb_rb ( {4'b0011, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state STRST_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, STRST_RQ, 1'bx, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
/*
// FWDRQ_LOAD vld diag reqtype nc jbi cputh inv pf bis
wildcard state FWDRQ_LOAD_mb ( {4'b1000, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_fb ( {4'b0100, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_wb ( {4'b0010, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_rb ( {4'b0001, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_mb_fb ( {4'b1100, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_mb_wb ( {4'b1010, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_LOAD_mb_rb ( {4'b1001, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_fb_wb ( {4'b0110, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_fb_rb ( {4'b0101, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_wb_rb ( {4'b0011, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_LOAD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, FWD_RQ, 1'b1, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
// FWDRQ_STORE vld diag reqtype nc jbi cputh inv pf bis
wildcard state FWDRQ_STORE_mb ( {4'b1000, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_fb ( {4'b0100, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_wb ( {4'b0010, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_rb ( {4'b0001, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_mb_fb ( {4'b1100, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_mb_wb ( {4'b1010, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard state FWDRQ_STORE_mb_rb ( {4'b1001, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_fb_wb ( {4'b0110, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_fb_rb ( {4'b0101, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_wb_rb ( {4'b0011, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
wildcard bad_state FWDRQ_STORE_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, FWD_RQ, 1'b0, 1'b0, 6'bx, 1'b0, 1'b0, 1'b0} );
*/
// RDD vld diag reqtype nc jbi
wildcard state RDD_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard state RDD_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
wildcard bad_state RDD_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx001, 1'b0, 1'b1, 9'bx} );
// WR8 vld diag reqtype nc jbi
wildcard state WR8_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard state WR8_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WR8_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx010, 1'b0, 1'b1, 9'bx} );
// WRI vld diag reqtype nc jbi
wildcard state WRI_mb ( {4'b1000, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_fb ( {4'b0100, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_wb ( {4'b0010, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_rb ( {4'b0001, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_mb_fb ( {4'b1100, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_mb_wb ( {4'b1010, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard state WRI_mb_rb ( {4'b1001, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_fb_wb ( {4'b0110, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_fb_rb ( {4'b0101, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_wb_rb ( {4'b0011, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_mb_fb_wb ( {4'b1110, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_mb_fb_rb ( {4'b1101, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_mb_wb_rb ( {4'b1011, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_fb_wb_rb ( {4'b0111, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );
wildcard bad_state WRI_mb_fb_wb_rb( {4'b1111, 1'b1, 1'b0, 5'bxx100, 1'b0, 1'b1, 9'bx} );