| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: niu_txintr_utils.vr |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #include <vera_defines.vrh> |
| 36 | |
| 37 | #include "niu_tx_descp.vrh" |
| 38 | |
| 39 | #include "niu_int_dev.vrh" |
| 40 | #include "niu_int_mgr.vrh" |
| 41 | #include "cMesg.vrh" |
| 42 | |
| 43 | extern Mesg be_msg; |
| 44 | |
| 45 | // adding txdma intr dev class |
| 46 | |
| 47 | class CNiuIntrDevTxDMAm extends DMAChannel { |
| 48 | |
| 49 | event intr_rcvd; |
| 50 | bit [63:0] rd_data; |
| 51 | bit [63:0] wr_data; |
| 52 | integer count = 0; |
| 53 | integer exp_err; |
| 54 | |
| 55 | task new(integer i, integer dev_id) { |
| 56 | super.new(i,"TX",dev_id); |
| 57 | trigger(OFF,intr_rcvd); |
| 58 | exp_err = 0; |
| 59 | } |
| 60 | |
| 61 | function integer isr( ( bit[1:0] ldf_flags = 0) ) { |
| 62 | printf("Start In ISR id - %d LDF Flags - %x \n",super.dev_id,ldf_flags); |
| 63 | isr_done = 0; |
| 64 | SetPendingFlag(); |
| 65 | |
| 66 | |
| 67 | trigger(ON,intr_rcvd); |
| 68 | |
| 69 | if(ldf_flags[1] == 1'b1) { |
| 70 | // error interrupt detected |
| 71 | // read the tx_cs reg |
| 72 | Read_TxCs(rd_data); |
| 73 | be_msg.print(e_mesg_info,"TX_ISR","Tx_Cs_Rd","Value of TxCs %h for DMA %d\n",rd_data,this.id); |
| 74 | if(rd_data[7:0] == 8'h0) { |
| 75 | // err interrupt received but status bits not set |
| 76 | be_msg.print(e_mesg_error,"TX_ISR","err_flag_chk","Err intr rcvd, but err_stat zero for DMA %d\n",this.id); |
| 77 | } else { |
| 78 | if(!exp_err) { |
| 79 | if(rd_data[0]) |
| 80 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Pkt_Prt_Err status set for DMA %d\n",this.id); |
| 81 | else if(rd_data[1]) |
| 82 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Conf_Prt_Err status set for DMA %d\n",this.id); |
| 83 | else if(rd_data[2]) |
| 84 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Nack_PktRd_Err status set for DMA %d\n",this.id); |
| 85 | else if(rd_data[3]) |
| 86 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Nack_PrefRd_Err status set for DMA %d\n",this.id); |
| 87 | else if(rd_data[4]) |
| 88 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Pref_BufPar_Err status set for DMA %d\n",this.id); |
| 89 | else if(rd_data[5]) |
| 90 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Ring_Oflow_Err status set for DMA %d\n",this.id); |
| 91 | else if(rd_data[6]) |
| 92 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Pkt_Size_Err status set for DMA %d\n",this.id); |
| 93 | else if(rd_data[7]) |
| 94 | be_msg.print(e_mesg_error,"TX_ISR","err_chk","Err intr rcvd, Mbox_Err status set for DMA %d\n",this.id); |
| 95 | } else { |
| 96 | if(rd_data[0]) |
| 97 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Pkt_Prt_Err status set for DMA %d\n",this.id); |
| 98 | else if(rd_data[1]) |
| 99 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Conf_Prt_Err status set for DMA %d\n",this.id); |
| 100 | else if(rd_data[2]) |
| 101 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Nack_PktRd_Err status set for DMA %d\n",this.id); |
| 102 | else if(rd_data[3]) |
| 103 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Nack_PrefRd_Err status set for DMA %d\n",this.id); |
| 104 | else if(rd_data[4]) |
| 105 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Pref_BufPar_Err status set for DMA %d\n",this.id); |
| 106 | else if(rd_data[5]) |
| 107 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Ring_Oflow_Err status set for DMA %d\n",this.id); |
| 108 | else if(rd_data[6]) |
| 109 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Pkt_Size_Err status set for DMA %d\n",this.id); |
| 110 | else if(rd_data[7]) |
| 111 | be_msg.print(e_mesg_info,"TX_ISR","err_chk","Err intr rcvd, Mbox_Err status set for DMA %d\n",this.id); |
| 112 | } |
| 113 | reset_dma(); |
| 114 | |
| 115 | // trigger the event |
| 116 | isr_done = 1; |
| 117 | |
| 118 | } |
| 119 | } else { |
| 120 | // read the tx_cs reg |
| 121 | Read_TxCs(rd_data); |
| 122 | be_msg.print(e_mesg_info,"TX_ISR","Tx_Cs_Rd","Value of TxCs %h for DMA %d\n",rd_data,this.id); |
| 123 | // printf("Value of TxCs from ISR %h\n",rd_data); |
| 124 | // re-enable mailbox update after this |
| 125 | wr_data = rd_data | 64'h2000_0000; |
| 126 | count++; |
| 127 | SetTxCs(wr_data); |
| 128 | // trigger the event |
| 129 | isr_done = 1; |
| 130 | } |
| 131 | ClrPendingFlag(); |
| 132 | } |
| 133 | } |
| 134 | |