// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: dmu_dsn_ccc_fsm.v
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// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
parameter IDLE = 3'b000, // state machine states
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
output [4:0] fsm2ctl_dbg_grp_b_1;
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
reg [2:0] state, nxt_state;
reg [`FIRE_CSR_TOUT_BITS] timer, nxt_timer;
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
//0in state_transition -var state -val IDLE -next IDLE MDTO RQST
//0in state_transition -var state -val RQST -next WAIT RQST
//0in state_transition -var state -val WAIT -next AVIO DONE MDTO WAIT
//0in state_transition -var state -val DONE -next SKIP
//0in state_transition -var state -val MDTO -next SKIP
//0in state_transition -var state -val AVIO -next SKIP
//0in state_transition -var state -val SKIP -next IDLE
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
// arb valid and map error
wire arb_vld = (rd_req_vld | wr_req_vld) && ~ack_busy;
// access violation, request valid, and response valid
wire acc_vio = dep2fsm_valid & dep2fsm_done & dep2fsm_acc_vio;
//BP 3-17-04 req_vld should be 1 at the beginning of the csr ring transfer, right????
wire req_vld = dep2fsm_valid & ~dep2fsm_done & ~dep2fsm_acc_vio;
wire rsp_vld = dep2fsm_valid & dep2fsm_done & ~dep2fsm_acc_vio;
wire rd_ack_vld = fsm2arb_done & ~fsm2cdp_stts & rd_req_vld;
wire rd_nack_vld = fsm2arb_done & fsm2cdp_stts & rd_req_vld;
always @ (state or arb_vld or acc_vio or map_err or
req_vld or rsp_vld or timeout) begin
case (state) // synopsys parallel_case
if (!arb_vld) nxt_state = IDLE;
else if (map_err) nxt_state = MDTO;
if (req_vld) nxt_state = WAIT;
if (acc_vio) nxt_state = AVIO;
else if (rsp_vld) nxt_state = DONE;
else if (timeout) nxt_state = MDTO;
nxt_state = 3'b000; //0in < fire -message " got x's in dsn_ccc_fsm"
always @ (state or timer ) begin
case (state) // synopsys parallel_case
nxt_timer = timer - 8'b00000001;
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
always @ (posedge clk) begin
// ----------------------------------------------------------------------------
// debug-- debug signals for debug group b sub_sel 1
// ----------------------------------------------------------------------------
assign fsm2ctl_dbg_grp_b_1[4:0] = {arb_vld,req_vld,acc_vio,rsp_vld,timeout};
endmodule // dmu_dsn_ccc_fsm