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// OpenSPARC T2 Processor File: dmu_mmu_arbiter_rrobin.v
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module dmu_mmu_arbiter_rrobin (
//output lkupreq_pending, csreq_pending;
// assign lkup_deque = ram_done & next_grant;
// assign lkup_deque = next_grant;
assign csr_done = ram_done_d1 & ~curr_grant_d1;
always @(posedge clk) begin
curr_grant <= next_grant;
curr_grant_d1 <= curr_grant;
// wire lkup_mux_out = lkupreq ? ~next_grant : 1'b0;
// wire csr_mux_out = csrequest ? next_grant : 1'b0;
assign next_grant = csrequest ? 1'b0 : 1'b1;
// always @(posedge clk) begin
// lkupreq_pending <= 1'b0;
// lkupreq_pending <= lkup_mux_out;
// always @(posedge clk) begin
// csreq_pending <= 1'b0;
// csreq_pending <= csr_mux_out;
always @(posedge clk) begin
// ram_done_d1 <= ram_done & ~next_grant;
// always @(curr_grant or lkupreq or
// csrequest or lkupreq_pending or
// next_grant = curr_grant;
// casex ({lkupreq_pending,csreq_pending,lkupreq,csrequest})
// next_grant = curr_grant;
// default : next_grant = 1'bx;