design/sys/iop/dmu/rtl/dmu_psb_defines.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: dmu_psb_defines.h
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
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* ========== Copyright Header End ============================================
*/
`ifdef FIRE_DLC_PSB_DEFINES
`else
`define FIRE_DLC_PSB_DEFINES

`define FIRE_DLC_PSB_CSRBUS_EXT_ADDR_WIDTH      5
`define FIRE_DLC_PSB_CSRBUS_EXT_ADDR_RANGE      4:0

`define FIRE_DLC_PSB_INSTANCE_ID_VALUE_A 1'h0
`define FIRE_DLC_PSB_INSTANCE_ID_VALUE_B 1'h1

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_psb_csr_psb_dma
//-------------------------------------------------------

`define FIRE_DLC_PSB_CSR_A_PSB_DMA_HW_ADDR      27'b000000011001100000000000000
`define FIRE_DLC_PSB_CSR_A_PSB_DMA_ADDR 30'b000000011001100000000000000000
`define FIRE_DLC_PSB_CSR_B_PSB_DMA_HW_ADDR      27'b000000011101100000000000000
`define FIRE_DLC_PSB_CSR_B_PSB_DMA_ADDR 30'b000000011101100000000000000000

`define FIRE_DLC_PSB_CSR_PSB_DMA_WIDTH  64
`define FIRE_DLC_PSB_CSR_PSB_DMA_DEPTH  32
`define FIRE_DLC_PSB_CSR_PSB_DMA_SLC    63:0
`define FIRE_DLC_PSB_CSR_PSB_DMA_INT_SLC        63:0
`define FIRE_DLC_PSB_CSR_PSB_DMA_POSITION       0
`define FIRE_DLC_PSB_CSR_PSB_DMA_LOW_ADDR_WIDTH 5
`define FIRE_DLC_PSB_CSR_PSB_DMA_SEL_RANGE      4:0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ADDR_RANGE     26:5
`define FIRE_DLC_PSB_CSR_PSB_DMA_READ_MASK      64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_READ_ONLY_MASK 64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_WRITE_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_WRITE_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_SET_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_CLEAR_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_TOGGLE_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_RMASK  64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_RESERVED_BIT_MASK      64'b1111111111111111111111100000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_HW_LD_MASK     64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_POR_VALUE      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_DMA_INTERNAL_REG   0
`define FIRE_DLC_PSB_CSR_PSB_DMA_EXTERNAL_DECODE_REG    0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ZERO_TIME_OMNI 0
`define FIRE_DLC_PSB_CSR_PSB_DMA_NUM_FIELDS     1
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_FID      0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_SLC      40:0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_WIDTH    41
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_INT_SLC  40:0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_POSITION 0
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_FMASK    64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_HW_LD_MASK       64'b0000000000000000000000011111111111111111111111111111111111111111
`define FIRE_DLC_PSB_CSR_PSB_DMA_ENTRY_POR_VALUE        41'b00000000000000000000000000000000000000000

//-------------------------------------------------------
//----- Variable definitions for register fire_dlc_psb_csr_psb_pio
//-------------------------------------------------------

`define FIRE_DLC_PSB_CSR_A_PSB_PIO_HW_ADDR      27'b000000011001100100000000000
`define FIRE_DLC_PSB_CSR_A_PSB_PIO_ADDR 30'b000000011001100100000000000000
`define FIRE_DLC_PSB_CSR_B_PSB_PIO_HW_ADDR      27'b000000011101100100000000000
`define FIRE_DLC_PSB_CSR_B_PSB_PIO_ADDR 30'b000000011101100100000000000000

`define FIRE_DLC_PSB_CSR_PSB_PIO_WIDTH  64
`define FIRE_DLC_PSB_CSR_PSB_PIO_DEPTH  16
`define FIRE_DLC_PSB_CSR_PSB_PIO_SLC    63:0
`define FIRE_DLC_PSB_CSR_PSB_PIO_INT_SLC        63:0
`define FIRE_DLC_PSB_CSR_PSB_PIO_POSITION       0
`define FIRE_DLC_PSB_CSR_PSB_PIO_LOW_ADDR_WIDTH 4
`define FIRE_DLC_PSB_CSR_PSB_PIO_SEL_RANGE      3:0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ADDR_RANGE     26:4
`define FIRE_DLC_PSB_CSR_PSB_PIO_READ_MASK      64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_WRITE_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_WRITE_ONLY_MASK        64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_SET_MASK       64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_CLEAR_MASK     64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_TOGGLE_MASK    64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_RMASK  64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_RESERVED_BIT_MASK      64'b1111111111111111111111111111111111111111111111111111111110000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_HW_LD_MASK     64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_POR_VALUE      64'b0000000000000000000000000000000000000000000000000000000000000000
`define FIRE_DLC_PSB_CSR_PSB_PIO_INTERNAL_REG   0
`define FIRE_DLC_PSB_CSR_PSB_PIO_EXTERNAL_DECODE_REG    0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ZERO_TIME_OMNI 0
`define FIRE_DLC_PSB_CSR_PSB_PIO_NUM_FIELDS     1
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_FID      0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_SLC      6:0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_WIDTH    7
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_INT_SLC  6:0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_POSITION 0
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_FMASK    64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_HW_LD_MASK       64'b0000000000000000000000000000000000000000000000000000000001111111
`define FIRE_DLC_PSB_CSR_PSB_PIO_ENTRY_POR_VALUE        7'b0000000


`endif