// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: niu_ram_64_146.v
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// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
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// ========== Copyright Header End ============================================
/**********************************************************
***********************************************************
File name : niu_ram_64_146.v
Module(s) name : niu_ram_64_146
Author's name : George Chu
************************************************************
***********************************************************/
parameter DATA_WIDTH_MINUS1 = 145;
parameter ADDR_WIDTH_MINUS1 = 5;
input tcu_se_scancollar_in;
input tcu_array_wr_inhibit;
input [DATA_WIDTH_MINUS1:0] mbi_wdata;
input [ADDR_WIDTH_MINUS1:0] mbi_rd_adr;
input [ADDR_WIDTH_MINUS1:0] mbi_wr_adr;
input [DATA_WIDTH_MINUS1:0] data_inp; // data_input, via port_B
input [ADDR_WIDTH_MINUS1:0] addr_rd; // read_address, via port_A
input [ADDR_WIDTH_MINUS1:0] addr_wt; // write_address, via port_B
input wt_enable; // write_enable, via port_B
input cs_rd; // chip_selet_rd_port, i.e., port_A
output [DATA_WIDTH_MINUS1:0] data_out; // data read out, via port_A
wire [DATA_WIDTH_MINUS1:0] data_out;
niu_reg_64_146 reg_64_146_0 (
.data_inp (data_inp[145:0]),
.data_out (data_out[145:0])
niu_ram_64x146 ram_64x146_0 (
.tcu_se_scancollar_in (tcu_se_scancollar_in),
.tcu_array_wr_inhibit (tcu_array_wr_inhibit),
.mbi_rd_adr (mbi_rd_adr),
.mbi_wr_adr (mbi_wr_adr),
.data_inp (data_inp[145:0]),
.data_out (data_out[145:0])