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// OpenSPARC T2 Processor File: lsu_dcp_dp.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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input [127:0] lmd_fill_data_e;
input [7:0] dcc_parity_invert;
output [127:0] dcp_fill_data_e;
output [15:0] dcp_parity;
lsu_dcp_dp_mux_macro__dmux_32x__mux_pgpe__ports_2__width_64 bist_dmux0 (
.din0 ({8{mbi_wdata[7:0]}}),
.din1 (lmd_fill_data_e[127:64]),
.dout (dcp_fill_data_e[127:64])
lsu_dcp_dp_mux_macro__dmux_32x__mux_pgpe__ports_2__width_64 bist_dmux1 (
.din0 ({8{mbi_wdata[7:0]}}),
.din1 (lmd_fill_data_e[63:0]),
.dout (dcp_fill_data_e[63:0])
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
lsu_dcp_dp_prty_macro__width_8 prty_b00 (
.din (lmd_fill_data_e[7:0]),
lsu_dcp_dp_prty_macro__width_8 prty_b01 (
.din (lmd_fill_data_e[15:8]),
lsu_dcp_dp_prty_macro__width_8 prty_b02 (
.din (lmd_fill_data_e[23:16]),
lsu_dcp_dp_prty_macro__width_8 prty_b03 (
.din (lmd_fill_data_e[31:24]),
lsu_dcp_dp_prty_macro__width_8 prty_b04 (
.din (lmd_fill_data_e[39:32]),
lsu_dcp_dp_prty_macro__width_8 prty_b05 (
.din (lmd_fill_data_e[47:40]),
lsu_dcp_dp_prty_macro__width_8 prty_b06 (
.din (lmd_fill_data_e[55:48]),
lsu_dcp_dp_prty_macro__width_8 prty_b07 (
.din (lmd_fill_data_e[63:56]),
lsu_dcp_dp_prty_macro__width_8 prty_b08 (
.din (lmd_fill_data_e[71:64]),
lsu_dcp_dp_prty_macro__width_8 prty_b09 (
.din (lmd_fill_data_e[79:72]),
lsu_dcp_dp_prty_macro__width_8 prty_b10 (
.din (lmd_fill_data_e[87:80]),
lsu_dcp_dp_prty_macro__width_8 prty_b11 (
.din (lmd_fill_data_e[95:88]),
lsu_dcp_dp_prty_macro__width_8 prty_b12 (
.din (lmd_fill_data_e[103:96]),
lsu_dcp_dp_prty_macro__width_8 prty_b13 (
.din (lmd_fill_data_e[111:104]),
lsu_dcp_dp_prty_macro__width_8 prty_b14 (
.din (lmd_fill_data_e[119:112]),
lsu_dcp_dp_prty_macro__width_8 prty_b15 (
.din (lmd_fill_data_e[127:120]),
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
lsu_dcp_dp_xor_macro__stack_16l__width_16 error_inj (
.din1 ({dcc_parity_invert[7:0],dcc_parity_invert[7:0]}),
////////////////////////////////////////////////////////////////////////////////
// NOTE: If timing is too tight, this mux could be removed. It would mean that
// the bist engine doesn't have direct control over the parity bits.
////////////////////////////////////////////////////////////////////////////////
lsu_dcp_dp_mux_macro__dmux_32x__mux_pgpe__ports_2__stack_16l__width_16 bist_pmux (
.din0 ({2{mbi_wdata[7:0]}}),
// general mux macro for pass-gate and and-or muxes with/wout priority encoders
// also for pass-gate with decoder
// any PARAMS parms go into naming of macro
module lsu_dcp_dp_mux_macro__dmux_32x__mux_pgpe__ports_2__width_64 (
// parity macro (even parity)
module lsu_dcp_dp_prty_macro__width_8 (
// xor macro for ports = 2,3
module lsu_dcp_dp_xor_macro__stack_16l__width_16 (
// general mux macro for pass-gate and and-or muxes with/wout priority encoders
// also for pass-gate with decoder
// any PARAMS parms go into naming of macro
module lsu_dcp_dp_mux_macro__dmux_32x__mux_pgpe__ports_2__stack_16l__width_16 (