* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: interrupt_SWVR_INTR_REC_mode.s
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* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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* ========== Copyright Header End ============================================
#define MAIN_PAGE_NUCLEUS_ALSO
#define MAIN_PAGE_HV_ALSO
#define H_HT0_Interrupt_0x60
#define My_HT0_Interrupt_0x60 \
call my_interrupt_code; \
#define H_HT0_Privileged_Action_0x37
#define My_HT0_Privileged_Action_0x37 \
call my_priv_action_trap_code; \
/************************************************************************
************************************************************************/
! Determine thread running on
be main_t0 ! Branch if thread 0
ba main_t1 ! Branch if not thread 0
/************************************************************************
************************************************************************/
! Wait for thread one to be ready.
setx user_data_start, %g1, %g2
setx 800, %g1, %g3 ! DTM wait count
setx 200, %g1, %g3 ! wait count
lda [%g2]ASI_AS_IF_USER_PRIMARY, %g7
be test_failed ! T1 never started
sta %g0, [%g2]ASI_AS_IF_USER_PRIMARY
! Send the first interrupt to T1
wr %g0, INT_VEC_DIS, %asi
! Wait for T1 to be ready
setx user_data_start, %g1, %g2
setx 800, %g1, %g3 ! DTM wait count
setx 200, %g1, %g3 ! wait count
lda [%g2]ASI_AS_IF_USER_PRIMARY, %g7
be test_failed ! T1 never started
sta %g0, [%g2]ASI_AS_IF_USER_PRIMARY
! Send the second interrupt to T1
wr %g0, INT_VEC_DIS, %asi
/************************************************************************
************************************************************************/
setx user_data_start, %g1, %g2
! Wait for first interrupt
setx 800, %g1, %g4 ! DTM wait count
setx 200, %g1, %g4 ! wait count
ba test_failed ! interrupt did not occur
setx user_data_start, %g1, %g2
! Try to read ASI_INTR_RECEIVE reg. should cause priviliged action trap
ldxa [%g0]ASI_INTR_RECEIVE, %g6
! Go to supervisor mode for next interrupt
! Signal T0 we're ready for next interrupt
setx user_data_start, %g1, %g2
! Wait for second interrupt
setx 800, %g1, %g4 ! DTM wait count
setx 200, %g1, %g4 ! wait count
ba test_failed ! interrupt did not occur
setx user_data_start, %g1, %g2
! Try to read ASI_INTR_RECEIVE reg. should cause DAE_invalid_ASI trap
ldxa [%g0]ASI_INTR_RECEIVE, %g6
! Have the two traps occured?
setx t1_trap_flag, %g1, %g2
setx user_data_start, %g1, %g2
/**********************************************************************
**********************************************************************/
.global my_interrupt_code
.global my_priv_action_trap_code
.global my_H_T0_Reserved_0x14
ldxa [%g0]ASI_SWVR_INTR_R, %g0
! Indicate interrupt occured
setx user_data_start+16, %l1, %l2
lda [%l2]ASI_AS_IF_USER_PRIMARY, %l3
sta %l3, [%l2]ASI_AS_IF_USER_PRIMARY
my_priv_action_trap_code:
setx t1_trap_flag, %l1, %l2
lda [%l2]ASI_AS_IF_USER_PRIMARY, %l3
sta %l3, [%l2]ASI_AS_IF_USER_PRIMARY
/************************************************************************
************************************************************************/