* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: dump_regs.h
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
* may be used, or where a choice of which version of the GPL is applied is
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
* CA 95054 USA or visit www.sun.com if you need additional information or
* ========== Copyright Header End ============================================
#include "checkp_offsets.h"
/*overwrites %g5, %g4 used as store for %cwp, uses g3 as buffer pointer and increments it to end of data buffer*/
/*assumes we're using alternate globals */
/*replay side overwrites scratch regs at VA0, VA8 of asi 4f */
stx
%l0
,[%g5
+(0*CHECKP_LOCALS_INCR
)]
stx
%l1
,[%g5
+(1*CHECKP_LOCALS_INCR
)]
stx
%l2
,[%g5
+(2*CHECKP_LOCALS_INCR
)]
stx
%l3
,[%g5
+(3*CHECKP_LOCALS_INCR
)]
stx
%l4
,[%g5
+(4*CHECKP_LOCALS_INCR
)]
stx
%l5
,[%g5
+(5*CHECKP_LOCALS_INCR
)]
stx
%l6
,[%g5
+(6*CHECKP_LOCALS_INCR
)]
stx
%l7
,[%g5
+(7*CHECKP_LOCALS_INCR
)]
add
%g5
, (CHECKP_LOCALS_INCR
*8), %g5
stx
%i0
,[%g5
+(0*CHECKP_INS_INCR
)]
stx
%i1
,[%g5
+(1*CHECKP_INS_INCR
)]
stx
%i2
,[%g5
+(2*CHECKP_INS_INCR
)]
stx
%i3
,[%g5
+(3*CHECKP_INS_INCR
)]
stx
%i4
,[%g5
+(4*CHECKP_INS_INCR
)]
stx
%i5
,[%g5
+(5*CHECKP_INS_INCR
)]
stx
%i6
,[%g5
+(6*CHECKP_INS_INCR
)]
stx
%i7
,[%g5
+(7*CHECKP_INS_INCR
)]
add
%g5
, (CHECKP_INS_INCR
*8), %g5
ldx
[%g5
+(0*CHECKP_LOCALS_INCR
)],%l0
ldx
[%g5
+(1*CHECKP_LOCALS_INCR
)],%l1
ldx
[%g5
+(2*CHECKP_LOCALS_INCR
)],%l2
ldx
[%g5
+(3*CHECKP_LOCALS_INCR
)],%l3
ldx
[%g5
+(4*CHECKP_LOCALS_INCR
)],%l4
ldx
[%g5
+(5*CHECKP_LOCALS_INCR
)],%l5
ldx
[%g5
+(6*CHECKP_LOCALS_INCR
)],%l6
ldx
[%g5
+(7*CHECKP_LOCALS_INCR
)],%l7
add
%g5
, (CHECKP_LOCALS_INCR
*8), %g5
ldx
[%g5
+(0*CHECKP_INS_INCR
)],%i0
ldx
[%g5
+(1*CHECKP_INS_INCR
)],%i1
ldx
[%g5
+(2*CHECKP_INS_INCR
)],%i2
ldx
[%g5
+(3*CHECKP_INS_INCR
)],%i3
ldx
[%g5
+(4*CHECKP_INS_INCR
)],%i4
ldx
[%g5
+(5*CHECKP_INS_INCR
)],%i5
ldx
[%g5
+(6*CHECKP_INS_INCR
)],%i6
ldx
[%g5
+(7*CHECKP_INS_INCR
)],%i7
add
%g5
, (CHECKP_INS_INCR
*8), %g5
add
%g5
, (CHECKP_INS_INCR
*16), %g5
! 0x32 words x
8 = 256 bytes
std
%f2
, [%g5
+ (1*CHECKP_FLOATS_INCR
)]
std
%f4
, [%g5
+ (2*CHECKP_FLOATS_INCR
)]
std
%f6
, [%g5
+ (3*CHECKP_FLOATS_INCR
)]
std
%f8
, [%g5
+ (4*CHECKP_FLOATS_INCR
)]
std
%f10
, [%g5
+ (5*CHECKP_FLOATS_INCR
)]
std
%f12
, [%g5
+ (6*CHECKP_FLOATS_INCR
)]
std
%f14
, [%g5
+ (7*CHECKP_FLOATS_INCR
)]
std
%f16
, [%g5
+ (8*CHECKP_FLOATS_INCR
)]
std
%f18
, [%g5
+ (9*CHECKP_FLOATS_INCR
)]
std
%f20
, [%g5
+ (10*CHECKP_FLOATS_INCR
)]
std
%f22
, [%g5
+ (11*CHECKP_FLOATS_INCR
)]
std
%f24
, [%g5
+ (12*CHECKP_FLOATS_INCR
)]
std
%f26
, [%g5
+ (13*CHECKP_FLOATS_INCR
)]
std
%f28
, [%g5
+ (14*CHECKP_FLOATS_INCR
)]
std
%f30
, [%g5
+ (15*CHECKP_FLOATS_INCR
)]
std
%f32
, [%g5
+ (16*CHECKP_FLOATS_INCR
)]
std
%f34
, [%g5
+ (17*CHECKP_FLOATS_INCR
)]
std
%f36
, [%g5
+ (18*CHECKP_FLOATS_INCR
)]
std
%f38
, [%g5
+ (19*CHECKP_FLOATS_INCR
)]
std
%f40
, [%g5
+ (20*CHECKP_FLOATS_INCR
)]
std
%f42
, [%g5
+ (21*CHECKP_FLOATS_INCR
)]
std
%f44
, [%g5
+ (22*CHECKP_FLOATS_INCR
)]
std
%f46
, [%g5
+ (23*CHECKP_FLOATS_INCR
)]
std
%f48
, [%g5
+ (24*CHECKP_FLOATS_INCR
)]
std
%f50
, [%g5
+ (25*CHECKP_FLOATS_INCR
)]
std
%f52
, [%g5
+ (26*CHECKP_FLOATS_INCR
)]
std
%f54
, [%g5
+ (27*CHECKP_FLOATS_INCR
)]
std
%f56
, [%g5
+ (28*CHECKP_FLOATS_INCR
)]
std
%f58
, [%g5
+ (29*CHECKP_FLOATS_INCR
)]
std
%f60
, [%g5
+ (30*CHECKP_FLOATS_INCR
)]
std
%f62
, [%g5
+ (31*CHECKP_FLOATS_INCR
)]
ldd
[%g5
+(1*CHECKP_FLOATS_INCR
)], %f2
ldd
[%g5
+(2*CHECKP_FLOATS_INCR
)], %f4
ldd
[%g5
+(3*CHECKP_FLOATS_INCR
)], %f6
ldd
[%g5
+(4*CHECKP_FLOATS_INCR
)], %f8
ldd
[%g5
+(5*CHECKP_FLOATS_INCR
)], %f10
ldd
[%g5
+(6*CHECKP_FLOATS_INCR
)], %f12
ldd
[%g5
+(7*CHECKP_FLOATS_INCR
)], %f14
ldd
[%g5
+(8*CHECKP_FLOATS_INCR
)], %f16
ldd
[%g5
+(9*CHECKP_FLOATS_INCR
)], %f18
ldd
[%g5
+(10*CHECKP_FLOATS_INCR
)], %f20
ldd
[%g5
+(11*CHECKP_FLOATS_INCR
)], %f22
ldd
[%g5
+(12*CHECKP_FLOATS_INCR
)], %f24
ldd
[%g5
+(13*CHECKP_FLOATS_INCR
)], %f26
ldd
[%g5
+(14*CHECKP_FLOATS_INCR
)], %f28
ldd
[%g5
+(15*CHECKP_FLOATS_INCR
)], %f30
ldd
[%g5
+(16*CHECKP_FLOATS_INCR
)], %f32
ldd
[%g5
+(17*CHECKP_FLOATS_INCR
)], %f34
ldd
[%g5
+(18*CHECKP_FLOATS_INCR
)], %f36
ldd
[%g5
+(19*CHECKP_FLOATS_INCR
)], %f38
ldd
[%g5
+(20*CHECKP_FLOATS_INCR
)], %f40
ldd
[%g5
+(21*CHECKP_FLOATS_INCR
)], %f42
ldd
[%g5
+(22*CHECKP_FLOATS_INCR
)], %f44
ldd
[%g5
+(23*CHECKP_FLOATS_INCR
)], %f46
ldd
[%g5
+(24*CHECKP_FLOATS_INCR
)], %f48
ldd
[%g5
+(25*CHECKP_FLOATS_INCR
)], %f50
ldd
[%g5
+(26*CHECKP_FLOATS_INCR
)], %f52
ldd
[%g5
+(27*CHECKP_FLOATS_INCR
)], %f54
ldd
[%g5
+(28*CHECKP_FLOATS_INCR
)], %f56
ldd
[%g5
+(29*CHECKP_FLOATS_INCR
)], %f58
ldd
[%g5
+(30*CHECKP_FLOATS_INCR
)], %f60
ldd
[%g5
+(31*CHECKP_FLOATS_INCR
)], %f62
add
%g5
, (32*CHECKP_FLOATS_INCR
), %g5
/*{{{ dump program state also trap state regs*/
mov
%asr25
, %g3
!stick_cmp
/*{{{ dump trap state regs for TL 1 thru 6*/
! 0x68 bytes
+ 32*num TL bytes
wr
%g3
, %g0
, %set_softint
!save l1
,l2 into globals g3
,g5
,l2 becomes g5 ptr
!assume bottom two scratch regs aren
't used yet
stx %g0, [%l2+(0*CHECKP_GLOBALS_INCR)]
stx %g1, [%l2+(1*CHECKP_GLOBALS_INCR)]
stx %g2, [%l2+(2*CHECKP_GLOBALS_INCR)]
stx %g3, [%l2+(3*CHECKP_GLOBALS_INCR)]
stx %g4, [%l2+(4*CHECKP_GLOBALS_INCR)]
stx %g5, [%l2+(5*CHECKP_GLOBALS_INCR)]
stx %g6, [%l2+(6*CHECKP_GLOBALS_INCR)]
stx %g7, [%l2+(7*CHECKP_GLOBALS_INCR)]
ldx [%l2+(0*CHECKP_GLOBALS_INCR)], %g0
ldx [%l2+(1*CHECKP_GLOBALS_INCR)], %g1
ldx [%l2+(2*CHECKP_GLOBALS_INCR)], %g2
ldx [%l2+(3*CHECKP_GLOBALS_INCR)], %g3
ldx [%l2+(4*CHECKP_GLOBALS_INCR)], %g4
ldx [%l2+(5*CHECKP_GLOBALS_INCR)], %g5
ldx [%l2+(6*CHECKP_GLOBALS_INCR)], %g6
ldx [%l2+(7*CHECKP_GLOBALS_INCR)], %g7
add %l2, (8*CHECKP_GLOBALS_INCR), %l2
stx %g0,[%l2+(0*CHECKP_GLOBALS_INCR)]
stx %g1,[%l2+(1*CHECKP_GLOBALS_INCR)]
stx %g2,[%l2+(2*CHECKP_GLOBALS_INCR)]
stx %g3,[%l2+(3*CHECKP_GLOBALS_INCR)]
stx %g4,[%l2+(4*CHECKP_GLOBALS_INCR)]
stx %g5,[%l2+(5*CHECKP_GLOBALS_INCR)]
stx %g6,[%l2+(6*CHECKP_GLOBALS_INCR)]
stx %g7,[%l2+(7*CHECKP_GLOBALS_INCR)]
ldx [%l2+(0*CHECKP_GLOBALS_INCR)], %g0
ldx [%l2+(1*CHECKP_GLOBALS_INCR)], %g1
ldx [%l2+(2*CHECKP_GLOBALS_INCR)], %g2
ldx [%l2+(3*CHECKP_GLOBALS_INCR)], %g3
ldx [%l2+(4*CHECKP_GLOBALS_INCR)], %g4
ldx [%l2+(5*CHECKP_GLOBALS_INCR)], %g5
ldx [%l2+(6*CHECKP_GLOBALS_INCR)], %g6
ldx [%l2+(7*CHECKP_GLOBALS_INCR)], %g7
add %l2, (8*CHECKP_GLOBALS_INCR), %l2
stx %g0,[%l2+(0*CHECKP_GLOBALS_INCR)]
stx %g1,[%l2+(1*CHECKP_GLOBALS_INCR)]
stx %g2,[%l2+(2*CHECKP_GLOBALS_INCR)]
stx %g3,[%l2+(3*CHECKP_GLOBALS_INCR)]
stx %g4,[%l2+(4*CHECKP_GLOBALS_INCR)]
stx %g5,[%l2+(5*CHECKP_GLOBALS_INCR)]
stx %g6,[%l2+(6*CHECKP_GLOBALS_INCR)]
stx %g7,[%l2+(7*CHECKP_GLOBALS_INCR)]
ldx [%l2+(0*CHECKP_GLOBALS_INCR)], %g0
ldx [%l2+(1*CHECKP_GLOBALS_INCR)], %g1
ldx [%l2+(2*CHECKP_GLOBALS_INCR)], %g2
ldx [%l2+(3*CHECKP_GLOBALS_INCR)], %g3
ldx [%l2+(4*CHECKP_GLOBALS_INCR)], %g4
ldx [%l2+(5*CHECKP_GLOBALS_INCR)], %g5
ldx [%l2+(6*CHECKP_GLOBALS_INCR)], %g6
ldx [%l2+(7*CHECKP_GLOBALS_INCR)], %g7
add %l2, (8*CHECKP_GLOBALS_INCR), %l2
stx %g0,[%l2+(0*CHECKP_GLOBALS_INCR)]
stx %g1,[%l2+(1*CHECKP_GLOBALS_INCR)]
stx %g2,[%l2+(2*CHECKP_GLOBALS_INCR)]
stx %g3,[%l2+(3*CHECKP_GLOBALS_INCR)]
stx %g4,[%l2+(4*CHECKP_GLOBALS_INCR)]
stx %g5,[%l2+(5*CHECKP_GLOBALS_INCR)]
stx %g6,[%l2+(6*CHECKP_GLOBALS_INCR)]
stx %g7,[%l2+(7*CHECKP_GLOBALS_INCR)]
ldx [%l2+(0*CHECKP_GLOBALS_INCR)], %g0
ldx [%l2+(1*CHECKP_GLOBALS_INCR)], %g1
ldx [%l2+(2*CHECKP_GLOBALS_INCR)], %g2
ldx [%l2+(3*CHECKP_GLOBALS_INCR)], %g3
ldx [%l2+(4*CHECKP_GLOBALS_INCR)], %g4
ldx [%l2+(5*CHECKP_GLOBALS_INCR)], %g5
ldx [%l2+(6*CHECKP_GLOBALS_INCR)], %g6
ldx [%l2+(7*CHECKP_GLOBALS_INCR)], %g7
add %l2, (8*CHECKP_GLOBALS_INCR), %l2
#define ASI_IMMU_TAG_TARGET_REG 0x50
#define ASI_IMMU_TAG_TARGET_REG_VAL 0x000
#define ASI_IMMU_SFSR 0x50
#define ASI_IMMU_SFSR_VAL 0x018
#define ASI_IMMU_TSB_BASE_Z_PS0 0x35
#define ASI_IMMU_TSB_BASE_Z_PS1 0x36
#define ASI_IMMU_Z_CONFIG 0x37
#define ASI_IMMU_TSB_BASE_NZ_PS0 0x3D
#define ASI_IMMU_TSB_BASE_NZ_PS1 0x3E
#define ASI_IMMU_NZ_CONFIG 0x3F
#define ASI_IMMU_TAG_ACCESS 0x50
#define ASI_IMMU_TAG_ACCESS_VAL 0x030
#define ASI_IMMU_TSB_8KB_PTR_REG 0x51
#define ASI_IMMU_TSB_64KB_PTR_REG 0x52
#define ASI_PRIMARY_CONTEXT0_REG 0x21
#define ASI_PRIMARY_CONTEXT0_REG_VAL 0x008
#define ASI_SECONDARY_CONTEXT0_REG 0x21
#define ASI_SECONDARY_CONTEXT0_REG_VAL 0x010
#define ASI_PRIMARY_CONTEXT1_REG 0x21
#define ASI_PRIMARY_CONTEXT1_REG_VAL 0x108
#define ASI_SECONDARY_CONTEXT1_REG 0x21
#define ASI_SECONDARY_CONTEXT1_REG_VAL 0x110
#define ASI_DMMU_SFSR 0x58
#define ASI_DMMU_SFSR_VAL 0x018
#define ASI_DMMU_SFAR 0x58
#define ASI_DMMU_SFAR_VAL 0x020
#define ASI_DMMU_PARTITION_ID 0x58
#define ASI_DMMU_HWTW_CONFIG 0x40
#define ASI_DMMU_PARTITION_ID_VAL 0x80
#define ASI_MMU_RANGE_OFFSET 0x52
#define MMU_REAL_RANGE_BASE 0x108
#define MMU_PHYS_OFFSET 0x208
#define ASI_MMU_MISC 0x54
#define MMU_MISC_MIN_VA 0x10
#define MMU_MISC_MAX_VA 0x48
ldxa [%g3]ASI_MMU_MISC, %g4
subcc %g3, MMU_MISC_MAX_VA, %g0
wr %g0, ASI_MMU_RANGE_OFFSET, %asi
mov MMU_REAL_RANGE_BASE, %g3
mov ASI_PRIMARY_CONTEXT0_REG_VAL, %g3
ldxa [%g3]ASI_PRIMARY_CONTEXT0_REG, %g4
mov ASI_SECONDARY_CONTEXT0_REG_VAL, %g3
ldxa [%g3]ASI_SECONDARY_CONTEXT0_REG, %g4
mov ASI_PRIMARY_CONTEXT1_REG_VAL, %g3
ldxa [%g3]ASI_PRIMARY_CONTEXT1_REG, %g4
mov ASI_SECONDARY_CONTEXT1_REG_VAL, %g3
ldxa [%g3]ASI_SECONDARY_CONTEXT1_REG, %g4
mov ASI_DMMU_PARTITION_ID_VAL, %g3
ldxa [%g3]ASI_DMMU_PARTITION_ID, %g4
mov ASI_DMMU_HWTW_CONFIG, %g3
ldxa [%g3]ASI_DMMU_PARTITION_ID, %g4
stxa %g4,[%g3]ASI_MMU_MISC
subcc %g3, MMU_MISC_MAX_VA, %g0
wr %g0, ASI_MMU_RANGE_OFFSET, %asi
mov MMU_REAL_RANGE_BASE, %g3
mov ASI_PRIMARY_CONTEXT0_REG_VAL, %g3
stxa %g4,[%g3]ASI_PRIMARY_CONTEXT0_REG
mov ASI_SECONDARY_CONTEXT0_REG_VAL, %g3
stxa %g4,[%g3]ASI_SECONDARY_CONTEXT0_REG
mov ASI_PRIMARY_CONTEXT1_REG_VAL, %g3
stxa %g4,[%g3]ASI_PRIMARY_CONTEXT1_REG
mov ASI_SECONDARY_CONTEXT1_REG_VAL, %g3
stxa %g4,[%g3]ASI_SECONDARY_CONTEXT1_REG
mov ASI_DMMU_PARTITION_ID_VAL, %g3
stxa %g4,[%g3]ASI_DMMU_PARTITION_ID
mov ASI_DMMU_HWTW_CONFIG, %g3
stxa %g4,[%g3]ASI_DMMU_PARTITION_ID