* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: hypervisor.h
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#pragma ident "@(#)hypervisor.h 1.13 04/05/12 SMI"
* Common HyperVisor definitions
* Hypervisor software trap numbers
#define CPU_TICK_NPT 0x81
#define CPU_STICK_NPT 0x82
#define MMU_MAP_ADDR 0x83
#define MMU_UNMAP_ADDR 0x84
* Hypervisor function numbers for FAST_TRAP
#define CPU_UPDATE_SIGNATURE 0x13
#define MMU_TSB_CTX0 0x20
#define MMU_TSB_CTXNON0 0x21
#define MMU_DEMAP_PAGE 0x22
#define MMU_DEMAP_CTX 0x23
#define MMU_DEMAP_ALL 0x24
#define MMU_MAP_PERM_ADDR 0x25
#define MMU_FAULT_AREA 0x26
#define CACHE_FLUSH_VPAGE 0x30
#define CONS_GETCHAR 0x60
#define CONS_PUTCHAR 0x61
#define VPCI_IO_PEEK 0xb6
#define VPCI_IO_POKE 0xb7
#define VPCI_DMA_SYNC 0xb8
#ifdef CONFIG_DISK /* Simulation hack */
#define GUEST_FREEZE 0xf2
#define OLD_CPU_MYID 0xf4 /* replaced by CPU_MYID */
#define CPU_MONDO 0xf6 /* XXX temporary hack */
#define FAKE_INTR 0xf7 /* XXX temporary hack */
#define CONS_SETINTR 0xf9
#define NPERMMAPPINGS 8 /* XXX i&d, should be {n} of each */
#define MMU_FAULT_AREA_SIZE 0x80
#define EOK 0 /* No error */
#define ENOCPU 1 /* Invalid CPU id */
#define ENORADDR 2 /* Invalid real address */
#define ENOINTR 3 /* Invalid interrupt id */
#define EBADPGSZ 4 /* Invalid page size encoding */
#define EBADTSB 5 /* Invalid TSB description */
#define EINVAL 6 /* Invalid argument */
#define EBADTRAP 7 /* Invalid function number */
#define EBADALIGN 8 /* Invalid address alignment */
#define EWOULDBLOCK 9 /* Call would block */
#define ENOACCESS 10 /* No access to resource */
/* cons_getchar special character values (64-bit) */
#endif /* _HYPERVISOR_H */