* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: spc_isa2mt_fail_fc_7.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
* CA 95054 USA or visit www.sun.com if you need additional information or
* ========== Copyright Header End ============================================
.ident "FOCUSCASE: focus.pm,v 1.1 2003/04/23 17:53:39 somePerson Exp somePerson $ ./spc_basic_isa2.pl FOCUS_SEED=182669290"
.ident "BY somePerson ON Mon Jul 28 21:43:58 CDT 2003"
.ident "Using Instruction Hash for Focus :$Id: spc_isa2mt_fail_fc_7.s,v 1.3 2007/07/05 22:02:06 drp Exp $"
/************************************************************************
************************************************************************/
setx DIAG_DATA_AREA, %g1, %g3
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
fmul8x16al %f15, %f6, %f12
setx 0x34400001400, %l0, %l1
fmul8ulx16 %f12, %f10, %f8
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmul8x16al %f11, %f6, %f12
setx 0x34400001400, %l0, %l1
fmovrdlez %g4, %f12, %f10
setx 0x34400001400, %l0, %l1
taddcctv %o1, 0x1A9D, %i0
taddcctv %l4, 0x1A8D, %l3
fmul8sux16 %f14, %f8, %f6
fmovdpos %icc, %f14, %f13
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
taddcctv %o6, 0x064F, %l2
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fandnot1s %f14, %f14, %f0
setx 0x34400001400, %l0, %l1
tsubcctv %l2, 0x0C0E, %g6
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
faligndata %f4, %f10, %f0
fmovdneg %xcc, %f15, %f15
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
faligndata %f10, %f8, %f6
setx 0x34400001400, %l0, %l1
faligndata %f6, %f14, %f4
fandnot2s %f15, %f15, %f1
fandnot1s %f13, %f13, %f11
fandnot1s %f10, %f14, %f1
fmul8x16au %f14, %f2, %f12
setx 0x34400001400, %l0, %l1
fpsub16s %f13, %f10, %f12
fmul8x16al %f13, %f7, %f10
fmul8ulx16 %f2, %f6, %f14
fmul8ulx16 %f10, %f14, %f6
fmovdleu %icc, %f14, %f15
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmul8x16au %f8, %f15, %f4
fmul8ulx16 %f8, %f14, %f0
fmuld8sux16 %f7, %f0, %f6
fmul8x16au %f13, %f11, %f8
fmul8x16al %f7, %f8, %f10
setx 0x34400001400, %l0, %l1
fmul8x16au %f3, %f15, %f10
fmul8ulx16 %f4, %f2, %f12
fmul8x16al %f10, %f6, %f2
fmuld8sux16 %f4, %f12, %f12
fmul8x16au %f11, %f14, %f2
fmuld8ulx16 %f4, %f4, %f14
fandnot2s %f12, %f2, %f12
fmuld8ulx16 %f8, %f6, %f0
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
fmuld8sux16 %f7, %f6, %f8
faligndata %f12, %f0, %f0
setx 0x34400001400, %l0, %l1
tsubcctv %i7, 0x1BC4, %i2
setx 0x34400001400, %l0, %l1
fmul8x16au %f14, %f4, %f0
taddcctv %i0, 0x0E02, %l2
fmovdneg %xcc, %f15, %f13
faligndata %f8, %f10, %f4
setx 0x34400001400, %l0, %l1
faligndata %f10, %f14, %f2
setx 0x34400001400, %l0, %l1
fmuld8sux16 %f7, %f0, %f6
fmuld8sux16 %f5, %f10, %f12
fandnot1 %f12, %f10, %f12
fmul8x16au %f4, %f14, %f2
fmul8sux16 %f10, %f12, %f12
taddcctv %o3, 0x1958, %l4
fandnot2s %f11, %f13, %f6
fmovrdgez %l2, %f14, %f14
tsubcctv %i1, 0x0A83, %o2
fmul8x16au %f1, %f12, %f0
fandnot2s %f15, %f15, %f6
fmul8ulx16 %f14, %f6, %f2
faligndata %f10, %f2, %f6
faligndata %f14, %f8, %f4
fmul8x16au %f0, %f0, %f12
fmovdpos %icc, %f12, %f15
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
fmul8ulx16 %f6, %f10, %f10
faligndata %f8, %f10, %f14
faligndata %f0, %f12, %f14
faligndata %f12, %f0, %f2
fmul8ulx16 %f4, %f14, %f2
fmuld8sux16 %f8, %f8, %f8
fmovspos %xcc, %f13, %f10
fmovrslez %o1, %f11, %f12
fmul8x16au %f5, %f15, %f6
fmovsneg %xcc, %f10, %f13
fmul8sux16 %f0, %f10, %f2
fmul8sux16 %f10, %f2, %f14
faligndata %f4, %f14, %f6
tsubcctv %i7, 0x0B55, %g4
fmul8sux16 %f14, %f4, %f6
fandnot2s %f12, %f8, %f15
fmul8x16au %f1, %f12, %f6
fmuld8sux16 %f7, %f0, %f10
fpadd16s %f10, %f12, %f14
fmuld8ulx16 %f6, %f7, %f14
setx 0x34400001400, %l0, %l1
fmuld8ulx16 %f9, %f3, %f6
fmuld8sux16 %f0, %f2, %f14
fmovrsgez %l2, %f15, %f11
fmul8ulx16 %f0, %f14, %f6
fmuld8sux16 %f1, %f1, %f4
fmul8sux16 %f12, %f0, %f0
fmovsleu %icc, %f15, %f12
faligndata %f14, %f8, %f10
fmovdneg %icc, %f13, %f15
taddcctv %l6, 0x10A0, %i1
fmul8sux16 %f10, %f6, %f0
fmul8sux16 %f10, %f2, %f2
fmuld8sux16 %f8, %f12, %f10
faligndata %f12, %f2, %f6
fmul8x16al %f5, %f11, %f10
setx 0x34400001400, %l0, %l1
fandnot1s %f12, %f3, %f15
fmovrslez %l4, %f10, %f14
fmovsleu %icc, %f10, %f10
fmuld8ulx16 %f15, %f9, %f2
setx 0x34400001400, %l0, %l1
fmul8x16au %f15, %f9, %f14
fmul8x16au %f3, %f14, %f0
setx 0x34400001400, %l0, %l1
fmul8x16au %f8, %f11, %f14
faligndata %f6, %f14, %f8
faligndata %f8, %f10, %f10
fmuld8sux16 %f9, %f0, %f8
fmuld8sux16 %f2, %f12, %f12
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
faligndata %f8, %f14, %f14
fmul8sux16 %f14, %f6, %f2
setx 0x34400001400, %l0, %l1
fpadd16s %f13, %f10, %f15
tsubcctv %l5, 0x18D2, %i3
fpsub32s %f15, %f12, %f15
fmuld8sux16 %f4, %f12, %f2
fandnot2s %f5, %f14, %f10
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmovdpos %xcc, %f12, %f11
setx 0x34400001400, %l0, %l1
fmul8ulx16 %f14, %f0, %f2
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmul8x16al %f4, %f5, %f14
setx 0x34400001400, %l0, %l1
fmul8x16au %f13, %f3, %f10
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
bpos,a,pt %icc, loop_1017
bneg,a,pt %xcc, loop_1020
setx 0x34400001400, %l0, %l1
bneg,a,pn %xcc, loop_1071
fmovdleu %icc, %f12, %f11
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmuld8ulx16 %f10, %f14, %f12
taddcctv %l3, 0x00B8, %o4
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmuld8sux16 %f9, %f2, %f0
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
bleu,a,pn %xcc, loop_1262
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
setx 0x34400001400, %l0, %l1
fmuld8ulx16 %f13, %f12, %f2
fmul8x16au %f12, %f8, %f8
fmuld8ulx16 %f1, %f11, %f4
taddcctv %o6, 0x0F73, %l1
setx 0x34400001400, %l0, %l1
taddcctv %l4, 0x07EF, %g1
setx 0x34400001400, %l0, %l1
fmovdpos %xcc, %f12, %f10
fmul8ulx16 %f2, %f10, %f14
fmovsneg %icc, %f13, %f11
tsubcctv %l0, 0x1C73, %o4
setx 0x34400001400, %l0, %l1
bneg,a,pt %icc, loop_1326
fmul8x16au %f2, %f14, %f0
fandnot1s %f13, %f10, %f15
bneg,a,pn %xcc, loop_1338
bpos,a,pt %icc, loop_1339
tsubcctv %i7, 0x1438, %o7
fmovrdgez %i7, %f12, %f10
tsubcctv %l3, 0x1461, %g3
fmul8x16au %f15, %f4, %f0
fmovrslez %o4, %f12, %f15
taddcctv %i5, 0x13CE, %g2
fmul8sux16 %f6, %f10, %f0
taddcctv %i3, 0x11DC, %l1
fmovrdlez %l6, %f10, %f10
fmuld8sux16 %f14, %f2, %f2
taddcctv %o2, 0x06F6, %i6
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
setx 0x34400001400, %l0, %l1
taddcctv %g2, 0x1AA3, %g3
fmovsleu %icc, %f12, %f11
fmuld8ulx16 %f6, %f11, %f10
fmuld8sux16 %f11, %f3, %f14
fmul8x16au %f11, %f3, %f0
setx 0x34400001400, %l0, %l1
faligndata %f12, %f4, %f2
fmovrdlez %g1, %f10, %f14
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
taddcctv %i5, 0x02AF, %g5
taddcctv %l1, 0x12B9, %i7
fmul8sux16 %f0, %f12, %f4
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!# Initialize registers ..
INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
!# Execute some ALU ops ..
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmuld8sux16 %f12, %f10, %f6
fmovsneg %icc, %f14, %f12
setx 0x34400001400, %l0, %l1
bneg,a,pt %xcc, loop_1519
bneg,a,pn %icc, loop_1523
setx 0x34400001400, %l0, %l1
faligndata %f10, %f0, %f12
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmovrdlez %l2, %f12, %f14
fmuld8sux16 %f12, %f7, %f10
setx 0x34400001400, %l0, %l1
fmul8ulx16 %f6, %f10, %f10
setx 0x34400001400, %l0, %l1
fmuld8ulx16 %f3, %f12, %f2
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmuld8sux16 %f12, %f4, %f8
fpsub16s %f12, %f11, %f13
bshuffle %f12, %f14, %f14
setx 0x34400001400, %l0, %l1
fmovrsgez %l3, %f13, %f15
setx 0x34400001400, %l0, %l1
fmovrsgez %o6, %f10, %f15
fmul8ulx16 %f12, %f10, %f2
fandnot2s %f12, %f13, %f8
fmovsneg %icc, %f11, %f11
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmul8ulx16 %f14, %f12, %f0
setx 0x34400001400, %l0, %l1
fmul8x16au %f11, %f2, %f8
setx 0x34400001400, %l0, %l1
fmul8x16au %f10, %f8, %f4
fmovsleu %icc, %f10, %f13
faligndata %f14, %f8, %f8
setx 0x34400001400, %l0, %l1
bpos,a,pt %icc, loop_1917
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
setx 0x34400001400, %l0, %l1
fmul8ulx16 %f2, %f4, %f12
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
EXIT_GOOD /* test finish */
/************************************************************************
************************************************************************/